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F.Y. B. Tech.-EEE Lab 2016
MIT Academy of Engineering, Alandi (D), Pune Page 1
LAB MANUAL
Electrical and Electronics Engineering
F.Y. B. Tech
(2016-17)
F.Y. B. Tech.-EEE Lab 2016
MIT Academy of Engineering, Alandi (D), Pune Page 2
Rules & Regulation
Laboratory session is an integral part of the subject taught in the classes. By attending lab
session, students will have opportunity to conduct experiments and to be exposed to the
practical aspects of the subject. Experiments allow students to apply and test the theory
learned in the class, which will help strengthen the understanding of the subject. It is
therefore an important part of learning activities that all students must participate in. This
guideline serves as a policy, rules and regulations that all students must follow when they use
the lab and when attending lab sessions.
1. Participation in the lab session is compulsory to all students who have registered for the
subject.
2. Attendance will be taken during the experiment. Only students who have attended the lab
session are allowed to submit Lab reports.
3. Lab report must be submitted to the Lab facilitator. Students are generally allowed one week
to submit the lab report, it will be treated as on-time submission.
4. With late mark report may be accepted max upto two weeks, but report will not be checked
after two weeks of completing the concerned practical.
5. Lab report is an individual work. Fabricating result and copying report of others are strictly
prohibited.
6. Students are expected to study the lab sheet as a preparation before coming to the lab session.
Instructors may conduct on the spot evaluation during lab session.
7. Lab instructor may conduct briefing to the students at the start of the experiment. This briefing
includes the procedure, technical and safety aspect of the experiment.
8. Experiment must be completed within the designated time.
F.Y. B. Tech.-EEE Lab 2016
MIT Academy of Engineering, Alandi (D), Pune Page 3
INDEX
Experiment
No
Title of Experiment Page No.
GROUP A
1. Verification of Kirchhoff’s laws and Superposition theorem
(a) To develop a circuit for Kirchhoff’s laws and Superposition
theorem.
(b) To build circuit and test it.
2. R-L-C series A.C. circuit
(a) To calculate exact values of R, Land C
(b) To find power losses in R, L and C.
3 Verification of relation between Line and Phase quantities in
Star and Delta circuits
(a) To understand Line & Phase quantities and types of connection
along with Three phase supply
(b) To connect Bulb load in Star connection and verify the relation.
(c) To connect Bulb load in Delta connection and verify the relation.
4 Load test on D.C. Shunt Motor.
(a) To find the torque and output power of motor
(b) To calculate the efficiency of motor.
GROUP B
5 To study Passive components – Resistors, Capacitors, Inductors
a) To test semiconducting components – Diode
b)To measure various electronic quantities using CRO
6 DC Regulated Power Supply
a) To design 12V IC based DC regulated power supply (Theoretical).
b) To test and observe waveforms at various stages on CRO and
measure the voltage using DMM.
F.Y. B. Tech.-EEE Lab 2016
MIT Academy of Engineering, Alandi (D), Pune Page 4
7 Combinational Digital Circuits
a) To design and implement Half adder and Full adder (using Half
adder).
b) To design and implement 8:1 MUX using IC-74LS153 and verify
its truth table.
8 OP-AMP Applications
a) To verify operations of inverting and non inverting amplifier for
various gain factors.
b) To verify application of OPAMP as summing and difference
amplifier.
c) To verify the application of OPAMP as voltage follower.
F.Y. B. Tech.-EEE Lab 2016
MIT Academy of Engineering, Alandi (D), Pune Page 5
Rubrics
[Evaluation Parameters]
Excellent (2 M) Good (1.5 M) Satisfactory (1 M) Unsatisfactory(0 M)
Delivery
• Completed
between 90-
100% of the
requirements.
• Submitted on
time.
• Completed
between 80-90%
of the
requirements.
• Submitted on
time, and in
correct
• Completed
between 70-80%
of the
requirements.
• Submitted on
time, and in
correct format
• Completed less
than 70% of the
requirements.
• Not delivered on
time or not in
correct format
Coding
Standards
• Includes name,
date, and
assignment title.
• Excellent
Comments.
• Creatively
organized work.
• Includes name,
date, and
assignment title.
• Good use of
Comments
• Organized work.
• Includes name,
date, and
assignment title.
• White space
makes program
fairly easy to
read.
• No name, date, or
assignment title
included
• Poor use of white
space
(indentation,
blank lines).
Documentation
• Clearly and
effectively
documented
including
descriptions of
all variables.
• Clearly
documented
including
descriptions of all
variables.
•
• Basic
documentation
has been
completed
including
descriptions of all
variables.
• Purpose is noted
for each function.
• No documentation
included.
Runtime
• Executes without
errors excellent
user prompts,
good use of
symbols, spacing
in output.
• output from test
cases is included.
• Executes without
errors.
• User prompts are
understandable,
minimum use of
symbols or
spacing in output.
•
• Executes without
errors.
• User prompts
contain little
information, poor
design.
• Some testing has
been completed.
• Does not execute
due to errors.
• User prompts are
misleading or non-
existent.
• No testing has
been completed.
Efficiency
• Solution is
efficient, easy to
understand, and
maintain.
• Solution is
efficient and easy
to follow (i.e. no
confusing tricks).
• A logical solution
that is easy to
follow but it is not
the most efficient.
• A difficult and
inefficient
solution.
F.Y. B. Tech.-EEE Lab 2016
MIT Academy of Engineering, Alandi (D), Pune Page 6
Laboratory Performance Report
Experiment No. : 01
Title of the Experiment : _______________________________________________________________________
________________________________________________________________________
________________________________________________________________________
Date of Conduction (As per Plan) : / / 201 Actual Data Conduction : / / 201
Date of Evaluation (As per Plan) : / /201 Actual Data Evaluation : / / 201
Roll Number :
Name of the Student :
Exam Seat Number :
Grade : __________
Remark :
____________________________________________________________________________________________________________________
____________________________________________________________________________________________________________________
____________________________________________________________________
Facilitator (Sign and Date):
F.Y. B. Tech.-EEE Lab 2016
MIT Academy of Engineering, Alandi (D), Pune Page 7
Experiment No.:- 01
CIRCUIT DIAGRAM
Part a):- Kirchhoff’s Laws
Kirchhoff’s Point Law or Current Law (KCL):-
F.Y. B. Tech.-EEE Lab 2016
MIT Academy of Engineering, Alandi (D), Pune Page 8
TITLE: - Kirchhoff’s laws and Superposition theorem
AIM: - Verification of - a) Kirchhoff’s laws and b) Superposition theorem
APPARATUS: - Circuit Board, Dual Power DC Supply, Multimeter, Probes
THEORY:-
Part a):- Kirchhoff’s Laws (After Gustavo Robert Kirchhoff (1824 - 1887), an outstanding German Physicist):-
These laws are more comprehensive than Ohm's law and are used for solving electrical networks which
may not be readily solved by the latter. Kirchhoff’s laws, two in number, are particularly useful
(a) In determining the equivalent resistance of a complicated network of conductors and
(b) For calculating the currents flowing in the various conductors.
1) Kirchhoff’s Point Law or Current Law (KCL):-
In any electrical network, the algebraic sum of the currents meeting at a point (or junction) is zero.
Put in another way, it simply means that -
The total current leaving a junction is equal to the total current entering that junction.
It is obviously true because there is no accumulation of charge at the junction of the network.
Consider the case of a few conductors meeting at a point A as in Fig. (a) shown below.
Some conductors have currents leading to point A, whereas some have currents leading away from point A.
Assuming the incoming currents to be positive and the outgoing currents negative, we have
I1 + (-I2) + (-I3) + I4 + (-I5) = 0
or
I1 + I4 + (-I2) + (-I3) + (-I5) = 0
or
I1 + I4 = I2 + I3 + I5
or
Incoming currents = Outgoing currents
F.Y. B. Tech.-EEE Lab 2016
MIT Academy of Engineering, Alandi (D), Pune Page 9
Similarly, in Fig. (b) for node A
I + (-I1 ) + (-I2) + (-I3) + (-I4) = 0
or
I = I1 + I2 + I3 + I4
or
Incoming currents = Outgoing currents
We can express the above conclusion as - At a junction ∑ 0
2) Kirchhoff's Mesh Law or Voltage Law (KVL):-
The algebraic sum of the products of currents and resistances in each of the conductors in any
closed path (or mesh) in a network plus the algebraic sum of the e.m.f.s in that path is zero.
In other words, round a mesh ∑ 	∑ 0
It should be noted that algebraic sum is the sum which takes into account the polarities of the
voltage drops.
The basis of this law is this: - If we start from a particular junction and go round the mesh till we
come back to the starting point, then we must be at the same potential with which we started. Hence, it
means that all the sources of e.m.f. met on the way must necessarily be equal to the voltage drops in the
resistances, every voltage being given its proper sign, plus or minus.
Determination of Voltage Sign:-
In applying Kirchhoff's laws to specific problems, particular attention should be paid to the
algebraic signs of voltage drops and e.m.fs., otherwise results will come out to be wrong. Following sign
conventions is suggested:-
(a) Sign of Battery E.M.F. :-
A rise in voltage should be given a + ve sign and a fall in voltage a -ve sign.
Keeping this in mind, it is clear that as we go from the -ve terminal of a battery to it’s +ve terminal
(Refer above Fig.), there is a rise in potential, hence this voltage should be given a + ve sign. If, on the
other hand, we go from +ve terminal to -ve terminal, then there is a fall in potential, hence this voltage
should be given a -ve sign.
It is important to note that the sign of the battery e.m.f. is independent of the direction of the current
through that branch.
F.Y. B. Tech.-EEE Lab 2016
MIT Academy of Engineering, Alandi (D), Pune Page 10
CIRCUIT DIAGRAM
Part b):- Superposition Theorem:-
1. Original Circuit:-
F.Y. B. Tech.-EEE Lab 2016
MIT Academy of Engineering, Alandi (D), Pune Page 11
(b) Sign of IR Drop:-
Now, take the case of a resistor. If we go through a resistor in the same direction as the current, then there
is a fall in potential because current flows from a higher to a lower potential.
Hence, this voltage fall should be taken -ve. However, if we go in a direction opposite to that of the current,
then there is a rise in voltage. Hence, this voltage rise should be given a +ve sign.
It is clear that the sign of voltage drop across a resistor depends on the direction of current through that
resistor but is independent of the polarity of any other source of e.m.f. in the circuit under consideration.
Consider the closed path ABCDA in the following Fig.
We have to mark +ve and –ve across resistors according to direction of current flowing through it.
The terminal of resistor where the current is entering is marked as +ve and the terminal from where current
is leaving is marked as –ve as shown.
Assume any direction of travel around the loop. In this case let us travel around the mesh in the
clockwise direction.
Different voltage drops will have the following signs:-
I1R1 is - ve (fall in potential)
I2R2 is - ve (fall in potential)
I3R3 is + ve (rise in potential)
I4R4 is - ve (fall in potential)
E2 is - ve (fall in potential)
E1 is + ve (rise in potential)
Using Kirchhoff's voltage law, we get
F.Y. B. Tech.-EEE Lab 2016
MIT Academy of Engineering, Alandi (D), Pune Page 12
CIRCUIT DIAGRAM
Part b):- Superposition Theorem:-
2. Step 1 Circuit:-
F.Y. B. Tech.-EEE Lab 2016
MIT Academy of Engineering, Alandi (D), Pune Page 13
- I1R1 - I2R2 + I3R3 - I4R4 - E2 + E1 = 0
or
I1R1 + I2R2 - I3R3 + I4R4 = E1 - E2
Assumed Direction of Current:-
In applying Kirchhoff's laws to electrical networks, the question of assuming proper direction of
current usually arises. The direction of current flow may be assumed either clockwise or anticlockwise. If
the assumed direction of current is not the actual direction, then on solving the question, this current will be
found to have a minus sign. If the answer is positive, then assumed direction is the same as actual direction.
However, the important point is that once a particular direction has been assumed, the same should
be used throughout the solution of the question.
Part b):- Superposition Theorem:-
According to this theorem, if there are numbers of emf’s acting simultaneously in any linear
bilateral network, then each emf acts independently of the others i.e. as if the other emf’s did not exist.
The value of current in any conductor is the algebraic sum of the currents due to each emf.
Similarly, voltage across any conductor is the algebraic sum of the voltages which each emf would have
produced while acting singly.
In other words, current in or voltage across, any conductor of the network is obtained by
superimposing the currents and voltages due to each emf in the network.
It is important to keep in mind that this theorem is applicable only to linear networks where current
is linearly related to voltage as per Ohm's law.
Hence, this theorem may be stated as follows:
In a linear network containing more than one source of emf, the current in any branch is the
algebraic sum of all the currents, that would have been produced by each source of emf taken separately,
with all other sources of emf being replaced meanwhile by their respective internal resistances.
In case the internal resistance of a source is not given, it may be assumed as negligible.
To illustrate the theorem, consider the circuit given below.
Follow the following steps to find the current flowing through various branches. Let the current
flowing through R1 branch is I1, R2 branch is I2 and R3 branch is I3.
F.Y. B. Tech.-EEE Lab 2016
MIT Academy of Engineering, Alandi (D), Pune Page 14
CIRCUIT DIAGRAM
Part b):- Superposition Theorem:-
3. Step 2 Circuit:-
F.Y. B. Tech.-EEE Lab 2016
MIT Academy of Engineering, Alandi (D), Pune Page 15
Step 1:-
a) Replace E2 by its internal resistance. (If internal resistance is not given remove E2 and put a
short across the removed terminals.)
b) Find the current flowing through all branches. (Mark these current with another notation e.g.
I1’)
Step 2:-
a) Replace E1 by its internal resistance. (If internal resistance is not given remove E1 and put a
short across the removed terminals.)
F.Y. B. Tech.-EEE Lab 2016
MIT Academy of Engineering, Alandi (D), Pune Page 16
OBSERVATION TABLE
Part a):- Kirchhoff’s Laws:-
1. Kirchhoff’s Point Law or Current Law (KCL):-
Current Through R1 = I1 Current Through R2 = I2 Current Through R3 = I3
2. Kirchhoff's Mesh Law or Voltage Law (KVL):-
E1 E2 Voltage Drop across R1
= I1R1
Voltage Drop across R2
= I2R2
Voltage Drop across
R3 = I3R3
Part b):- Superposition Theorem:-
Current Through R1 Current Through R2 Current Through R3
Original Circuit I1 = I2 = I3 =
Step 1 Circuit I1’ = I2’ = I3’ =
Step 2 Circuit I1’’ = I2’’ = I3’’ =
F.Y. B. Tech.-EEE Lab 2016
MIT Academy of Engineering, Alandi (D), Pune Page 17
b) Find the current flowing through all branches. (Mark these current with another notation e.g.
I1’’)
Step 3:-
The Resultant current through R1 = I1 = + I1’ – I1’’
The Resultant current through R2 = I2 = - I2’ + I2’’
The Resultant current through R1 = I3 = + I3’ + I3’’
PROCEDURE:-
Part a):- Kirchhoff’s Laws:-
1. Kirchhoff’s Point Law or Current Law (KCL):-
a) Connect the circuit as shown in the KCL circuit diagram.
b) Apply some voltage to the circuit.
c) Measure current flowing through all branches using multimeter.
d) Switch off the power supply.
F.Y. B. Tech.-EEE Lab 2016
MIT Academy of Engineering, Alandi (D), Pune Page 18
2. Kirchhoff's Mesh Law or Voltage Law (KVL):-
a) Connect the circuit as shown in the KCL circuit diagram.
b) Apply some voltage to the circuit.
c) Measure the current through all branches using multimeter.
d) Switch off the power supply.
Part b):- Superposition Theorem:-
1. Original Circuit:-
a) Connect the circuit as shown in the given circuit diagram.
b) Apply some voltage to the circuit.
c) Measure the current flowing through all branches using multimeter.
d) Switch off the power supply.
2. Step 1 Circuit:-
a) Connect the circuit as shown in the step 1 circuit diagram.
b) Apply some voltage to the circuit.
c) Measure the current flowing through all branches using multimeter.
d) Switch off the power supply.
3. Step 2 Circuit:-
a) Connect the circuit as shown in the step 2 circuit diagram.
b) Apply some voltage to the circuit.
c) Measure the current flowing through all branches using multimeter.
d) Switch off the power supply.
F.Y. B. Tech.-EEE Lab 2016
MIT Academy of Engineering, Alandi (D), Pune Page 19
RESULT:-
Part a):- Kirchhoff’s Laws:-
1. Kirchhoff’s Point Law or Current Law (KCL):-
2. Kirchhoff's Mesh Law or Voltage Law (KVL):-
Part b):- Superposition Theorem:-
CONCLUSION:-
F.Y. B. Tech.-EEE Lab 2016
MIT Academy of Engineering, Alandi (D), Pune Page 20
Laboratory Performance Report
Experiment No. : 02
Title of the Experiment : _______________________________________________________________________
________________________________________________________________________
________________________________________________________________________
Date of Conduction (As per Plan) : / / 201 Actual Data Conduction : / / 201
Date of Evaluation (As per Plan) : / /201 Actual Data Evaluation : / / 201
Roll Number :
Name of the Student :
Exam Seat Number :
Grade : __________
Remark :
____________________________________________________________________________________________________________________
____________________________________________________________________________________________________________________
____________________________________________________________________
Facilitator (Sign and Date):
F.Y. B. Tech.-EEE Lab 2016
MIT Academy of Engineering, Alandi (D), Pune Page 21
Experiment No.:- 02
CIRCUIT DIAGRAM
F.Y. B. Tech.-EEE Lab 2016
MIT Academy of Engineering, Alandi (D), Pune Page 22
TITLE: - RLC Series circuit
AIM: - To study a RLC series circuit under conditions of lagging power factor & leading power factor
APPARATUS: - Single phase Auto-Transformer, Rheostat, Inductor, Capacitor, Multimeter, Probes
THEORY:-
The following fig (a) shows a circuit in which a resistor R, an inductor L and a capacitor C connected in
series. AC supply voltage V is applied to this series combination.
Let,
VR = IR = the voltage drop across the resistor R
This VR will be in phase with the supply current I
VL = IXL = the voltage drop across the inductor L
This VL will be leading the supply current I by 90°
VC = IXC = the voltage drop across the capacitor C
This VC will be lagging the supply current I by 90°
Fig (b) gives the voltage triangle.
F.Y. B. Tech.-EEE Lab 2016
MIT Academy of Engineering, Alandi (D), Pune Page 23
OA represents VR, AB and AC represents the inductive and capacitive drops respectively.
It will be seen that VL and VC are 180° out of phase with each other i.e. they are in direct opposition to each
other.
Subtracting BD (=AC) from AB, we get the net reactive drop AD = I (XL – XC)
The applied voltage V is represented by OD and is the vector sum of OA and AD.
	 	
	 ( ) 	( −	 )
	 	 ( ) 	( −	 )
	
( ) 	( −	 )
	
( ) 	( )
	
The term ( ) 	( −	 ) is known as the impedance of the circuit. Obviously,
(Impedance) 2
= (Resistance) 2
+ (Net Reactance) 2
Or Z2
= R2
+ (XL – XC) 2
Z2
= R2
+ X2
where X = Net Reactance
F.Y. B. Tech.-EEE Lab 2016
MIT Academy of Engineering, Alandi (D), Pune Page 24
Refer following Figure.
Phase angle Φ is given by
∅ 	
( −	 )
∅ 	 	
	 	
Power factor is given by
! ∅ 	
! ∅ 	
	( −	 )
! ∅ 	
√ 	
Hence it is seen that if the equation of the applied voltage is
# $sin(
Then, equation of the resulting current in an RLC circuit is given by
	 $sin	(( 	 ) 	∅)
The positive sign is to be used when the current leads the applied voltage i.e. when XC > XL.
The negative sign is to be used when the current lags the applied voltage i.e. when XL > XC.
In general, the current leads or lags the supply voltage by an angle Φ such that tan ∅ 	
,
-
.
Using symbolic notation, we have, Z = R + j (XL – XC)
F.Y. B. Tech.-EEE Lab 2016
MIT Academy of Engineering, Alandi (D), Pune Page 25
Refer the following figure
Numerical value of the impedance is given by
( ) 	( −	 )
Its phase angle is given by
∅ 	 ./
( −	 )
Therefore, we can write the impedance as
	 ∠	 ./
( −	 )
	 ∠	 ./
If V = V ∠ 0°, then
	
Thus, when a resistance, an inductance and a capacitor are connected in series, the nature of the overall
power factor, whether lagging or leading or unity depends upon the values of the capacitive reactance and
the inductive reactance.
Case-1:
When the inductive reactance is greater than the capacitive reactance, the net reactance of the
circuit becomes inductive and hence, the overall p.f. is lagging; i.e. the current in the circuit lags the supply
voltage.
F.Y. B. Tech.-EEE Lab 2016
MIT Academy of Engineering, Alandi (D), Pune Page 26
OBSERVATION TABLE
Case VL VC VR VLC VCR VLCR Remark
XL > XC Lagging
XL < XC Leading
PHASOR DIAGRAM:-
1) Take current phasor as the reference and draw it along positive X-axis.
2) By choosing a suitable scale (e.g. 1cm= 20V), draw phasor VR along the positive X-axis since VR
and I are in phase.
3) Draw an arc with the tip of VR as the center and with distance equivalent to Vc. This arc should be
below the current phasor.
4) Cut this arc by another arc with distance equivalent to VCR and the origin as the center.
5) Join the cutting point of these two arcs to the tip of the VR phasor.
This line indicates the phasor VC.
6) Now, draw one arc from the tip of the phasor VC and with distance equivalent to VL.
7) Cut this arc by another arc drawn from the tip of the phasor VR and with distance equivalent to VLC.
8) The cutting point of these two arcs when joined to the origin, gives the phasor VLCR.
9) Repeat this procedure for the other set of readings to given another phasor diagram.
F.Y. B. Tech.-EEE Lab 2016
MIT Academy of Engineering, Alandi (D), Pune Page 27
Case-2:
When the capacitive reactance is greater than the inductive reactance, the net reactance of the
circuit becomes capacitive and hence, the overall p.f. is leading; i.e. the current in the circuit leads the
supply voltage.
Case-3:
When the capacitive reactance is equal to the inductive reactance, the net reactance of the circuit
becomes zero, and hence the overall p.f. is unity, i.e. the circuit behaves as a purely resistive circuit and the
current in the circuit is in phase with the supply voltage. The current in the circuit is maximum and the
resistance of the circuit governs it. Under this condition of the circuit, “resonance” is said to occur, or the
circuit is said to be in “resonating condition”.
The above three conditions can be adjusted in a series RLC circuit, if a continuously variable
inductance is available.
PROCEDURE:-
Case -1:
1) Connect the circuit as shown in the circuit diagram.
2) For case 1 we have to keep more inductors in the circuit. This will give more inductive reactance
than capacitive reactance. For this we use one rheostat, one capacitor and three choke coils all
connected in series.
3) Apply 230 volt AC supply to the circuit using auto-transformer.
4) Measure the voltages across various parameters as given in the observation table.
Case -2:
1) Connect the circuit as shown in the circuit diagram.
2) For case 2 we have to keep more capacitors in the circuit. This will give more capacitive reactance
than inductive reactance. For this we use one rheostat, one choke coil and two capacitors.
3) Apply 230 volt AC supply to the circuit using auto-transformer.
4) Measure the voltages across various parameters as given in the observation table.
PRECAUTIONS:-
1) Always assume all terminals live.
2) Before doing the connections make sure that the main switch of the panel board is in off condition.
3) After making all connections check it from faculty in-charge.
4) Before switching on the supply, check that the auto-transformer is in its zero position by rotating it
fully anticlockwise.
5) After taking all readings rotate the knob of the auto-transformer again to fully anticlockwise
position to make it sure that it is at zero level.
6) Switch off the main supply and remove the plug carefully.
F.Y. B. Tech.-EEE Lab 2016
MIT Academy of Engineering, Alandi (D), Pune Page 28
F.Y. B. Tech.-EEE Lab 2016
MIT Academy of Engineering, Alandi (D), Pune Page 29
RESULT:-
Case
VLCR
(from Phasor Diagram)
VLCR
(Measured)
Lagging Power Factor
Leading Power Factor
CONCLUSION:-
F.Y. B. Tech.-EEE Lab 2016
MIT Academy of Engineering, Alandi (D), Pune Page 30
F.Y. B. Tech.-EEE Lab 2016
MIT Academy of Engineering, Alandi (D), Pune Page 31
Laboratory Performance Report
Experiment No. : 03
Title of the Experiment : _______________________________________________________________________
________________________________________________________________________
________________________________________________________________________
Date of Conduction (As per Plan) : / / 201 Actual Data Conduction : / / 201
Date of Evaluation (As per Plan) : / /201 Actual Data Evaluation : / / 201
Roll Number :
Name of the Student :
Exam Seat Number :
Grade : __________
Remark :
____________________________________________________________________________________________________________________
____________________________________________________________________________________________________________________
____________________________________________________________________
Facilitator (Sign and Date):
F.Y. B. Tech.-EEE Lab 2016
MIT Academy of Engineering, Alandi (D), Pune Page 32
Experiment No.:- 03
CIRCUIT DIAGRAM
Star Connection:-
F.Y. B. Tech.-EEE Lab 2016
MIT Academy of Engineering, Alandi (D), Pune Page 33
TITLE: - Star & Delta Circuits in Three phase balanced load
AIM: - Verification of voltage and current relations in three phase balanced star and delta connected loads
APPARATUS: -
1) Three phase Auto-Transformer
2) AC Voltmeter – (0 - 300) V
3) AC Voltmeter – (0 - 600) V
4) AC Ammeter – (0 - 5) A
5) AC Ammeter – (0 - 5) A
6) Lamp load
7) Probes
THEORY:-
Three-phase systems are the most common, although, for certain special jobs, greater number of
phases is also used. For example, almost all mercury-arc rectifiers for power purposes are either six-phase
or twelve-phase and most of the rotary converters in use are six-phase. All modern generators are
practically three-phase. For transmitting large amounts of power, three-phase is invariably used. The
reasons for the immense popularity of three-phase apparatus are that it is more efficient, uses less material
for a given capacity and costs less than single-phase apparatus etc.
Three windings of a generator are connected in star or delta. Generated three-phase voltage is
applied to three-phase load. Three-phase load also can be connected in Star or Delta irrespective of
connection of generator winding. These loads may be balanced or unbalanced. Balanced load will have
same current flowing through all phases. In unbalanced condition the current flowing through all the phases
is not same.
A balanced three phase system is one in which the voltages in all phases are equal in magnitude &
differ in phase from one another by equal angle i.e.120 degree (electrical). A three phase balanced load is
that in which the loads connected across three phases are identical in nature and magnitude.
Star Connection:-
In this type of interconnection, one of the ends of each load impedances are joined together to form
a common point called as star or neutral point. The potential difference between line & neutral is called as
phase voltage & between two lines is called line voltage.
F.Y. B. Tech.-EEE Lab 2016
MIT Academy of Engineering, Alandi (D), Pune Page 34
CIRCUIT DIAGRAM
Delta Connection:-
F.Y. B. Tech.-EEE Lab 2016
MIT Academy of Engineering, Alandi (D), Pune Page 35
Vr, Vy,Vb are the three phase voltages Vph.
We have, as phasor relations as follows
-1
22222 	 3
4 −	 5
4 	 3
4 (−	 5
4 	)
16
22222 	 5
4 −	 7
222 	 5
4 (−	 7
222)
6-
22222 	 7
222 −	 3
4 	 7
222 − ( 3)2222
Assuming lagging system and using above relations we can plot the phasor diagram.
F.Y. B. Tech.-EEE Lab 2016
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OBSERVATION TABLE
Connection
Line Voltage
VL
(Volt)
Phase Voltage
VP
(Volt)
Line Current
IL
(Amp)
Phase Current
IP
(Amp)
STAR
1
2
DELTA
1
2
`
From phasor diagram,
8 	 !9 : -1
22222 	 -;
22222 −	 1;
22222
-1
22222 	2 -;
22222 cos 30
-1
22222 2	 -;
22222
√3
2
-1
22222 √3 ×	 -;
22222
Similarly,
16
22222 √3 ×	 1;
22222
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6-
22222 √3 ×	 6;
22222
i.e. √3 ×	 AB
Also IR, IY, IB are the three line currents, as well as three phase currents. Line current is equal to phase
current.
i.e. 	 AB
Delta Connection:-
In this type of interconnection, the end of first load impedance is connected to start of second load
impedance, the end of second load impedance is connected to start of third load impedance and end of third
is connected to start of first. In this way a closed loop of three impedances is formed. Three-phase supply is
given to the three junctions in the closed loop of the impedances. Current flowing through any line is called
line current (i.e., IR = IY = IB = IL ) & current through any single load impedance is called as phase current
(i.e., Ir = Iy =Ib = Iph ). The line voltages VRY , VYB & VBR are equal to phase voltages.
PHASOR DIAGRAM:-
Star Connection:-
1) Take phase voltage Vr as the reference and draw it along positive Y-axis by choosing a suitable
scale. Draw phasor Vy 120 ° behind Vr.
2) Draw phasor Vb 120 ° behind Vy.
3) To plot line voltage VRY, draw Vy to 180° opposite to its negative value. It becomes –Vy.
4) Draw the resultant of two phasors i.e. Vr and – Vy. It becomes VRY.
5) Similarly, plot remaining line voltages. (as VYB = Vy – Vb ,VBR = Vb – Vr)
6) Choosing a suitable scale plot Phase current phasor. Here Phase current and line current are same.
7) If load is lagging, current will be behind the voltage by some angle Φ.
8) If load is leading, current will be ahead of the voltage by some angle Φ.
9) If load is unity, current will be in phase with the voltage.
Delta Connection:-
1) Take phase voltage Vr as the reference and draw it along positive Y-axis by choosing a suitable
scale. Draw phasor Vy 120° behind Vr. Draw phasor Vb 120° behind Vy.
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2) Then draw phase current Ir lagging to the reference and similarly draw other phase currents Iy
lagging behind Vy and phase currents Ib lagging behind Vb by same angle Φ.
3) To plot the line current IR draw Ib to 180° opposite to its negative value. It becomes –Ib.
4) Add two phasors i.e. Ir and –Ib. It becomes Line current IR.
5) Similarly, plot remaining line currents.
6) If load is lagging, current will be behind the voltage by some angle Φ.
7) If load is leading, current will be ahead of the voltage by some angle Φ.
8) If load is unity, current will be in phase with the voltage.
We have, as phasor relations,
At Node R,
-
4 	 6-
2222 	 -1
2222
-
4 	 -1
2222 −	 6-
2222	
At Node Y,
1
4 	 -1
2222 	 16
2222
1
4 	 16
2222 −	 -1
2222	
At Node B,
6
4 	 16
2222 	 6-
2222
6
4 	 6-
2222 −	 16
2222
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From phasor diagram,
-
4 	 -1
2222 −	 6-
2222
-
4 2 ×	 -1
2222	cos 30
-
4 2 ×	 -1
2222	×
√3
2
-
4 √3	× -1
2222	
Similarly,
1
4 √3	× 16
2222
6
4 √3	× 6-
2222
i.e.
4 √3	× CB
2222
As we have line voltage and phase voltages same.
Therefore,
4 CB
22222
F.Y. B. Tech.-EEE Lab 2016
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PROCEDURE:-
Star Connection:
1) Connect the circuit as shown in the circuit diagram.
2) Apply some voltage to the load using three phase auto-transformer.
3) Balance the load. It means you have to connect same wattage lamps in each phase.
4) Note down the readings.
5) Switch off all the lamps.
6) Decrease the supply voltage to zero using auto-transformer.
7) Switch of the main supply.
Delta Connection:
Repeat the same procedure by connecting the load in Delta connection.
PRECAUTIONS:-
1) Always assume all terminals live.
2) Before doing the connections make sure that the main switch of the panel board is in off condition.
3) After making all connections check it from faculty in-charge.
4) Before switching on the supply, check that the auto-transformer is in its zero position by rotating it
fully anticlockwise.
5) In Delta connection the applied voltage should not more than the voltage rating of the lamps.
6) After taking all readings rotate the knob of the auto-transformer again to fully anticlockwise
position to make it sure that it is at zero level.
7) Switch off the main supply and remove the plug carefully.
RESULT:-
CONCLUSION:-
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Laboratory Performance Report
Experiment No. : 04
Title of the Experiment : _______________________________________________________________________
________________________________________________________________________
________________________________________________________________________
Date of Conduction (As per Plan) : / / 201 Actual Data Conduction : / / 201
Date of Evaluation (As per Plan) : / /201 Actual Data Evaluation : / / 201
Roll Number :
Name of the Student :
Exam Seat Number :
Grade : __________
Remark :
____________________________________________________________________________________________________________________
____________________________________________________________________________________________________________________
____________________________________________________________________
Facilitator (Sign and Date):
F.Y. B. Tech.-EEE Lab 2016
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TITLE: - Load Test of DC Shunt Motor
AIM: - To find the torque and output power of motor and calculate the efficiency of motor.
APPARATUS: -
1) Three phase Auto-Transformer
2) DC Voltmeter – (0 - 300) V
3) DC Ammeter – (0 - 10) A
4) Resistor – 50 Ohm, 10 A
5) Resistor – 760 Ohm, 1.2A
6) Connecting Wires
7) Tachometer (0-1500) rpm
THEORY:-
PRECAUTIONS:
1. DC shunt motor should be started and stopped under no load condition.
2. Field rheostat should be kept in the minimum position.
3. Brake drum should be cooled with water when it is under load.
PROCEDURE:
1. Connections are made as per the circuit diagram.
2. After checking the no load condition, and minimum field rheostat position, DPST switch is closed and starter
resistance is gradually removed.
3. The motor is brought to its rated speed by adjusting the field rheostat.
4. Ammeter, Voltmeter readings, speed and spring balance readings are noted under no load condition.
5. The load is then added to the motor gradually and for each load, voltmeter, ammeter, spring balance readings
and speed of the motor are noted.
6. The motor is then brought to no load condition and field rheostat to minimum position, then DPST switch is
opened.
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CIRCUIT DIAGRAM
Load Test of DC Motor:-
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Observation:
Circumference of the Brake drum = __________________ cm.
FORMULAE:
Circumference
R = ------------------- m
100 x2π
Torque T = (S1 ∼ S2) x R x 9.81 Nm
S.N
o.
Voltage
V
(Volts)
Current
I
(Amps)
Spring Balance
Reading
(S1- S2)Kg
Speed
N
(rpm)
Torque
T
(Nm)
Output
Power
Pm
(Watts)
Input
Power
Pi
(Watts)
Efficienc
y
ηηηη%S1(Kg) S2(Kg)
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Input Power Pi = VI Watts
2πNT
Output Power Pm = ------------ Watts
60
Output Power
Efficiency η % = -------------------- x 100%
Input Power
MODEL GRAPHS: SpeedN(rpm)
y
x
Torque T (Nm)
SpeedN(rpm)
TorqueT(Nm)
Efficiency%
N
T
η
y3 y2 y1
Output Power (Watts)
F.Y. B. Tech.-EEE Lab 2016
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RESULT:-
CONCLUSION:-
F.Y. B. Tech.-EEE Lab 2016
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Laboratory Performance Report
Experiment No. : 05
Title of the Experiment : _______________________________________________________________________
________________________________________________________________________
________________________________________________________________________
Date of Conduction (As per Plan) : / / Actual Data Conduction : / /
Date of Evaluation (As per Plan) : / / Actual Data Evaluation : / /
Roll Number :
Name of the Student :
Exam Seat Number :
Grade : __________
Remark :
____________________________________________________________________________________________________________________
____________________________________________________________________________________________________________________
____________________________________________________________________
Facilitator (Sign and Date):
F.Y. B. Tech.-EEE Lab 2016
MIT Academy of Engineering, Alandi (D), Pune Page 48
Experiment No. 5
Title: To study Passive components – Resistors, Capacitors & Inductor.
(a) To test semiconducting components – Diode, BJT
(b) To measure various electronic quantities using CRO, Function generator, DMM
Objectives:
1. To Study Passive Components: Resistors, Capacitor, Inductors.
2. To Study different Electronics Measuring Instruments.3.
Theory: Passive Components are the elements which do not introduce gain or do not have a directional
function and are not capable of amplifying or processing an electrical signal.
Passive Components
Resistors Capacitors Inductors
1. Resistors:
A resistor is a two-terminal electronic component designed to oppose an electric current by
producing a voltage drop between its terminals in proportion to the current, that is, in accordance with
Ohm's law: V = IR. The resistance R is equal to the voltage drop V across the resistor divided by the
current I through the resistor.
The primary characteristics of resistors are their resistance and the power they can dissipate.
Other characteristics include temperature coefficient, noise, and inductance. Practical resistors can be
made of resistive wire and various compounds and films, and they can be integrated into hybrid and
printed circuits. Size and position of leads are relevant to equipment designers; resistors must be
physically large enough not to overheat when dissipating their power. Variable resistors, adjustable by
changing the position of a tapping on the resistive element and resistors with a movable tap
("potentiometers"), either adjustable by the user of equipment or contained within, are also used.
Resistors are used as part of electrical networks and electronic circuits. There are special types of
resistor whose resistance varies with various quantities, most of which have names, and articles, of their
own the resistance of thermistors varies greatly with temperature, whether external or due to dissipation, so
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they can be used for temperature or current sensing metal oxide varistors drop to a very low resistance
when a high voltage is applied, making them suitable for over-voltage protection the resistance of a strain
gauge varies with mechanical load; the resistance of photo resistors varies with illumination; the resistance
of a Quantum Tunneling Composite can vary by factor of 10
12
with mechanical pressure applied & so on.
Units
The ohm (symbol: Ω) is a SI-driven unit of electrical resistance, named after Georg Ohm. Commonly used
multiples and submultiples in electrical and electronic usage are the milliohm, kilohm, and megohm.
British Standard BS 1852 and its replacement, BS EN 60062:2005, recommend that the letter R is used for
Ohms, K for Kilohms and M for Megaohms and placed where the decimal point would go.
Examples
R47 0.47 ohms
4R7 4.7 ohms
470R 470 Ohms
4K7 4.7K ohms
47K 47K ohms
47K3 47.3K ohms
470K 470K ohms
Technology
[1] Carbon composition
Carbon composition resistors consist of a solid cylindrical resistive element with embedded wire
lead outs or metal end caps to which the leadout wires are attached, which is protected with paint or plastic.
The resistive element is made from a mixture of finely ground (powdered) carbon and an insulating
material (usually ceramic). A resin holds the mixture together. The resistance is determined by the ratio of
the fill material (the powdered ceramic) and the carbon. Higher concentrations of carbon, a weak
conductor, result in lower resistance. Carbon composition resistors were commonly used in the 1960s and
earlier, but are not so popular for general use now as other types have better specifications, such as
tolerance, voltage dependence, and stress (carbon composition resistors will change value when stressed
with over-voltages).
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[2] Carbon film
A carbon film is deposited on an insulating substrate, and a spiral cut in it to create a long, narrow
resistive path. Varying shapes, coupled with the resistivity of carbon, (ranging from 9 to 40 µΩm) can
provide a variety of resistances. Carbon film resistors feature a power rating range of 1/6 W to 5 W at
70°C. Resistances available range from 1 ohm to 10 mega ohm. The carbon film resistor can operate
between temperatures of -55°C to 155°C. It has 200 to 600 volts maximum working voltage range.
[3] Metal film
A common type of axial resistor today is referred to as a metal-film resistor. MELF (Metal
Electrode Leadless Face) resistors often use the same technology, but are a cylindrically shaped resistor
designed for surface mounting. [Note that other types of resistors, e.g. carbon composition, are also
available in "MELF" packages].
Metal film resistors are usually coated with nickel chromium (NiCr), but might be coated with any
of the cermet materials listed above for thin film resistors. Unlike thin film resistors, the material may be
applied using different techniques than sputtering (though that is one such technique). Also, unlike thin-
film resistors, the resistance value is determined by cutting a helix through the coating rather than by
etching. [This is similar to the way carbon resistors are made.] The result is a reasonable tolerance (0.5, 1,
or 2%) and a temperature coefficient of (usually) 25 or 50 ppm/K.
[4] Wirewound
Wirewound resistors are commonly made by winding a metal wire around a ceramic, plastic, or
fiberglass core. The ends of the wire are soldered or welded to two caps, attached to the ends of the core.
The assembly is protected with a layer of paint, molded plastic, or an enamel coating baked at high
temperature. The wire leads are usually between 0.6 and 0.8 mm in diameter and tinned for ease of
soldering. For higher power wirewound resistors, either a ceramic outer case or an aluminum outer case
on top of an insulating layer is used. The aluminum-cased types are designed to be attached to a heatsink to
dissipate the heat; the rated power is dependent on being used with a suitable heatsink, e.g., a 50 W power
rated resistor will overheat at around one fifth of the power dissipation if not used with a heatsink.
Because wirewound resistors are coils they have more undesirable inductance than other types of resistor,
although winding the wire in sections with alternately reversed direction can minimize inductance.
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[5] Strain gauges
The strain gauge, invented by Edward E. Simmons and Arthur C. Ruge in 1938, is a type of resistor
that changes value with applied strain. A single resistor may be used, or a pair (half bridge), or four
resistors connected in a Wheatstone bridge configuration. The strain resistor is bonded with adhesive to an
object that will be subjected to mechanical strain. With the strain gauge and a filter, amplifier, and
analog/digital converter, the strain on an object can be measured.
[6] Variable resistors.
Presets and potentiometers are commonly used types of variable resistors. These are mostly used
for voltage division and setting the sensitivity of sensors. These have a sliding contact or wiper which can
be rotated with the help of a screw driver to change the resistance value. In the linear type, the change in
resistance is linear as the wiper rotates. In the logarithmic type, the resistance changes exponentially as the
wiper slides. The value is meant to be set correctly when installed in some device, and is not adjusted by
the device's user.
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The variable may have three tabs where the middle tab is the wiper. If all the three tabs are used, it behaves
as a voltage divider. If only wiper tab is used along with another tab, it becomes a variable resistor or
rheostat. If only the side tabs are used, then it behaves as a fixed resistor. These are mostly used for tuning,
voltage division and adjusting sensitivity of sensors.
The variable can have one or two switches in-built where the resistor operates for the ON state of the
switch(s). Such resistors were mostly used for volume control in older TV and radio circuits. There may
also be four-tab variables where the fourth lead is for feedback signal and placed near the first tab. Wire
wound variable resistors are used for very precise control of resistance.
The wiper may also be rotary (as in most presets), sliding or disc shaped (as used in pocket radios for
volume control).
Four-band resistors
Four-band identification is the most commonly used color-coding scheme on all resistors. It consists
of four colored bands that are painted around the body of the resistor. The first two bands encode the first
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two significant digits of the resistance value, the third is a power-of-ten multiplier or number-of-zeroes,
and the fourth is the tolerance accuracy, or acceptable error, of the value. Sometimes a fifth band identifies
the thermal coefficient, but this must be distinguished from the true 5-color system, with 3 significant
digits.
,For example, green-blue-yellow-red is 56×10
4
Ω = 560 kΩ ± 2%. An easier description can be as followed:
the first band, green, has a value of 5 and the second band, blue, has a value of 6, and is counted as 56. The
third band, yellow, has a value of 10
4
, which adds four 0's to the end, creating 560,000Ω at ±2% tolerance
accuracy. 560,000Ω changes to 560 kΩ ±2% (as a kilo- is 10
3
).
Each color corresponds to a certain digit, progressing from darker to lighter colors, as shown in the chart
below
Color 1st 2nd 3
rd
band 4
th
band Temp.
band band (multiplier) (tolerance) Coefficient
Black
0 0 ×10
0
Brown 1 1 ×10
1
±1% (F) 100 ppm
×10
2
Red 2 2 ±2% (G) 50 ppm
Orange 3 3 ×10
3
15 ppm
×10
4
Yellow 4 4 25 ppm
×10
5
Green 5 5 ±0.5% (D)
×10
6
Blue 6 6 ±0.25% (C)
Violet 7 7 ×10
7
±0.1% (B)
×10
8
Gray 8 8 ±0.05% (A)
White 9 9 ×10
9
×10
-1
Gold ±5% (J)
Silver ×10
-2
±10% (K)
None ±20% (M)
Table 1 : Colour band chart for calculating the value of resistor
2. Capacitor
A capacitor or condenser is a passive electrical component consisting of an insulating, or
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dielectric, layer between two conductors. When a voltage potential difference occurs between the
conductors, an electric field occurs in the insulator. This field can be used to store energy, to resonate with
a signal, or to link electrical and mechanical forces. Capacitors are manufactured as electronic components
for use in electrical circuits, but any two conductors linked by an electric field also display this property.
The effect is greatest between wide, flat, parallel, narrowly separated conductors.
An ideal capacitor is characterized by a single constant value, capacitance, the ratio of the amount of
charge in each conductor to the potential difference between them. The unit of capacitance is thus
coulombs per volt, or farads. Higher capacitance indicates that more charge may be stored at a given
energy level, or voltage. In actual capacitors, the insulator allows a small amount of current through, called
leakage current, the conductors add an additional series resistance, and the insulator has an electric field
strength limit resulting in a breakdown voltage.
Charge separation in a parallel-plate capacitor causes an internal electric field. A dielectric (orange)
reduces the field and increases the capacitance.
A capacitor consists of two conductors separated by a non-conductive region. The non-conductive
substance is called the dielectric medium, although this may also mean a vacuum or a semiconductor
depletion region chemically identical to the conductors. A capacitor is assumed to be self-contained and
isolated, with no net electric charge and no influence from an external electric field. The conductors thus
contain equal and opposite charges on their facing surfaces, and the dielectric contains an electric field. The
capacitor is a reasonably general model for electric fields within electric circuits.
The capacitor’s capacitance ( C ) is a measure of the amount of charge ( Q ) stored on each plate for a
given potential difference or voltage ( V ) which appears between plates:
C = Q / V
In SI units, a capacitance of one farad means that one coulomb of charge on each conductor causes
a voltage of one volt across the device.
Applications
1) Energy storage
2) Pulsed power and weapons
3) Power conditioning
4) Power factor correction
5) Supression and coupling
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6) Noise filters and snubbers
7) Motor starters
8) Signal processing
9) Tuned circuits
Figure 2: Types of Capacitor
3. Inductor
An inductor is a passive electrical component that can store energy in a magnetic field created by the
electric current passing through it. An inductor's ability to store magnetic energy is measured by its
inductance, in units of henries.
An "ideal inductor" has inductance, but no resistance or capacitance, and does not dissipate energy. A real
inductor is equivalent to a combination of inductance, some resistance due to the resistivity of the wire, and
some capacitance. At some frequency, usually much higher than the working frequency, a real inductor
behaves as a resonant circuit (due to its self capacitance). In addition to dissipating energy in the resistance
of the wire, magnetic core inductors may dissipate energy in the core due to hysteresis, and at high currents
may show other departures from ideal behavior due to nonlinearity.
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Figure 3: Types of Inductor
Inductance (L) ( measured in henries ) is an effect resulting from the magnetic field that forms around a
current-carrying conductor that tends to resist changes in the current. Electric current through the conductor
creates a magnetic flux proportional to the current. A change in this current creates a change in magnetic
flux that, in turn, by Faraday's law generates an electromotive force (EMF) that acts to oppose this change
in current. Inductance is a measure of the amount of EMF generated for a unit change in current. For
example, an inductor with an inductance of 1 henry produces an EMF of 1 volt when the current through
the inductor changes at the rate of 1 ampere per second. The number of loops, the size of each loop, and the
material it is wrapped around all affect the inductance. For example, the magnetic flux linking these turns
can be increased by coiling the conductor around a material with a high permeability such as iron. This can
increase the inductance by 2000 times, although less so at high frequencies.
Application
1) Inductors are used extensively in analog circuits and signal processing.
2) An inductor is used as the energy storage device in some switched-mode power supplies.
3) Inductors are also employed in electrical transmission systems, where they are used to depress
voltages from lightning strikes and to limit switching currents and fault current. In this field, they are more
commonly referred to as reactors.
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OBSERVATION TABLE:
SR.
NO. Types of Components
Observed
Values
Rating of
Component Symbol
FIXED RESISTORS
1.
VARIABLE RESISTORS
CAPACITORS
2.
INDUCTORS
3.
4. DIODE
5. TRANSISTOR
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(b)To measure various electronic quantities using CRO, Function generator, DMM
OBJECTIVES :
1. To study different controls of DMM and measurement of parameters like AC & DC voltages, DC
current.
2. To study different controls of CRO and measurement of parameters like AC & DC voltages,
frequency and phase.
3. To study different controls of the Signal Generator.
APPARATUS: Signal generator, Function generator, CRO probes, connecting wires, BNC
connectors etc..
THEORY:
Digital MultiMeter (DMM)
A multimeter or a multitester, also known as a volt/ohm meter or VOM, is an electronic measuring
instrument that combines several functions in one unit. A standard multimeter may include features such as
the ability to measure voltage, current and resistance.
A multimeter can be a hand-held device useful for basic fault finding and field service work or a bench
instrument which can measure to a very high degree of accuracy. They can be used to troubleshoot
electrical problems in a industrial and household devices such as batteries, motor controls, appliances,
power supplies, and wiring systems.
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PROCEDURE:
i) Measurement of AC voltage, DC voltage & DC current
1) Connect red test lead to ―V-V‖input terminal and black test lead to―COM‖ input terminal.
2) Set Function/Range switch to desired voltage type (DC or AC) and range. If magnitude of voltage is
not known, set switch to the highest range and reduce until a satisfactory reading is obtained.
3) Turn off power to the device or circuit being tested.
4) Connect test leads to the device or circuit being measured.
5) Turn on power to the device or circuit being measured. Voltage value will appear on the digital display
along with the voltage polarity.
6) Turn off power to the device or circuit being tested prior to disconnecting test leads.
Current Measurement
1) Connect red test lead to the ―mA‖ input terminal for current measurements up to 200 milliamperes.
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Connect black lead to the COM input terminal.
2) Set Function/Range switch to desired current type (DC or AC) and range. If magnitude of current is not
known, set switch to the highest range and reduce until a satisfactory reading is obtained.
3) Turn off power to the device or circuit being tested.
4) Open the circuit in which current is to be measured. Now securely connect test leads in series with the
load in which current is to be measured.
5) Turn on power to the device or circuit being tested.
6) Read current value on digital display.
7) Turn off all power to the device or circuit being tested.
8) Disconnect test leads from circuit and reconnect circuit that was being tested.
9) For current measurement of 200mA or greater, connect the red test lead to ―20 A‖ input terminal &
black test lest lead to the ―COM‖ input terminal.
ii) Diode and Transistor Test Measurements
The special Diode Test Function allows relative measurements of forward voltage drops across diodes
and transistor junctions.
Diode Tests
1) Connect red test lead to ―V-V‖ input terminal and black test lead to COM input terminal.
2) Set Function/Range switch to the diode test position.
3) Connect test leads to the device
4) Read forward voltage drop value on digital display.
Transistor Junction Tests
1) Bipolar transistors can be tested in the same manner as diode, junctions formed between the base and
emitter and the base and collector of the transistor. Measurement between the collector and emitter also
should be made to determine if a short is present.
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Transistor hFE Measurements
1) Transistor must be out of circuit. Set the function/range switch to the hFE position.
2) Plug the emitter, base and collector leads of the transistor into the correct holes in either the NPN or the
PNP transistor test socket, whichever is appropriate for the transistor being checked. Read the hFE
(beta, or DC current gain) in the display.
iii) Resistance Measurements
1) Connect red test lead to V-V input terminal and black test lead to COM input terminal.
2) Set Function/Range switch to desired V position. If magnitude of resistance is not known, set the
switch to highest range and reduce until a satisfactory reading is obtained.
3) If the resistance being measured is part of a circuit, turn off power to the circuit.
4) Connect test leads to the device or circuit being measured.
5) Read resistance value on digital display.
iv) Continuity Test
1) Set Range Switch to ―V Ω mA‖ and Black lead to COM input terminal.
2) Set Range Switch to ―:)))‖ position.
3) Connect test lead to two points of Circuit to be tested.
If the resistance is lower than 30Ω + or – 20 Ω the buzzer will be sound.
Handling of DMM
1) When a meter is connected to major circuit do not touch unused terminal.
2) When a value of parameter to be measured is unknown then select max. range.
3) Before rotating the range selector disconnect test before never performed resister
Measurement line circuit.
F.Y. B. Tech.-EEE Lab 2016
MIT Academy of Engineering, Alandi (D), Pune Page 63
4) While testing the transistor, always leads have been disconnected from the circuit.
5) Components should not be connected to hFE socket while making voltage measurement with test lead.
OBSERVATION TABLE
1. DIGITAL MULTIMETER
Sl. Name of the component
with type Theoretical values Practical values
No.
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Cathode Ray Oscilloscope (CRO)
Figure : Front Panel of CRO
FRONT PANEL CONTROLS OF CRO:
1. POWER ON : Puts the instrument to main supply with LED indication.
2. INTENSITY : Controls the brightness of the display.
3. FOCUS : Controls the sharpness of the display
4. TIME BASE : 18 step switch enable selection of 18 calibrated sweep.
From 0.1µsec/div to 0.2 S/div in 1, 2, 5… sequence.
5. TIME BASE VARIABLE: In calibrated position (CAL the selected sweep speed holds indicated
calibration clockwise. It extends the sweep. Speed by 2.5 times approx.,
with LED indication.
6. HOLD-OFF : Provides 4:1 Hold-Off to enhance HF & Complex Signal
triggering.
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MIT Academy of Engineering, Alandi (D), Pune Page 65
7.
POSITION /X5 control is pulled, it magnifies the sweep 5 times with LED indication.
8. LEVEL : Variable control, Selects the trigger point on the displayed
on the displayed waveform.
9. AUTO/NORM : In Auto mode trace is displayed in absence of any input signal. The
display is then automatically triggered for signals above 30 Hz depending
upon correct setting of trigger LEVEL control.
10. INT/EXT : INT : Display triggers from signals derived from CH1, CH2 or line. EXT
: Triggering from any other external source fed through EXT TRIG BNC
Socket
11. + / - : Selects trigger point on either positive or negative slope of the displayed
waveform.
12. CH1/ CH2 : Selects trigger signal in INT mode derived from either
CH1 Or CH2 inputs
13. ac/dc : Selects trigger signal coupling
14. SWP/ X-Y : When pressed, converts CH2 input into X-channel and enable use of the
scope as on x-y
15. 0.2V. 1KHz : 200mv p-p 1KHz square wave calibration signal.
16. POSITION /X5 : Controls the vertical position of the display. When thiscontrol is pulled, it
magnifies the sweep 5 times with LED indication.
17. ac / dc /gnd : Selects input coupling / grounding.
18. INPUT BNC CH1/Y ( CH2/X) : Input terminals to CH1/Y, CH2/X inputs.
19. DUAL / MONO ( X-Y) : In DUAL , operates as DUAL trace scope .In MONO operates as single
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MIT Academy of Engineering, Alandi (D), Pune Page 66
trace.
20. CHANNEL ADDITION : In DUAL mode, when ADD switch is pressed signals of
CH1 & Ch2 are algebraically added.
21. CHANNEL :In DUAL mode, when ADD & CH2 INV switch is pressed
SUBTRACTIONCH2 signal is algebraically subtracted from CH1.
22. TRACE : Screw driver controls to adjust horizontal tilt of the trace.
23. CTC : Converts scope into a dual component tester/comparator.
24. CT1 & CT II : Input terminals for CH1 component tester/comparator.
25. COM : Common terminal of component tester.
26. LINE : Triggers from power line frequency.
27. TV : Triggers from low frequency component of TV-Signal.
( TV-V or TV-H )
28. ALT / CHOP : Selects switching modes for two channels while in DUAL Operation.
29. CH2 INV : Polarity of the signal to CH2 is inverted.
30. EXTERNAL DC SOURCE:
a) + 5V : Gives + 5V o/p. Negative grounded.
b) : Ground terminal for + 5V o/p
c) + 12 V : Gives + 12V o/p. Common floating.
d) COM : Common Terminal for +/- 12 V o/p
e) - 12 V : Gives - 12V o/p. Common floating.
2. Measurement of Different Parameters:
1) Frequency Measurement:
1. Connect the signal from the signal generator to the Y-input/X-input.
2. Adjust the time base generator switch (time/div) to get a steady pattern of the signal on the
F.Y. B. Tech.-EEE Lab 2016
MIT Academy of Engineering, Alandi (D), Pune Page 67
CRO screen.
3. Measure the time interval T for one cycle.
4. Determine the frequency F of the signal (F=l/T )
5. Repeat the same procedure for different frequencies.
2) DC voltage measurement:
1. Adjust the beam to certain reference level
2. Keep AC/DC selector switch on DC position.
3. Apply test voltage to CRO input.
4. Measure the shift of beam from reference level.
6. Calculate D.C. Voltage No. of divisions on y – axis x Volts/Div.
7. Note down the reading.
3) AC voltage measurement:
1. Keep AC/DC selector switch on AC position.
2. Apply AC voltage from signal generator to CRO input.
3. Measure no. of divisions on y – axis.
4. Calculate A.C. Voltage No. of divisions on y – axis x Volts/Div.
OBSERVATION TABLE:
1) Frequency
measurement:
Sr. No
Applied
Frequency
No. of Divisions
on X axis (a)
Time / Div
factor (b) T=a*b F =1/T
1
2
3
2) AC voltage measurement (Amplitude measurement):
F.Y. B. Tech.-EEE Lab 2016
MIT Academy of Engineering, Alandi (D), Pune Page 68
Sr. No Applied
Voltage
No. of Divisions
on Y axis (a)
Volts / Div
factor (b)
Vpp=a*b Voltage
(RMS)
1
2
3
3) DC voltage measurement:
Sr. No Applied
Voltage
No. of Divisions
on Y axis (a)
Volts / Div
factor (b)
Vdc= a*b
1
2
3
Signal Generator:
Signal Generator provides various signals like sine wave, square wave for different test circuits. Its
frequency range varies from 1Hz to 1MHz with adjustable amplitude, for sine wave 0 to 10V, for square
wave 0 to 20V peak to peak. The output impedance of generator is 600Ω at output level of 1V & below.
The front panel of signal generator is shown in figure 1.
Figure : Front panel of Signal Generator
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Front Panel Controls of Signal Generator:
1. Power On indication:
Red LED glows when power is on.
2. Frequency Multiplier Switch:
Used to select the range of frequency.
3. Frequency Select Dial:
Used to select the desired frequency.
4. Waveform Selection Switch:
Select desired waveform.
5. Amplitude Selection Potentiometer:
Amplitude of selected waveform is adjusted.
6. Output Terminals:
Provides output signal selected by user.
CONCLUSION :
F.Y. B. Tech.-EEE Lab 2016
MIT Academy of Engineering, Alandi (D), Pune Page 70
Laboratory Performance Report
Experiment No. : 06
Title of the Experiment : _______________________________________________________________________
________________________________________________________________________
________________________________________________________________________
Date of Conduction (As per Plan) : / / Actual Data Conduction : / /
Date of Evaluation (As per Plan) : / / Actual Data Evaluation : / /
Roll Number :
Name of the Student :
Exam Seat Number :
Grade : __________
Remark :
____________________________________________________________________________________________________________________
____________________________________________________________________________________________________________________
____________________________________________________________________
Facilitator (Sign and Date):
F.Y. B. Tech.-EEE Lab 2016
MIT Academy of Engineering, Alandi (D), Pune Page 71
AIM : DC Regulated Power Supply:
a) To design 12V/ 05 V IC based DC regulated power supply (Theoretically).
b) To test and observe waveforms at various stages on CRO and measure the voltage
using DMM.
OBJECTIVES:
a) Study of the data sheet specifications of the Rectifier Diode (1N4001-1N4007) from the given
Regulated Power Supply circuit with Bridge Rectifier, Capacitor Filter and 3-terminal Regulator IC
b) Study of the data sheet specifications of the 3-terminal Regulator (LM 79XX/78XX).
c) Measure the voltages and observe the waveforms at transformer’s secondary and at the output of
Bridge Rectifier and Regulator.
THEORY :
DC power supply:
The dc power supply converts the standard ac voltage (230V, 50Hz) into a constant dc voltage. It is
one of the most commonly used electronic circuits. The dc voltage produced by a power supply is used to
power all the types of electronic circuits, such as television, VCRs, CD players and most of laboratory
equipments.
Design of DC power supply (12V):
1. Design of transformer:
The transformer is used to couple the ac voltage from the source to rectifier. Design parameters for
transformer are as below
• Vp (pri) = primary voltage of transformer i.e. input ac voltage
• Vs (sec) =secondary voltage of transformer
• Turns ratio of transformer (n) =Vs (sec)/Vp (pri)
Thus for 12v power supply,
Vp (sec) =15v
Vp (pri) =230v, 50Hz
Thus n=1:15
So as the required rectified voltage is 15V so we have used the 15-0-15 transformer.
2. Design of rectifier:
F.Y. B. Tech.-EEE Lab 2016
MIT Academy of Engineering, Alandi (D), Pune Page 72
The rectifier can be either half wave or full wave. The rectifier converts the ac input voltage to a
pulsating dc voltage. In this design full wave bridge rectifier is used. In the bridge rectifier design the
diodes PIV voltages should be considered.
PIV=peak inverse voltage (specified in diode data sheet)
PIV=Vp (out) + 0.7 here Vp (out) =Vp (sec)-1.4v
So, PIV = 15-0.7 =14.3v
So according to data sheet of rectifier diodes, we can select diodes with PIV ranging from 50V to
1000V. 1N4007 diode is used in our design of power supply with regulated DC output of 12V. Please refer
the Rectifier diodes data sheet.
3. Design for filter:
The filter is simply a capacitor connected from the rectifier to ground. In design of filter following
points are considered.
a) Ripple factor: The variation in capacitor voltage due to the charging and discharging is called as
ripple. Generally ripple is undesirable so smaller the value of ripple better will be the filtering
action. The ripple factor is lower by increasing value of filter capacitor or increasing load
resistance. Thus we have selected value of filter capacitor C=1000uF
4. Design of Voltage Regulator:
F.Y. B. Tech.-EEE Lab 2016
MIT Academy of Engineering, Alandi (D), Pune Page 73
While filters can reduce the ripple from power supplies to a low value, the most effective approach
is a combination of a capacitor-input filter used with a voltage regulator. A voltage regulator is connected
to the output of a filtered rectifier and maintains a constant output voltage (or current) despite changes in
the input, the load current, or the temperature.
The capacitor-input filter reduces the input ripple to the regulator to an acceptable level. The
combination of a large capacitor and a voltage regulator helps produce an excellent power supply.
Most regulators are integrated circuits and have three terminals-an input terminal, an output
terminal and a reference (or adjust) terminal. The input to the regulator is first filtered with a capacitor to
reduce the ripple to < 10%. The regulator reduces the ripple to a negligible amount. In addition, most
regulators have an internal voltage reference, short- circuit protection and thermal shutdown circuitry. They
are available in a variety of voltages, including positive and negative outputs, and can be designed for
variable outputs with a minimum of external components. Typically, voltage regulators can furnish a
constant output of one or more amps of current with high ripple rejection.
Three-terminal regulators designed for fixed output voltages require only external capacitors to complete
the regulation portion of the power supply, as shown below.
Filtering is accomplished by a large-value capacitor between the input voltage and ground. An output
capacitor (typically 0.1 J.LF to 1.0 J.LF) is connected from the output to ground to improve the
transient response.
A basic fixed power supply with a +12 V voltage regulator is shown in Figure 3.
15-0-15
F.Y. B. Tech.-EEE Lab 2016
MIT Academy of Engineering, Alandi (D), Pune Page 74
LM 7812
230 V, 50 Hz
15 V 12 V DCAC
D1-D4 is 1N4007 Rectifier diodes
C1: 1000µF, C2: 100µF
Figure 3: A basic +12V regulated power supply
Refer to the technical data sheet of LM78XX as a Voltage Regulator.
PROCEDURE:
A) Measurement of Transformer’s Secondary voltage
1. Connect the primary of the transformer to the ac mains & measure the ac voltage across the
Transformer’s secondary on the DMM.
2. Observe the waveform across the transformer’s secondary on the CRO.
B) Measurement of rectified voltage across bridge rectifier
1) Measure the pulsating DC voltage on DMM
2) Observe the rectified output voltage on the CRO.
Vdc = Vrms * 1.4142
C) Measurement of output across the Capacitor Filter
1) Measure the filtered pulsating DC voltage on DMM
2) Observe the filtered output voltage on the CRO.
D) Measurement of Regulated output at 3-pin Voltage Regulator IC (LM-7812)
1) Measure the regulated DC voltage on DMM
2) Observe the DC voltage on CRO.
RESULTS : OBSERVATION TABLE
A) DIGITAL MULTIMETER
Sl.
Output Stages Vac (RMS Volts) Vdc (Volts)
No.
F.Y. B. Tech.-EEE Lab 2016
MIT Academy of Engineering, Alandi (D), Pune Page 75
01. Transformer’s Secondary
02. Bridge Rectifier O/P without Filter
03.
Bridge Rectifier O/P with
Capacitor Filter
04. IC Regulator
THINK PAIR SHARE
Component Rating Particulars Value (12V) Value (5V)
Transformer V L rms
Diode V L dc
Capacitor V L dc
IC Regulator V L dc
CONCLUSION :
F.Y. B. Tech.-EEE Lab 2016
MIT Academy of Engineering, Alandi (D), Pune Page 76
Laboratory Performance Report
Experiment No. : 07
Title of the Experiment : _______________________________________________________________________
________________________________________________________________________
________________________________________________________________________
Date of Conduction (As per Plan) : / / Actual Data Conduction : / /
Date of Evaluation (As per Plan) : / / Actual Data Evaluation : / /
Roll Number :
Name of the Student :
Exam Seat Number :
Grade : __________
Remark :
____________________________________________________________________________________________________________________
____________________________________________________________________________________________________________________
____________________________________________________________________
Facilitator (Sign and Date):
F.Y. B. Tech.-EEE Lab 2016
MIT Academy of Engineering, Alandi (D), Pune Page 77
AIM : Combinational Digital Circuits:
(a) To design and implement half adder and Full adder (using Half adder).
(b) To design and implement 8:1 MUX using IC-74LS153 and verify its truth table.
OBJECTIVES:
a) Identify pins of Digital Logic gate IC’s such as AND,OR,NOT,NAND,EX-OR
b) Implement Half and Full Adder Circuits using the Digital Logic gates and verify truth table.
c) Implement 8:1 MUX using IC-74LS153 and Verify truth table
THEORY:
Introduction to Adders:
In electronics, an adder or summer is a digital circuit that performs addition of numbers. In many
computers and other kinds of processors, adders are used not only in the arithmetic logic unit(s), but also in
other parts of the processor, where they are used to calculate addresses, table indices, and similar.
Although adders can be constructed for many numerical representations, such as binary-coded
decimal or excess-3, the most common adders operate on binary numbers.
Half Adder
A half adder (HA) is an arithmetic circuit that is used to add two bits. The block diagram of HA is
shown. It has two inputs and two outputs.
The inputs of the HA are the 2 bits to be added; the augend, and addend. The output is the result of
this addition, i.e. a sum bit (S) and a carry bit (C).
F.Y. B. Tech.-EEE Lab 2016
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Table 1: Truth table of Half Adder.
The truth table of HA is shown above. The Boolean functions for the two outputs can be obtained
from the truth table which are:
Thus, the HA can be implemented using one XOR gate and one AND gate as shown in the Figure1
Figure1. Circuit Diagram of Half Adder
Full Adder
A full adder (FA) is an arithmetic circuit that is used to add three bits. The block diagram of FA is
shown. It has three inputs and two outputs.
F.Y. B. Tech.-EEE Lab 2016
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The inputs of the FA are the 3 bits to be added, and carry from previous lower significant position. The
output is the result of this addition, i.e. a sum bit (S) and a carry bit (C).
Table 2: Truth table of Full Adder.
The truth table of FA is shown above. The simplified Boolean functions for the two outputs can be
obtained from the truth table, which are:
Figure 3: Implementation of Full Adder using Half Adders
F.Y. B. Tech.-EEE Lab 2016
MIT Academy of Engineering, Alandi (D), Pune Page 80
F.Y. B. Tech.-EEE Lab 2016
MIT Academy of Engineering, Alandi (D), Pune Page 81
PROCEDURE:
A) To verify the truth table of Half Adder and Full Adder.
1. Make the connections as shown in figure 1 and figure 2.
2. Apply +5 V DC supply as VCC and GND to the respective pins of the digital ICs used- 7408 (2-input
AND Gate), 7432 (2-input OR Gate) and 7486 (2-input EX-OR Gate).
3. Verify the functionality according to the truth tables for Half Adder and Full Adder as shown
in table 1 and table 2.
Multiplexer or Data Selector:
A multiplexer is a device that allows digital information from several sources to be routed onto a single line for
transmission over that line to a common destination. The basic multiplexer has several data input lines and a
single output line. It also has data selector inputs, which permit digital data on any one of the inputs to be
switched to the output line. Multiplexers are also known as data selector.
Note from the table that when C is 1, output is connected to the input B and in that case the state of input at A
does not have any effect on the output Y. Similarly when C is 0, output is connected to the input A. Following
is the top view of IC 74LS153 which is a dual 4 line to 1 line Multiplexer (i.e it contains two 4 line to 1 line
MUX). Its internal circuit diagram is also given.
F.Y. B. Tech.-EEE Lab 2016
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Exercise:
Implement the following logic using IC 74Ls153
F (A, B) = Σ (1,3)
Truth Table
A B Y
0 0 0 (1C0=0)
0 1 1 (1C1=1)
1 0 0 (1C2=0)
1 1 1 (1C3=1)
Exercise:
Implement a 8 line to 1 line MUX using two 4 line to 1 line MUX (found in IC
74153) and an OR gate.
F.Y. B. Tech.-EEE Lab 2016
MIT Academy of Engineering, Alandi (D), Pune Page 83
Space for exercise :
CONCLUSION:
F.Y. B. Tech.-EEE Lab 2016
MIT Academy of Engineering, Alandi (D), Pune Page 84
F.Y. B. Tech.-EEE Lab 2016
MIT Academy of Engineering, Alandi (D), Pune Page 85
Laboratory Performance Report
Experiment No. : 08
Title of the Experiment : _______________________________________________________________________
________________________________________________________________________
________________________________________________________________________
Date of Conduction (As per Plan) : / / Actual Data Conduction : / /
Date of Evaluation (As per Plan) : / / Actual Data Evaluation : / /
Roll Number :
Name of the Student :
Exam Seat Number :
Grade : __________
Remark :
____________________________________________________________________________________________________________________
____________________________________________________________________________________________________________________
____________________________________________________________________
Facilitator (Sign and Date):
F.Y. B. Tech.-EEE Lab 2016
MIT Academy of Engineering, Alandi (D), Pune Page 86
AIM : OP-AMP Applications
(a) To verify operations of inverting and non inverting amplifier for various gain factors.
(b) To verify application of OPAMP as summing and difference amplifier.
(c) To verify the application of OPAMP as voltage follower.
OBJECTIVES:
a) Identify pins of LM-741.
b) Implement OP-AMP based Inverting and non inverting Amplifier.
c) Verify application of OPAMP as summing and difference amplifier
d) Verify application of OPAMP as voltage follower
THEORY:
Inverting Amplifier:
An op-amp connected as an inverting amplifier with a controlled amount of voltage gain is shown
in Figure (a). The input signal is applied through a series input resistor Ri to the inverting (-) input. Also,
the output is fed back through Rf to the same input. The non- inverting (+) input is grounded.
Figure (a): Inverting amplifier.
At this point the ideal op-amp parameters are useful in simplifying the analysis of this circuit. In particular,
the concept of infinite input impedance is of great value. An infinite input impedance implies zero current
at the inverting input. If there is zero current through the input impedance, then there must be no voltage
drop between the in-verting and noninverting inputs. This means that the voltage at the inverting (-) input is
zero.
because the non inverting (+) input is grounded. This zero voltage at the inverting input terminal is referred
F.Y. B. Tech.-EEE Lab 2016
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to as virtual ground. This condition is illustrated in Figure (b).
Figure (b): Virtual Ground Figure (c): Iin = If and current at the inverting
Input (I1) is O.
Since there is no current at the inverting input, the current through Ri and the current
through Rf are equal, as shown in Figure (c).
The voltage across Ri equals Vin because the resistor is connected to virtual ground at the inverting input
of the op-amp_ Therefore,
Also, the voltage across RF equals - Vout, because of virtual ground, and therefore,
Of course, Vout/Vin is the overall gain of the inverting (I) amplifier.
Above equation shows that the dosed-loop voltage gain of the inverting amplifier Acl(I)
F.Y. B. Tech.-EEE Lab 2016
MIT Academy of Engineering, Alandi (D), Pune Page 88
is the ratio of the feedback resistance (Rf ) to the input resistance (Ri). The closed-loop gain is
independent of the op-amp's internal open-loop gain. Thus, the negative feedback stabilizes the voltage
gain. The negative sign indicates inversion.
PROCEDURE:
A) To measure the output voltage of inverting amplifier implemented using IC 741 and to
observe the output waveform on CRO.
1. Make the circuit connections as shown in figure (a) with Rf= 5KΩ and R1=1KΩ
2. Apply dual power supply of +12V and -12 V DC supply as +VCC and -VEE (pin no. 7 and pin no. 4
of IC 741).
3. Observe the output waveform on OUT Pin (Pin no: 6 of 741 op- amp) on CRO.
4. Calculate the output voltage for inverting amplifier
RESULTS : OBSERVATION TABLE ON CRO
Output voltages for inverting amplifier using the IC-741
Sl. Input Voltage
Voltage Gain
Output Voltage
No. (VIN) (VOUT)
01.
02.
Output voltages for non inverting amplifier using the IC-741
Sl. Input Voltage
Voltage Gain
Output Voltage
No. (VIN) (VOUT)
01.
02.
F.Y. B. Tech.-EEE Lab 2016
MIT Academy of Engineering, Alandi (D), Pune Page 89
THEORY: SUMMING AMPLIFIERS:
The summing amplifier is an application of the inverting op-amp configuration. A summing
amplifier has two or more inputs, and its output voltage is proportional to the negative of the algebraic sum
of its input voltages
SUMMING AMPLIFIER WITH UNITY GAIN:
A two-input summing amplifier is shown in Figure (a), but any number of inputs can be used. The
operation of the circuit and derivation of the output expression are as follows. Two voltages, VIN1 and
V1N2, are applied to the inputs and produce currents I1 and I2 , as shown below.
Figure (a). Two-input inverting summing amplifier.
R1=R2=Rf = 1KΩ
Using the concepts of infinite input impedance and virtual ground, you can see that the inverting
(-) input of the op-amp is approximately 0 V, and there is no current at the input. This means that both
input currents II and I combine at this summing point and form the total current (IT)' which goes through
Rf' as indicated in Figure (a)
Since VOUT = -IT*Rf, the following steps apply:
If all three of the resistors are equal (R1 = R 2 = Rf = R), then
The previous equation shows that the output voltage has the same magnitude as the sum of the two
input voltages but with a negative sign, indicating inversion.
A general expression is given in following equation for a unity-gain summing amplifier with n
F.Y. B. Tech.-EEE Lab 2016
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inputs, as shown in Figure (b) where all resistors are equal in value.
Figure (b): Summing amplifier with n inputs.
Figure (c): Two-input inverting summing amplifier.
APPLICATIONS OF SUMMING AMPLIFIERS:
• Averaging amplifiers
• Scaling adder
• D/A Conversion
DIFFERENTIAL AMPLIFIER:
Thus far we have used only one of the operational amplifiers inputs to connect to the amplifier,
using either the "inverting" or the "non-inverting" input terminal to amplify a single input signal with the
other input being connected to ground. But we can also connect signals to both of the inputs at the same
time producing another common type of operational amplifier circuit called a Differential Amplifier.
F.Y. B. Tech.-EEE Lab 2016
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Basically, as we saw in the first tutorial about operational amplifiers, all op-amps are "Differential
Amplifiers" due to their input configuration. But by connecting one voltage signal onto one input terminal
and another voltage signal onto the other input terminal the resultant output voltage will be proportional to
the "Difference" between the two input voltage signals of V1 and V2.
Then differential amplifiers amplify the difference between two voltages making this type of
operational amplifier circuit a Subtractor unlike a summing amplifier which adds or sums together the
input voltages. This type of operational amplifier circuit is commonly known as a Differential Amplifier
configuration and is shown below:
Figure (d): Differential Amplifier
R1=R2=Rf = 1KΩ
By connecting each input in turn to 0v ground we can use superposition to solve for the output voltage
Vout. Then the transfer function for a Differential Amplifier circuit is given as:
F.Y. B. Tech.-EEE Lab 2016
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By connecting each input in turn to 0v ground we can use superposition to solve for the output voltage Vout.
Then the transfer function for a Differential Amplifier circuit is given as:
When resistors, R1 = R2 and R3 = R4 the above transfer function for the differential amplifier can
be simplified to the following expression:
Differential Amplifier Equation
If all the resistors are all of the same ohmic value, that is: R1 = R2 = R3 = R4 then the circuit will become
a Unity Gain Differential Amplifier and the voltage gain of the amplifier will be exactly one or unity.
Then the output expression would simply be Vout = V2 - V1.
PROCEDURE:
A) To measure the output voltage of summing and difference amplifiers implemented using IC
741 and to observe the output waveform on CRO.
1. Make the circuit connections as shown in figure (a) and figure (d).
2. Apply dual power supply of +12V and -12 V DC supply as +VCC and -VEE (pin no. 7 and pin no. 4
F.Y. B. Tech.-EEE Lab 2016
MIT Academy of Engineering, Alandi (D), Pune Page 93
of IC 741).
3. Observe the output waveform on OUT Pin (Pin no: 6 of 741 op- amp) on CRO.
4. Calculate the output voltages for both the summing and difference amplifier
RESULTS : OBSERVATION TABLE ON CRO
Output voltages for summing and difference amplifier using the IC-741
Application
Sr.
No.
VIN1 VIN2 VOUT
SUMMING
AMPLIFIER
1.
2.
3.
DIFFERENCE
1.
AMPLIFIER
2.
3.
CONCLUSION:

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Lab manual for Basic electrical and electronics engineering for first year

  • 1. F.Y. B. Tech.-EEE Lab 2016 MIT Academy of Engineering, Alandi (D), Pune Page 1 LAB MANUAL Electrical and Electronics Engineering F.Y. B. Tech (2016-17)
  • 2. F.Y. B. Tech.-EEE Lab 2016 MIT Academy of Engineering, Alandi (D), Pune Page 2 Rules & Regulation Laboratory session is an integral part of the subject taught in the classes. By attending lab session, students will have opportunity to conduct experiments and to be exposed to the practical aspects of the subject. Experiments allow students to apply and test the theory learned in the class, which will help strengthen the understanding of the subject. It is therefore an important part of learning activities that all students must participate in. This guideline serves as a policy, rules and regulations that all students must follow when they use the lab and when attending lab sessions. 1. Participation in the lab session is compulsory to all students who have registered for the subject. 2. Attendance will be taken during the experiment. Only students who have attended the lab session are allowed to submit Lab reports. 3. Lab report must be submitted to the Lab facilitator. Students are generally allowed one week to submit the lab report, it will be treated as on-time submission. 4. With late mark report may be accepted max upto two weeks, but report will not be checked after two weeks of completing the concerned practical. 5. Lab report is an individual work. Fabricating result and copying report of others are strictly prohibited. 6. Students are expected to study the lab sheet as a preparation before coming to the lab session. Instructors may conduct on the spot evaluation during lab session. 7. Lab instructor may conduct briefing to the students at the start of the experiment. This briefing includes the procedure, technical and safety aspect of the experiment. 8. Experiment must be completed within the designated time.
  • 3. F.Y. B. Tech.-EEE Lab 2016 MIT Academy of Engineering, Alandi (D), Pune Page 3 INDEX Experiment No Title of Experiment Page No. GROUP A 1. Verification of Kirchhoff’s laws and Superposition theorem (a) To develop a circuit for Kirchhoff’s laws and Superposition theorem. (b) To build circuit and test it. 2. R-L-C series A.C. circuit (a) To calculate exact values of R, Land C (b) To find power losses in R, L and C. 3 Verification of relation between Line and Phase quantities in Star and Delta circuits (a) To understand Line & Phase quantities and types of connection along with Three phase supply (b) To connect Bulb load in Star connection and verify the relation. (c) To connect Bulb load in Delta connection and verify the relation. 4 Load test on D.C. Shunt Motor. (a) To find the torque and output power of motor (b) To calculate the efficiency of motor. GROUP B 5 To study Passive components – Resistors, Capacitors, Inductors a) To test semiconducting components – Diode b)To measure various electronic quantities using CRO 6 DC Regulated Power Supply a) To design 12V IC based DC regulated power supply (Theoretical). b) To test and observe waveforms at various stages on CRO and measure the voltage using DMM.
  • 4. F.Y. B. Tech.-EEE Lab 2016 MIT Academy of Engineering, Alandi (D), Pune Page 4 7 Combinational Digital Circuits a) To design and implement Half adder and Full adder (using Half adder). b) To design and implement 8:1 MUX using IC-74LS153 and verify its truth table. 8 OP-AMP Applications a) To verify operations of inverting and non inverting amplifier for various gain factors. b) To verify application of OPAMP as summing and difference amplifier. c) To verify the application of OPAMP as voltage follower.
  • 5. F.Y. B. Tech.-EEE Lab 2016 MIT Academy of Engineering, Alandi (D), Pune Page 5 Rubrics [Evaluation Parameters] Excellent (2 M) Good (1.5 M) Satisfactory (1 M) Unsatisfactory(0 M) Delivery • Completed between 90- 100% of the requirements. • Submitted on time. • Completed between 80-90% of the requirements. • Submitted on time, and in correct • Completed between 70-80% of the requirements. • Submitted on time, and in correct format • Completed less than 70% of the requirements. • Not delivered on time or not in correct format Coding Standards • Includes name, date, and assignment title. • Excellent Comments. • Creatively organized work. • Includes name, date, and assignment title. • Good use of Comments • Organized work. • Includes name, date, and assignment title. • White space makes program fairly easy to read. • No name, date, or assignment title included • Poor use of white space (indentation, blank lines). Documentation • Clearly and effectively documented including descriptions of all variables. • Clearly documented including descriptions of all variables. • • Basic documentation has been completed including descriptions of all variables. • Purpose is noted for each function. • No documentation included. Runtime • Executes without errors excellent user prompts, good use of symbols, spacing in output. • output from test cases is included. • Executes without errors. • User prompts are understandable, minimum use of symbols or spacing in output. • • Executes without errors. • User prompts contain little information, poor design. • Some testing has been completed. • Does not execute due to errors. • User prompts are misleading or non- existent. • No testing has been completed. Efficiency • Solution is efficient, easy to understand, and maintain. • Solution is efficient and easy to follow (i.e. no confusing tricks). • A logical solution that is easy to follow but it is not the most efficient. • A difficult and inefficient solution.
  • 6. F.Y. B. Tech.-EEE Lab 2016 MIT Academy of Engineering, Alandi (D), Pune Page 6 Laboratory Performance Report Experiment No. : 01 Title of the Experiment : _______________________________________________________________________ ________________________________________________________________________ ________________________________________________________________________ Date of Conduction (As per Plan) : / / 201 Actual Data Conduction : / / 201 Date of Evaluation (As per Plan) : / /201 Actual Data Evaluation : / / 201 Roll Number : Name of the Student : Exam Seat Number : Grade : __________ Remark : ____________________________________________________________________________________________________________________ ____________________________________________________________________________________________________________________ ____________________________________________________________________ Facilitator (Sign and Date):
  • 7. F.Y. B. Tech.-EEE Lab 2016 MIT Academy of Engineering, Alandi (D), Pune Page 7 Experiment No.:- 01 CIRCUIT DIAGRAM Part a):- Kirchhoff’s Laws Kirchhoff’s Point Law or Current Law (KCL):-
  • 8. F.Y. B. Tech.-EEE Lab 2016 MIT Academy of Engineering, Alandi (D), Pune Page 8 TITLE: - Kirchhoff’s laws and Superposition theorem AIM: - Verification of - a) Kirchhoff’s laws and b) Superposition theorem APPARATUS: - Circuit Board, Dual Power DC Supply, Multimeter, Probes THEORY:- Part a):- Kirchhoff’s Laws (After Gustavo Robert Kirchhoff (1824 - 1887), an outstanding German Physicist):- These laws are more comprehensive than Ohm's law and are used for solving electrical networks which may not be readily solved by the latter. Kirchhoff’s laws, two in number, are particularly useful (a) In determining the equivalent resistance of a complicated network of conductors and (b) For calculating the currents flowing in the various conductors. 1) Kirchhoff’s Point Law or Current Law (KCL):- In any electrical network, the algebraic sum of the currents meeting at a point (or junction) is zero. Put in another way, it simply means that - The total current leaving a junction is equal to the total current entering that junction. It is obviously true because there is no accumulation of charge at the junction of the network. Consider the case of a few conductors meeting at a point A as in Fig. (a) shown below. Some conductors have currents leading to point A, whereas some have currents leading away from point A. Assuming the incoming currents to be positive and the outgoing currents negative, we have I1 + (-I2) + (-I3) + I4 + (-I5) = 0 or I1 + I4 + (-I2) + (-I3) + (-I5) = 0 or I1 + I4 = I2 + I3 + I5 or Incoming currents = Outgoing currents
  • 9. F.Y. B. Tech.-EEE Lab 2016 MIT Academy of Engineering, Alandi (D), Pune Page 9 Similarly, in Fig. (b) for node A I + (-I1 ) + (-I2) + (-I3) + (-I4) = 0 or I = I1 + I2 + I3 + I4 or Incoming currents = Outgoing currents We can express the above conclusion as - At a junction ∑ 0 2) Kirchhoff's Mesh Law or Voltage Law (KVL):- The algebraic sum of the products of currents and resistances in each of the conductors in any closed path (or mesh) in a network plus the algebraic sum of the e.m.f.s in that path is zero. In other words, round a mesh ∑ ∑ 0 It should be noted that algebraic sum is the sum which takes into account the polarities of the voltage drops. The basis of this law is this: - If we start from a particular junction and go round the mesh till we come back to the starting point, then we must be at the same potential with which we started. Hence, it means that all the sources of e.m.f. met on the way must necessarily be equal to the voltage drops in the resistances, every voltage being given its proper sign, plus or minus. Determination of Voltage Sign:- In applying Kirchhoff's laws to specific problems, particular attention should be paid to the algebraic signs of voltage drops and e.m.fs., otherwise results will come out to be wrong. Following sign conventions is suggested:- (a) Sign of Battery E.M.F. :- A rise in voltage should be given a + ve sign and a fall in voltage a -ve sign. Keeping this in mind, it is clear that as we go from the -ve terminal of a battery to it’s +ve terminal (Refer above Fig.), there is a rise in potential, hence this voltage should be given a + ve sign. If, on the other hand, we go from +ve terminal to -ve terminal, then there is a fall in potential, hence this voltage should be given a -ve sign. It is important to note that the sign of the battery e.m.f. is independent of the direction of the current through that branch.
  • 10. F.Y. B. Tech.-EEE Lab 2016 MIT Academy of Engineering, Alandi (D), Pune Page 10 CIRCUIT DIAGRAM Part b):- Superposition Theorem:- 1. Original Circuit:-
  • 11. F.Y. B. Tech.-EEE Lab 2016 MIT Academy of Engineering, Alandi (D), Pune Page 11 (b) Sign of IR Drop:- Now, take the case of a resistor. If we go through a resistor in the same direction as the current, then there is a fall in potential because current flows from a higher to a lower potential. Hence, this voltage fall should be taken -ve. However, if we go in a direction opposite to that of the current, then there is a rise in voltage. Hence, this voltage rise should be given a +ve sign. It is clear that the sign of voltage drop across a resistor depends on the direction of current through that resistor but is independent of the polarity of any other source of e.m.f. in the circuit under consideration. Consider the closed path ABCDA in the following Fig. We have to mark +ve and –ve across resistors according to direction of current flowing through it. The terminal of resistor where the current is entering is marked as +ve and the terminal from where current is leaving is marked as –ve as shown. Assume any direction of travel around the loop. In this case let us travel around the mesh in the clockwise direction. Different voltage drops will have the following signs:- I1R1 is - ve (fall in potential) I2R2 is - ve (fall in potential) I3R3 is + ve (rise in potential) I4R4 is - ve (fall in potential) E2 is - ve (fall in potential) E1 is + ve (rise in potential) Using Kirchhoff's voltage law, we get
  • 12. F.Y. B. Tech.-EEE Lab 2016 MIT Academy of Engineering, Alandi (D), Pune Page 12 CIRCUIT DIAGRAM Part b):- Superposition Theorem:- 2. Step 1 Circuit:-
  • 13. F.Y. B. Tech.-EEE Lab 2016 MIT Academy of Engineering, Alandi (D), Pune Page 13 - I1R1 - I2R2 + I3R3 - I4R4 - E2 + E1 = 0 or I1R1 + I2R2 - I3R3 + I4R4 = E1 - E2 Assumed Direction of Current:- In applying Kirchhoff's laws to electrical networks, the question of assuming proper direction of current usually arises. The direction of current flow may be assumed either clockwise or anticlockwise. If the assumed direction of current is not the actual direction, then on solving the question, this current will be found to have a minus sign. If the answer is positive, then assumed direction is the same as actual direction. However, the important point is that once a particular direction has been assumed, the same should be used throughout the solution of the question. Part b):- Superposition Theorem:- According to this theorem, if there are numbers of emf’s acting simultaneously in any linear bilateral network, then each emf acts independently of the others i.e. as if the other emf’s did not exist. The value of current in any conductor is the algebraic sum of the currents due to each emf. Similarly, voltage across any conductor is the algebraic sum of the voltages which each emf would have produced while acting singly. In other words, current in or voltage across, any conductor of the network is obtained by superimposing the currents and voltages due to each emf in the network. It is important to keep in mind that this theorem is applicable only to linear networks where current is linearly related to voltage as per Ohm's law. Hence, this theorem may be stated as follows: In a linear network containing more than one source of emf, the current in any branch is the algebraic sum of all the currents, that would have been produced by each source of emf taken separately, with all other sources of emf being replaced meanwhile by their respective internal resistances. In case the internal resistance of a source is not given, it may be assumed as negligible. To illustrate the theorem, consider the circuit given below. Follow the following steps to find the current flowing through various branches. Let the current flowing through R1 branch is I1, R2 branch is I2 and R3 branch is I3.
  • 14. F.Y. B. Tech.-EEE Lab 2016 MIT Academy of Engineering, Alandi (D), Pune Page 14 CIRCUIT DIAGRAM Part b):- Superposition Theorem:- 3. Step 2 Circuit:-
  • 15. F.Y. B. Tech.-EEE Lab 2016 MIT Academy of Engineering, Alandi (D), Pune Page 15 Step 1:- a) Replace E2 by its internal resistance. (If internal resistance is not given remove E2 and put a short across the removed terminals.) b) Find the current flowing through all branches. (Mark these current with another notation e.g. I1’) Step 2:- a) Replace E1 by its internal resistance. (If internal resistance is not given remove E1 and put a short across the removed terminals.)
  • 16. F.Y. B. Tech.-EEE Lab 2016 MIT Academy of Engineering, Alandi (D), Pune Page 16 OBSERVATION TABLE Part a):- Kirchhoff’s Laws:- 1. Kirchhoff’s Point Law or Current Law (KCL):- Current Through R1 = I1 Current Through R2 = I2 Current Through R3 = I3 2. Kirchhoff's Mesh Law or Voltage Law (KVL):- E1 E2 Voltage Drop across R1 = I1R1 Voltage Drop across R2 = I2R2 Voltage Drop across R3 = I3R3 Part b):- Superposition Theorem:- Current Through R1 Current Through R2 Current Through R3 Original Circuit I1 = I2 = I3 = Step 1 Circuit I1’ = I2’ = I3’ = Step 2 Circuit I1’’ = I2’’ = I3’’ =
  • 17. F.Y. B. Tech.-EEE Lab 2016 MIT Academy of Engineering, Alandi (D), Pune Page 17 b) Find the current flowing through all branches. (Mark these current with another notation e.g. I1’’) Step 3:- The Resultant current through R1 = I1 = + I1’ – I1’’ The Resultant current through R2 = I2 = - I2’ + I2’’ The Resultant current through R1 = I3 = + I3’ + I3’’ PROCEDURE:- Part a):- Kirchhoff’s Laws:- 1. Kirchhoff’s Point Law or Current Law (KCL):- a) Connect the circuit as shown in the KCL circuit diagram. b) Apply some voltage to the circuit. c) Measure current flowing through all branches using multimeter. d) Switch off the power supply.
  • 18. F.Y. B. Tech.-EEE Lab 2016 MIT Academy of Engineering, Alandi (D), Pune Page 18 2. Kirchhoff's Mesh Law or Voltage Law (KVL):- a) Connect the circuit as shown in the KCL circuit diagram. b) Apply some voltage to the circuit. c) Measure the current through all branches using multimeter. d) Switch off the power supply. Part b):- Superposition Theorem:- 1. Original Circuit:- a) Connect the circuit as shown in the given circuit diagram. b) Apply some voltage to the circuit. c) Measure the current flowing through all branches using multimeter. d) Switch off the power supply. 2. Step 1 Circuit:- a) Connect the circuit as shown in the step 1 circuit diagram. b) Apply some voltage to the circuit. c) Measure the current flowing through all branches using multimeter. d) Switch off the power supply. 3. Step 2 Circuit:- a) Connect the circuit as shown in the step 2 circuit diagram. b) Apply some voltage to the circuit. c) Measure the current flowing through all branches using multimeter. d) Switch off the power supply.
  • 19. F.Y. B. Tech.-EEE Lab 2016 MIT Academy of Engineering, Alandi (D), Pune Page 19 RESULT:- Part a):- Kirchhoff’s Laws:- 1. Kirchhoff’s Point Law or Current Law (KCL):- 2. Kirchhoff's Mesh Law or Voltage Law (KVL):- Part b):- Superposition Theorem:- CONCLUSION:-
  • 20. F.Y. B. Tech.-EEE Lab 2016 MIT Academy of Engineering, Alandi (D), Pune Page 20 Laboratory Performance Report Experiment No. : 02 Title of the Experiment : _______________________________________________________________________ ________________________________________________________________________ ________________________________________________________________________ Date of Conduction (As per Plan) : / / 201 Actual Data Conduction : / / 201 Date of Evaluation (As per Plan) : / /201 Actual Data Evaluation : / / 201 Roll Number : Name of the Student : Exam Seat Number : Grade : __________ Remark : ____________________________________________________________________________________________________________________ ____________________________________________________________________________________________________________________ ____________________________________________________________________ Facilitator (Sign and Date):
  • 21. F.Y. B. Tech.-EEE Lab 2016 MIT Academy of Engineering, Alandi (D), Pune Page 21 Experiment No.:- 02 CIRCUIT DIAGRAM
  • 22. F.Y. B. Tech.-EEE Lab 2016 MIT Academy of Engineering, Alandi (D), Pune Page 22 TITLE: - RLC Series circuit AIM: - To study a RLC series circuit under conditions of lagging power factor & leading power factor APPARATUS: - Single phase Auto-Transformer, Rheostat, Inductor, Capacitor, Multimeter, Probes THEORY:- The following fig (a) shows a circuit in which a resistor R, an inductor L and a capacitor C connected in series. AC supply voltage V is applied to this series combination. Let, VR = IR = the voltage drop across the resistor R This VR will be in phase with the supply current I VL = IXL = the voltage drop across the inductor L This VL will be leading the supply current I by 90° VC = IXC = the voltage drop across the capacitor C This VC will be lagging the supply current I by 90° Fig (b) gives the voltage triangle.
  • 23. F.Y. B. Tech.-EEE Lab 2016 MIT Academy of Engineering, Alandi (D), Pune Page 23 OA represents VR, AB and AC represents the inductive and capacitive drops respectively. It will be seen that VL and VC are 180° out of phase with each other i.e. they are in direct opposition to each other. Subtracting BD (=AC) from AB, we get the net reactive drop AD = I (XL – XC) The applied voltage V is represented by OD and is the vector sum of OA and AD. ( ) ( − ) ( ) ( − ) ( ) ( − ) ( ) ( ) The term ( ) ( − ) is known as the impedance of the circuit. Obviously, (Impedance) 2 = (Resistance) 2 + (Net Reactance) 2 Or Z2 = R2 + (XL – XC) 2 Z2 = R2 + X2 where X = Net Reactance
  • 24. F.Y. B. Tech.-EEE Lab 2016 MIT Academy of Engineering, Alandi (D), Pune Page 24 Refer following Figure. Phase angle Φ is given by ∅ ( − ) ∅ Power factor is given by ! ∅ ! ∅ ( − ) ! ∅ √ Hence it is seen that if the equation of the applied voltage is # $sin( Then, equation of the resulting current in an RLC circuit is given by $sin (( ) ∅) The positive sign is to be used when the current leads the applied voltage i.e. when XC > XL. The negative sign is to be used when the current lags the applied voltage i.e. when XL > XC. In general, the current leads or lags the supply voltage by an angle Φ such that tan ∅ , - . Using symbolic notation, we have, Z = R + j (XL – XC)
  • 25. F.Y. B. Tech.-EEE Lab 2016 MIT Academy of Engineering, Alandi (D), Pune Page 25 Refer the following figure Numerical value of the impedance is given by ( ) ( − ) Its phase angle is given by ∅ ./ ( − ) Therefore, we can write the impedance as ∠ ./ ( − ) ∠ ./ If V = V ∠ 0°, then Thus, when a resistance, an inductance and a capacitor are connected in series, the nature of the overall power factor, whether lagging or leading or unity depends upon the values of the capacitive reactance and the inductive reactance. Case-1: When the inductive reactance is greater than the capacitive reactance, the net reactance of the circuit becomes inductive and hence, the overall p.f. is lagging; i.e. the current in the circuit lags the supply voltage.
  • 26. F.Y. B. Tech.-EEE Lab 2016 MIT Academy of Engineering, Alandi (D), Pune Page 26 OBSERVATION TABLE Case VL VC VR VLC VCR VLCR Remark XL > XC Lagging XL < XC Leading PHASOR DIAGRAM:- 1) Take current phasor as the reference and draw it along positive X-axis. 2) By choosing a suitable scale (e.g. 1cm= 20V), draw phasor VR along the positive X-axis since VR and I are in phase. 3) Draw an arc with the tip of VR as the center and with distance equivalent to Vc. This arc should be below the current phasor. 4) Cut this arc by another arc with distance equivalent to VCR and the origin as the center. 5) Join the cutting point of these two arcs to the tip of the VR phasor. This line indicates the phasor VC. 6) Now, draw one arc from the tip of the phasor VC and with distance equivalent to VL. 7) Cut this arc by another arc drawn from the tip of the phasor VR and with distance equivalent to VLC. 8) The cutting point of these two arcs when joined to the origin, gives the phasor VLCR. 9) Repeat this procedure for the other set of readings to given another phasor diagram.
  • 27. F.Y. B. Tech.-EEE Lab 2016 MIT Academy of Engineering, Alandi (D), Pune Page 27 Case-2: When the capacitive reactance is greater than the inductive reactance, the net reactance of the circuit becomes capacitive and hence, the overall p.f. is leading; i.e. the current in the circuit leads the supply voltage. Case-3: When the capacitive reactance is equal to the inductive reactance, the net reactance of the circuit becomes zero, and hence the overall p.f. is unity, i.e. the circuit behaves as a purely resistive circuit and the current in the circuit is in phase with the supply voltage. The current in the circuit is maximum and the resistance of the circuit governs it. Under this condition of the circuit, “resonance” is said to occur, or the circuit is said to be in “resonating condition”. The above three conditions can be adjusted in a series RLC circuit, if a continuously variable inductance is available. PROCEDURE:- Case -1: 1) Connect the circuit as shown in the circuit diagram. 2) For case 1 we have to keep more inductors in the circuit. This will give more inductive reactance than capacitive reactance. For this we use one rheostat, one capacitor and three choke coils all connected in series. 3) Apply 230 volt AC supply to the circuit using auto-transformer. 4) Measure the voltages across various parameters as given in the observation table. Case -2: 1) Connect the circuit as shown in the circuit diagram. 2) For case 2 we have to keep more capacitors in the circuit. This will give more capacitive reactance than inductive reactance. For this we use one rheostat, one choke coil and two capacitors. 3) Apply 230 volt AC supply to the circuit using auto-transformer. 4) Measure the voltages across various parameters as given in the observation table. PRECAUTIONS:- 1) Always assume all terminals live. 2) Before doing the connections make sure that the main switch of the panel board is in off condition. 3) After making all connections check it from faculty in-charge. 4) Before switching on the supply, check that the auto-transformer is in its zero position by rotating it fully anticlockwise. 5) After taking all readings rotate the knob of the auto-transformer again to fully anticlockwise position to make it sure that it is at zero level. 6) Switch off the main supply and remove the plug carefully.
  • 28. F.Y. B. Tech.-EEE Lab 2016 MIT Academy of Engineering, Alandi (D), Pune Page 28
  • 29. F.Y. B. Tech.-EEE Lab 2016 MIT Academy of Engineering, Alandi (D), Pune Page 29 RESULT:- Case VLCR (from Phasor Diagram) VLCR (Measured) Lagging Power Factor Leading Power Factor CONCLUSION:-
  • 30. F.Y. B. Tech.-EEE Lab 2016 MIT Academy of Engineering, Alandi (D), Pune Page 30
  • 31. F.Y. B. Tech.-EEE Lab 2016 MIT Academy of Engineering, Alandi (D), Pune Page 31 Laboratory Performance Report Experiment No. : 03 Title of the Experiment : _______________________________________________________________________ ________________________________________________________________________ ________________________________________________________________________ Date of Conduction (As per Plan) : / / 201 Actual Data Conduction : / / 201 Date of Evaluation (As per Plan) : / /201 Actual Data Evaluation : / / 201 Roll Number : Name of the Student : Exam Seat Number : Grade : __________ Remark : ____________________________________________________________________________________________________________________ ____________________________________________________________________________________________________________________ ____________________________________________________________________ Facilitator (Sign and Date):
  • 32. F.Y. B. Tech.-EEE Lab 2016 MIT Academy of Engineering, Alandi (D), Pune Page 32 Experiment No.:- 03 CIRCUIT DIAGRAM Star Connection:-
  • 33. F.Y. B. Tech.-EEE Lab 2016 MIT Academy of Engineering, Alandi (D), Pune Page 33 TITLE: - Star & Delta Circuits in Three phase balanced load AIM: - Verification of voltage and current relations in three phase balanced star and delta connected loads APPARATUS: - 1) Three phase Auto-Transformer 2) AC Voltmeter – (0 - 300) V 3) AC Voltmeter – (0 - 600) V 4) AC Ammeter – (0 - 5) A 5) AC Ammeter – (0 - 5) A 6) Lamp load 7) Probes THEORY:- Three-phase systems are the most common, although, for certain special jobs, greater number of phases is also used. For example, almost all mercury-arc rectifiers for power purposes are either six-phase or twelve-phase and most of the rotary converters in use are six-phase. All modern generators are practically three-phase. For transmitting large amounts of power, three-phase is invariably used. The reasons for the immense popularity of three-phase apparatus are that it is more efficient, uses less material for a given capacity and costs less than single-phase apparatus etc. Three windings of a generator are connected in star or delta. Generated three-phase voltage is applied to three-phase load. Three-phase load also can be connected in Star or Delta irrespective of connection of generator winding. These loads may be balanced or unbalanced. Balanced load will have same current flowing through all phases. In unbalanced condition the current flowing through all the phases is not same. A balanced three phase system is one in which the voltages in all phases are equal in magnitude & differ in phase from one another by equal angle i.e.120 degree (electrical). A three phase balanced load is that in which the loads connected across three phases are identical in nature and magnitude. Star Connection:- In this type of interconnection, one of the ends of each load impedances are joined together to form a common point called as star or neutral point. The potential difference between line & neutral is called as phase voltage & between two lines is called line voltage.
  • 34. F.Y. B. Tech.-EEE Lab 2016 MIT Academy of Engineering, Alandi (D), Pune Page 34 CIRCUIT DIAGRAM Delta Connection:-
  • 35. F.Y. B. Tech.-EEE Lab 2016 MIT Academy of Engineering, Alandi (D), Pune Page 35 Vr, Vy,Vb are the three phase voltages Vph. We have, as phasor relations as follows -1 22222 3 4 − 5 4 3 4 (− 5 4 ) 16 22222 5 4 − 7 222 5 4 (− 7 222) 6- 22222 7 222 − 3 4 7 222 − ( 3)2222 Assuming lagging system and using above relations we can plot the phasor diagram.
  • 36. F.Y. B. Tech.-EEE Lab 2016 MIT Academy of Engineering, Alandi (D), Pune Page 36 OBSERVATION TABLE Connection Line Voltage VL (Volt) Phase Voltage VP (Volt) Line Current IL (Amp) Phase Current IP (Amp) STAR 1 2 DELTA 1 2 ` From phasor diagram, 8 !9 : -1 22222 -; 22222 − 1; 22222 -1 22222 2 -; 22222 cos 30 -1 22222 2 -; 22222 √3 2 -1 22222 √3 × -; 22222 Similarly, 16 22222 √3 × 1; 22222
  • 37. F.Y. B. Tech.-EEE Lab 2016 MIT Academy of Engineering, Alandi (D), Pune Page 37 6- 22222 √3 × 6; 22222 i.e. √3 × AB Also IR, IY, IB are the three line currents, as well as three phase currents. Line current is equal to phase current. i.e. AB Delta Connection:- In this type of interconnection, the end of first load impedance is connected to start of second load impedance, the end of second load impedance is connected to start of third load impedance and end of third is connected to start of first. In this way a closed loop of three impedances is formed. Three-phase supply is given to the three junctions in the closed loop of the impedances. Current flowing through any line is called line current (i.e., IR = IY = IB = IL ) & current through any single load impedance is called as phase current (i.e., Ir = Iy =Ib = Iph ). The line voltages VRY , VYB & VBR are equal to phase voltages. PHASOR DIAGRAM:- Star Connection:- 1) Take phase voltage Vr as the reference and draw it along positive Y-axis by choosing a suitable scale. Draw phasor Vy 120 ° behind Vr. 2) Draw phasor Vb 120 ° behind Vy. 3) To plot line voltage VRY, draw Vy to 180° opposite to its negative value. It becomes –Vy. 4) Draw the resultant of two phasors i.e. Vr and – Vy. It becomes VRY. 5) Similarly, plot remaining line voltages. (as VYB = Vy – Vb ,VBR = Vb – Vr) 6) Choosing a suitable scale plot Phase current phasor. Here Phase current and line current are same. 7) If load is lagging, current will be behind the voltage by some angle Φ. 8) If load is leading, current will be ahead of the voltage by some angle Φ. 9) If load is unity, current will be in phase with the voltage. Delta Connection:- 1) Take phase voltage Vr as the reference and draw it along positive Y-axis by choosing a suitable scale. Draw phasor Vy 120° behind Vr. Draw phasor Vb 120° behind Vy.
  • 38. F.Y. B. Tech.-EEE Lab 2016 MIT Academy of Engineering, Alandi (D), Pune Page 38 2) Then draw phase current Ir lagging to the reference and similarly draw other phase currents Iy lagging behind Vy and phase currents Ib lagging behind Vb by same angle Φ. 3) To plot the line current IR draw Ib to 180° opposite to its negative value. It becomes –Ib. 4) Add two phasors i.e. Ir and –Ib. It becomes Line current IR. 5) Similarly, plot remaining line currents. 6) If load is lagging, current will be behind the voltage by some angle Φ. 7) If load is leading, current will be ahead of the voltage by some angle Φ. 8) If load is unity, current will be in phase with the voltage. We have, as phasor relations, At Node R, - 4 6- 2222 -1 2222 - 4 -1 2222 − 6- 2222 At Node Y, 1 4 -1 2222 16 2222 1 4 16 2222 − -1 2222 At Node B, 6 4 16 2222 6- 2222 6 4 6- 2222 − 16 2222
  • 39. F.Y. B. Tech.-EEE Lab 2016 MIT Academy of Engineering, Alandi (D), Pune Page 39 From phasor diagram, - 4 -1 2222 − 6- 2222 - 4 2 × -1 2222 cos 30 - 4 2 × -1 2222 × √3 2 - 4 √3 × -1 2222 Similarly, 1 4 √3 × 16 2222 6 4 √3 × 6- 2222 i.e. 4 √3 × CB 2222 As we have line voltage and phase voltages same. Therefore, 4 CB 22222
  • 40. F.Y. B. Tech.-EEE Lab 2016 MIT Academy of Engineering, Alandi (D), Pune Page 40 PROCEDURE:- Star Connection: 1) Connect the circuit as shown in the circuit diagram. 2) Apply some voltage to the load using three phase auto-transformer. 3) Balance the load. It means you have to connect same wattage lamps in each phase. 4) Note down the readings. 5) Switch off all the lamps. 6) Decrease the supply voltage to zero using auto-transformer. 7) Switch of the main supply. Delta Connection: Repeat the same procedure by connecting the load in Delta connection. PRECAUTIONS:- 1) Always assume all terminals live. 2) Before doing the connections make sure that the main switch of the panel board is in off condition. 3) After making all connections check it from faculty in-charge. 4) Before switching on the supply, check that the auto-transformer is in its zero position by rotating it fully anticlockwise. 5) In Delta connection the applied voltage should not more than the voltage rating of the lamps. 6) After taking all readings rotate the knob of the auto-transformer again to fully anticlockwise position to make it sure that it is at zero level. 7) Switch off the main supply and remove the plug carefully. RESULT:- CONCLUSION:-
  • 41. F.Y. B. Tech.-EEE Lab 2016 MIT Academy of Engineering, Alandi (D), Pune Page 41 Laboratory Performance Report Experiment No. : 04 Title of the Experiment : _______________________________________________________________________ ________________________________________________________________________ ________________________________________________________________________ Date of Conduction (As per Plan) : / / 201 Actual Data Conduction : / / 201 Date of Evaluation (As per Plan) : / /201 Actual Data Evaluation : / / 201 Roll Number : Name of the Student : Exam Seat Number : Grade : __________ Remark : ____________________________________________________________________________________________________________________ ____________________________________________________________________________________________________________________ ____________________________________________________________________ Facilitator (Sign and Date):
  • 42. F.Y. B. Tech.-EEE Lab 2016 MIT Academy of Engineering, Alandi (D), Pune Page 42 TITLE: - Load Test of DC Shunt Motor AIM: - To find the torque and output power of motor and calculate the efficiency of motor. APPARATUS: - 1) Three phase Auto-Transformer 2) DC Voltmeter – (0 - 300) V 3) DC Ammeter – (0 - 10) A 4) Resistor – 50 Ohm, 10 A 5) Resistor – 760 Ohm, 1.2A 6) Connecting Wires 7) Tachometer (0-1500) rpm THEORY:- PRECAUTIONS: 1. DC shunt motor should be started and stopped under no load condition. 2. Field rheostat should be kept in the minimum position. 3. Brake drum should be cooled with water when it is under load. PROCEDURE: 1. Connections are made as per the circuit diagram. 2. After checking the no load condition, and minimum field rheostat position, DPST switch is closed and starter resistance is gradually removed. 3. The motor is brought to its rated speed by adjusting the field rheostat. 4. Ammeter, Voltmeter readings, speed and spring balance readings are noted under no load condition. 5. The load is then added to the motor gradually and for each load, voltmeter, ammeter, spring balance readings and speed of the motor are noted. 6. The motor is then brought to no load condition and field rheostat to minimum position, then DPST switch is opened.
  • 43. F.Y. B. Tech.-EEE Lab 2016 MIT Academy of Engineering, Alandi (D), Pune Page 43 CIRCUIT DIAGRAM Load Test of DC Motor:-
  • 44. F.Y. B. Tech.-EEE Lab 2016 MIT Academy of Engineering, Alandi (D), Pune Page 44 Observation: Circumference of the Brake drum = __________________ cm. FORMULAE: Circumference R = ------------------- m 100 x2π Torque T = (S1 ∼ S2) x R x 9.81 Nm S.N o. Voltage V (Volts) Current I (Amps) Spring Balance Reading (S1- S2)Kg Speed N (rpm) Torque T (Nm) Output Power Pm (Watts) Input Power Pi (Watts) Efficienc y ηηηη%S1(Kg) S2(Kg)
  • 45. F.Y. B. Tech.-EEE Lab 2016 MIT Academy of Engineering, Alandi (D), Pune Page 45 Input Power Pi = VI Watts 2πNT Output Power Pm = ------------ Watts 60 Output Power Efficiency η % = -------------------- x 100% Input Power MODEL GRAPHS: SpeedN(rpm) y x Torque T (Nm) SpeedN(rpm) TorqueT(Nm) Efficiency% N T η y3 y2 y1 Output Power (Watts)
  • 46. F.Y. B. Tech.-EEE Lab 2016 MIT Academy of Engineering, Alandi (D), Pune Page 46 RESULT:- CONCLUSION:-
  • 47. F.Y. B. Tech.-EEE Lab 2016 MIT Academy of Engineering, Alandi (D), Pune Page 47 Laboratory Performance Report Experiment No. : 05 Title of the Experiment : _______________________________________________________________________ ________________________________________________________________________ ________________________________________________________________________ Date of Conduction (As per Plan) : / / Actual Data Conduction : / / Date of Evaluation (As per Plan) : / / Actual Data Evaluation : / / Roll Number : Name of the Student : Exam Seat Number : Grade : __________ Remark : ____________________________________________________________________________________________________________________ ____________________________________________________________________________________________________________________ ____________________________________________________________________ Facilitator (Sign and Date):
  • 48. F.Y. B. Tech.-EEE Lab 2016 MIT Academy of Engineering, Alandi (D), Pune Page 48 Experiment No. 5 Title: To study Passive components – Resistors, Capacitors & Inductor. (a) To test semiconducting components – Diode, BJT (b) To measure various electronic quantities using CRO, Function generator, DMM Objectives: 1. To Study Passive Components: Resistors, Capacitor, Inductors. 2. To Study different Electronics Measuring Instruments.3. Theory: Passive Components are the elements which do not introduce gain or do not have a directional function and are not capable of amplifying or processing an electrical signal. Passive Components Resistors Capacitors Inductors 1. Resistors: A resistor is a two-terminal electronic component designed to oppose an electric current by producing a voltage drop between its terminals in proportion to the current, that is, in accordance with Ohm's law: V = IR. The resistance R is equal to the voltage drop V across the resistor divided by the current I through the resistor. The primary characteristics of resistors are their resistance and the power they can dissipate. Other characteristics include temperature coefficient, noise, and inductance. Practical resistors can be made of resistive wire and various compounds and films, and they can be integrated into hybrid and printed circuits. Size and position of leads are relevant to equipment designers; resistors must be physically large enough not to overheat when dissipating their power. Variable resistors, adjustable by changing the position of a tapping on the resistive element and resistors with a movable tap ("potentiometers"), either adjustable by the user of equipment or contained within, are also used. Resistors are used as part of electrical networks and electronic circuits. There are special types of resistor whose resistance varies with various quantities, most of which have names, and articles, of their own the resistance of thermistors varies greatly with temperature, whether external or due to dissipation, so
  • 49. F.Y. B. Tech.-EEE Lab 2016 MIT Academy of Engineering, Alandi (D), Pune Page 49 they can be used for temperature or current sensing metal oxide varistors drop to a very low resistance when a high voltage is applied, making them suitable for over-voltage protection the resistance of a strain gauge varies with mechanical load; the resistance of photo resistors varies with illumination; the resistance of a Quantum Tunneling Composite can vary by factor of 10 12 with mechanical pressure applied & so on. Units The ohm (symbol: Ω) is a SI-driven unit of electrical resistance, named after Georg Ohm. Commonly used multiples and submultiples in electrical and electronic usage are the milliohm, kilohm, and megohm. British Standard BS 1852 and its replacement, BS EN 60062:2005, recommend that the letter R is used for Ohms, K for Kilohms and M for Megaohms and placed where the decimal point would go. Examples R47 0.47 ohms 4R7 4.7 ohms 470R 470 Ohms 4K7 4.7K ohms 47K 47K ohms 47K3 47.3K ohms 470K 470K ohms Technology [1] Carbon composition Carbon composition resistors consist of a solid cylindrical resistive element with embedded wire lead outs or metal end caps to which the leadout wires are attached, which is protected with paint or plastic. The resistive element is made from a mixture of finely ground (powdered) carbon and an insulating material (usually ceramic). A resin holds the mixture together. The resistance is determined by the ratio of the fill material (the powdered ceramic) and the carbon. Higher concentrations of carbon, a weak conductor, result in lower resistance. Carbon composition resistors were commonly used in the 1960s and earlier, but are not so popular for general use now as other types have better specifications, such as tolerance, voltage dependence, and stress (carbon composition resistors will change value when stressed with over-voltages).
  • 50. F.Y. B. Tech.-EEE Lab 2016 MIT Academy of Engineering, Alandi (D), Pune Page 50 [2] Carbon film A carbon film is deposited on an insulating substrate, and a spiral cut in it to create a long, narrow resistive path. Varying shapes, coupled with the resistivity of carbon, (ranging from 9 to 40 µΩm) can provide a variety of resistances. Carbon film resistors feature a power rating range of 1/6 W to 5 W at 70°C. Resistances available range from 1 ohm to 10 mega ohm. The carbon film resistor can operate between temperatures of -55°C to 155°C. It has 200 to 600 volts maximum working voltage range. [3] Metal film A common type of axial resistor today is referred to as a metal-film resistor. MELF (Metal Electrode Leadless Face) resistors often use the same technology, but are a cylindrically shaped resistor designed for surface mounting. [Note that other types of resistors, e.g. carbon composition, are also available in "MELF" packages]. Metal film resistors are usually coated with nickel chromium (NiCr), but might be coated with any of the cermet materials listed above for thin film resistors. Unlike thin film resistors, the material may be applied using different techniques than sputtering (though that is one such technique). Also, unlike thin- film resistors, the resistance value is determined by cutting a helix through the coating rather than by etching. [This is similar to the way carbon resistors are made.] The result is a reasonable tolerance (0.5, 1, or 2%) and a temperature coefficient of (usually) 25 or 50 ppm/K. [4] Wirewound Wirewound resistors are commonly made by winding a metal wire around a ceramic, plastic, or fiberglass core. The ends of the wire are soldered or welded to two caps, attached to the ends of the core. The assembly is protected with a layer of paint, molded plastic, or an enamel coating baked at high temperature. The wire leads are usually between 0.6 and 0.8 mm in diameter and tinned for ease of soldering. For higher power wirewound resistors, either a ceramic outer case or an aluminum outer case on top of an insulating layer is used. The aluminum-cased types are designed to be attached to a heatsink to dissipate the heat; the rated power is dependent on being used with a suitable heatsink, e.g., a 50 W power rated resistor will overheat at around one fifth of the power dissipation if not used with a heatsink. Because wirewound resistors are coils they have more undesirable inductance than other types of resistor, although winding the wire in sections with alternately reversed direction can minimize inductance.
  • 51. F.Y. B. Tech.-EEE Lab 2016 MIT Academy of Engineering, Alandi (D), Pune Page 51 [5] Strain gauges The strain gauge, invented by Edward E. Simmons and Arthur C. Ruge in 1938, is a type of resistor that changes value with applied strain. A single resistor may be used, or a pair (half bridge), or four resistors connected in a Wheatstone bridge configuration. The strain resistor is bonded with adhesive to an object that will be subjected to mechanical strain. With the strain gauge and a filter, amplifier, and analog/digital converter, the strain on an object can be measured. [6] Variable resistors. Presets and potentiometers are commonly used types of variable resistors. These are mostly used for voltage division and setting the sensitivity of sensors. These have a sliding contact or wiper which can be rotated with the help of a screw driver to change the resistance value. In the linear type, the change in resistance is linear as the wiper rotates. In the logarithmic type, the resistance changes exponentially as the wiper slides. The value is meant to be set correctly when installed in some device, and is not adjusted by the device's user.
  • 52. F.Y. B. Tech.-EEE Lab 2016 MIT Academy of Engineering, Alandi (D), Pune Page 52 The variable may have three tabs where the middle tab is the wiper. If all the three tabs are used, it behaves as a voltage divider. If only wiper tab is used along with another tab, it becomes a variable resistor or rheostat. If only the side tabs are used, then it behaves as a fixed resistor. These are mostly used for tuning, voltage division and adjusting sensitivity of sensors. The variable can have one or two switches in-built where the resistor operates for the ON state of the switch(s). Such resistors were mostly used for volume control in older TV and radio circuits. There may also be four-tab variables where the fourth lead is for feedback signal and placed near the first tab. Wire wound variable resistors are used for very precise control of resistance. The wiper may also be rotary (as in most presets), sliding or disc shaped (as used in pocket radios for volume control). Four-band resistors Four-band identification is the most commonly used color-coding scheme on all resistors. It consists of four colored bands that are painted around the body of the resistor. The first two bands encode the first
  • 53. F.Y. B. Tech.-EEE Lab 2016 MIT Academy of Engineering, Alandi (D), Pune Page 53 two significant digits of the resistance value, the third is a power-of-ten multiplier or number-of-zeroes, and the fourth is the tolerance accuracy, or acceptable error, of the value. Sometimes a fifth band identifies the thermal coefficient, but this must be distinguished from the true 5-color system, with 3 significant digits. ,For example, green-blue-yellow-red is 56×10 4 Ω = 560 kΩ ± 2%. An easier description can be as followed: the first band, green, has a value of 5 and the second band, blue, has a value of 6, and is counted as 56. The third band, yellow, has a value of 10 4 , which adds four 0's to the end, creating 560,000Ω at ±2% tolerance accuracy. 560,000Ω changes to 560 kΩ ±2% (as a kilo- is 10 3 ). Each color corresponds to a certain digit, progressing from darker to lighter colors, as shown in the chart below Color 1st 2nd 3 rd band 4 th band Temp. band band (multiplier) (tolerance) Coefficient Black 0 0 ×10 0 Brown 1 1 ×10 1 ±1% (F) 100 ppm ×10 2 Red 2 2 ±2% (G) 50 ppm Orange 3 3 ×10 3 15 ppm ×10 4 Yellow 4 4 25 ppm ×10 5 Green 5 5 ±0.5% (D) ×10 6 Blue 6 6 ±0.25% (C) Violet 7 7 ×10 7 ±0.1% (B) ×10 8 Gray 8 8 ±0.05% (A) White 9 9 ×10 9 ×10 -1 Gold ±5% (J) Silver ×10 -2 ±10% (K) None ±20% (M) Table 1 : Colour band chart for calculating the value of resistor 2. Capacitor A capacitor or condenser is a passive electrical component consisting of an insulating, or
  • 54. F.Y. B. Tech.-EEE Lab 2016 MIT Academy of Engineering, Alandi (D), Pune Page 54 dielectric, layer between two conductors. When a voltage potential difference occurs between the conductors, an electric field occurs in the insulator. This field can be used to store energy, to resonate with a signal, or to link electrical and mechanical forces. Capacitors are manufactured as electronic components for use in electrical circuits, but any two conductors linked by an electric field also display this property. The effect is greatest between wide, flat, parallel, narrowly separated conductors. An ideal capacitor is characterized by a single constant value, capacitance, the ratio of the amount of charge in each conductor to the potential difference between them. The unit of capacitance is thus coulombs per volt, or farads. Higher capacitance indicates that more charge may be stored at a given energy level, or voltage. In actual capacitors, the insulator allows a small amount of current through, called leakage current, the conductors add an additional series resistance, and the insulator has an electric field strength limit resulting in a breakdown voltage. Charge separation in a parallel-plate capacitor causes an internal electric field. A dielectric (orange) reduces the field and increases the capacitance. A capacitor consists of two conductors separated by a non-conductive region. The non-conductive substance is called the dielectric medium, although this may also mean a vacuum or a semiconductor depletion region chemically identical to the conductors. A capacitor is assumed to be self-contained and isolated, with no net electric charge and no influence from an external electric field. The conductors thus contain equal and opposite charges on their facing surfaces, and the dielectric contains an electric field. The capacitor is a reasonably general model for electric fields within electric circuits. The capacitor’s capacitance ( C ) is a measure of the amount of charge ( Q ) stored on each plate for a given potential difference or voltage ( V ) which appears between plates: C = Q / V In SI units, a capacitance of one farad means that one coulomb of charge on each conductor causes a voltage of one volt across the device. Applications 1) Energy storage 2) Pulsed power and weapons 3) Power conditioning 4) Power factor correction 5) Supression and coupling
  • 55. F.Y. B. Tech.-EEE Lab 2016 MIT Academy of Engineering, Alandi (D), Pune Page 55 6) Noise filters and snubbers 7) Motor starters 8) Signal processing 9) Tuned circuits Figure 2: Types of Capacitor 3. Inductor An inductor is a passive electrical component that can store energy in a magnetic field created by the electric current passing through it. An inductor's ability to store magnetic energy is measured by its inductance, in units of henries. An "ideal inductor" has inductance, but no resistance or capacitance, and does not dissipate energy. A real inductor is equivalent to a combination of inductance, some resistance due to the resistivity of the wire, and some capacitance. At some frequency, usually much higher than the working frequency, a real inductor behaves as a resonant circuit (due to its self capacitance). In addition to dissipating energy in the resistance of the wire, magnetic core inductors may dissipate energy in the core due to hysteresis, and at high currents may show other departures from ideal behavior due to nonlinearity.
  • 56. F.Y. B. Tech.-EEE Lab 2016 MIT Academy of Engineering, Alandi (D), Pune Page 56 Figure 3: Types of Inductor Inductance (L) ( measured in henries ) is an effect resulting from the magnetic field that forms around a current-carrying conductor that tends to resist changes in the current. Electric current through the conductor creates a magnetic flux proportional to the current. A change in this current creates a change in magnetic flux that, in turn, by Faraday's law generates an electromotive force (EMF) that acts to oppose this change in current. Inductance is a measure of the amount of EMF generated for a unit change in current. For example, an inductor with an inductance of 1 henry produces an EMF of 1 volt when the current through the inductor changes at the rate of 1 ampere per second. The number of loops, the size of each loop, and the material it is wrapped around all affect the inductance. For example, the magnetic flux linking these turns can be increased by coiling the conductor around a material with a high permeability such as iron. This can increase the inductance by 2000 times, although less so at high frequencies. Application 1) Inductors are used extensively in analog circuits and signal processing. 2) An inductor is used as the energy storage device in some switched-mode power supplies. 3) Inductors are also employed in electrical transmission systems, where they are used to depress voltages from lightning strikes and to limit switching currents and fault current. In this field, they are more commonly referred to as reactors.
  • 57. F.Y. B. Tech.-EEE Lab 2016 MIT Academy of Engineering, Alandi (D), Pune Page 57
  • 58. F.Y. B. Tech.-EEE Lab 2016 MIT Academy of Engineering, Alandi (D), Pune Page 58 OBSERVATION TABLE: SR. NO. Types of Components Observed Values Rating of Component Symbol FIXED RESISTORS 1. VARIABLE RESISTORS CAPACITORS 2. INDUCTORS 3. 4. DIODE 5. TRANSISTOR
  • 59. F.Y. B. Tech.-EEE Lab 2016 MIT Academy of Engineering, Alandi (D), Pune Page 59 (b)To measure various electronic quantities using CRO, Function generator, DMM OBJECTIVES : 1. To study different controls of DMM and measurement of parameters like AC & DC voltages, DC current. 2. To study different controls of CRO and measurement of parameters like AC & DC voltages, frequency and phase. 3. To study different controls of the Signal Generator. APPARATUS: Signal generator, Function generator, CRO probes, connecting wires, BNC connectors etc.. THEORY: Digital MultiMeter (DMM) A multimeter or a multitester, also known as a volt/ohm meter or VOM, is an electronic measuring instrument that combines several functions in one unit. A standard multimeter may include features such as the ability to measure voltage, current and resistance. A multimeter can be a hand-held device useful for basic fault finding and field service work or a bench instrument which can measure to a very high degree of accuracy. They can be used to troubleshoot electrical problems in a industrial and household devices such as batteries, motor controls, appliances, power supplies, and wiring systems.
  • 60. F.Y. B. Tech.-EEE Lab 2016 MIT Academy of Engineering, Alandi (D), Pune Page 60 PROCEDURE: i) Measurement of AC voltage, DC voltage & DC current 1) Connect red test lead to ―V-V‖input terminal and black test lead to―COM‖ input terminal. 2) Set Function/Range switch to desired voltage type (DC or AC) and range. If magnitude of voltage is not known, set switch to the highest range and reduce until a satisfactory reading is obtained. 3) Turn off power to the device or circuit being tested. 4) Connect test leads to the device or circuit being measured. 5) Turn on power to the device or circuit being measured. Voltage value will appear on the digital display along with the voltage polarity. 6) Turn off power to the device or circuit being tested prior to disconnecting test leads. Current Measurement 1) Connect red test lead to the ―mA‖ input terminal for current measurements up to 200 milliamperes.
  • 61. F.Y. B. Tech.-EEE Lab 2016 MIT Academy of Engineering, Alandi (D), Pune Page 61 Connect black lead to the COM input terminal. 2) Set Function/Range switch to desired current type (DC or AC) and range. If magnitude of current is not known, set switch to the highest range and reduce until a satisfactory reading is obtained. 3) Turn off power to the device or circuit being tested. 4) Open the circuit in which current is to be measured. Now securely connect test leads in series with the load in which current is to be measured. 5) Turn on power to the device or circuit being tested. 6) Read current value on digital display. 7) Turn off all power to the device or circuit being tested. 8) Disconnect test leads from circuit and reconnect circuit that was being tested. 9) For current measurement of 200mA or greater, connect the red test lead to ―20 A‖ input terminal & black test lest lead to the ―COM‖ input terminal. ii) Diode and Transistor Test Measurements The special Diode Test Function allows relative measurements of forward voltage drops across diodes and transistor junctions. Diode Tests 1) Connect red test lead to ―V-V‖ input terminal and black test lead to COM input terminal. 2) Set Function/Range switch to the diode test position. 3) Connect test leads to the device 4) Read forward voltage drop value on digital display. Transistor Junction Tests 1) Bipolar transistors can be tested in the same manner as diode, junctions formed between the base and emitter and the base and collector of the transistor. Measurement between the collector and emitter also should be made to determine if a short is present.
  • 62. F.Y. B. Tech.-EEE Lab 2016 MIT Academy of Engineering, Alandi (D), Pune Page 62 Transistor hFE Measurements 1) Transistor must be out of circuit. Set the function/range switch to the hFE position. 2) Plug the emitter, base and collector leads of the transistor into the correct holes in either the NPN or the PNP transistor test socket, whichever is appropriate for the transistor being checked. Read the hFE (beta, or DC current gain) in the display. iii) Resistance Measurements 1) Connect red test lead to V-V input terminal and black test lead to COM input terminal. 2) Set Function/Range switch to desired V position. If magnitude of resistance is not known, set the switch to highest range and reduce until a satisfactory reading is obtained. 3) If the resistance being measured is part of a circuit, turn off power to the circuit. 4) Connect test leads to the device or circuit being measured. 5) Read resistance value on digital display. iv) Continuity Test 1) Set Range Switch to ―V Ω mA‖ and Black lead to COM input terminal. 2) Set Range Switch to ―:)))‖ position. 3) Connect test lead to two points of Circuit to be tested. If the resistance is lower than 30Ω + or – 20 Ω the buzzer will be sound. Handling of DMM 1) When a meter is connected to major circuit do not touch unused terminal. 2) When a value of parameter to be measured is unknown then select max. range. 3) Before rotating the range selector disconnect test before never performed resister Measurement line circuit.
  • 63. F.Y. B. Tech.-EEE Lab 2016 MIT Academy of Engineering, Alandi (D), Pune Page 63 4) While testing the transistor, always leads have been disconnected from the circuit. 5) Components should not be connected to hFE socket while making voltage measurement with test lead. OBSERVATION TABLE 1. DIGITAL MULTIMETER Sl. Name of the component with type Theoretical values Practical values No.
  • 64. F.Y. B. Tech.-EEE Lab 2016 MIT Academy of Engineering, Alandi (D), Pune Page 64 Cathode Ray Oscilloscope (CRO) Figure : Front Panel of CRO FRONT PANEL CONTROLS OF CRO: 1. POWER ON : Puts the instrument to main supply with LED indication. 2. INTENSITY : Controls the brightness of the display. 3. FOCUS : Controls the sharpness of the display 4. TIME BASE : 18 step switch enable selection of 18 calibrated sweep. From 0.1µsec/div to 0.2 S/div in 1, 2, 5… sequence. 5. TIME BASE VARIABLE: In calibrated position (CAL the selected sweep speed holds indicated calibration clockwise. It extends the sweep. Speed by 2.5 times approx., with LED indication. 6. HOLD-OFF : Provides 4:1 Hold-Off to enhance HF & Complex Signal triggering.
  • 65. F.Y. B. Tech.-EEE Lab 2016 MIT Academy of Engineering, Alandi (D), Pune Page 65 7. POSITION /X5 control is pulled, it magnifies the sweep 5 times with LED indication. 8. LEVEL : Variable control, Selects the trigger point on the displayed on the displayed waveform. 9. AUTO/NORM : In Auto mode trace is displayed in absence of any input signal. The display is then automatically triggered for signals above 30 Hz depending upon correct setting of trigger LEVEL control. 10. INT/EXT : INT : Display triggers from signals derived from CH1, CH2 or line. EXT : Triggering from any other external source fed through EXT TRIG BNC Socket 11. + / - : Selects trigger point on either positive or negative slope of the displayed waveform. 12. CH1/ CH2 : Selects trigger signal in INT mode derived from either CH1 Or CH2 inputs 13. ac/dc : Selects trigger signal coupling 14. SWP/ X-Y : When pressed, converts CH2 input into X-channel and enable use of the scope as on x-y 15. 0.2V. 1KHz : 200mv p-p 1KHz square wave calibration signal. 16. POSITION /X5 : Controls the vertical position of the display. When thiscontrol is pulled, it magnifies the sweep 5 times with LED indication. 17. ac / dc /gnd : Selects input coupling / grounding. 18. INPUT BNC CH1/Y ( CH2/X) : Input terminals to CH1/Y, CH2/X inputs. 19. DUAL / MONO ( X-Y) : In DUAL , operates as DUAL trace scope .In MONO operates as single
  • 66. F.Y. B. Tech.-EEE Lab 2016 MIT Academy of Engineering, Alandi (D), Pune Page 66 trace. 20. CHANNEL ADDITION : In DUAL mode, when ADD switch is pressed signals of CH1 & Ch2 are algebraically added. 21. CHANNEL :In DUAL mode, when ADD & CH2 INV switch is pressed SUBTRACTIONCH2 signal is algebraically subtracted from CH1. 22. TRACE : Screw driver controls to adjust horizontal tilt of the trace. 23. CTC : Converts scope into a dual component tester/comparator. 24. CT1 & CT II : Input terminals for CH1 component tester/comparator. 25. COM : Common terminal of component tester. 26. LINE : Triggers from power line frequency. 27. TV : Triggers from low frequency component of TV-Signal. ( TV-V or TV-H ) 28. ALT / CHOP : Selects switching modes for two channels while in DUAL Operation. 29. CH2 INV : Polarity of the signal to CH2 is inverted. 30. EXTERNAL DC SOURCE: a) + 5V : Gives + 5V o/p. Negative grounded. b) : Ground terminal for + 5V o/p c) + 12 V : Gives + 12V o/p. Common floating. d) COM : Common Terminal for +/- 12 V o/p e) - 12 V : Gives - 12V o/p. Common floating. 2. Measurement of Different Parameters: 1) Frequency Measurement: 1. Connect the signal from the signal generator to the Y-input/X-input. 2. Adjust the time base generator switch (time/div) to get a steady pattern of the signal on the
  • 67. F.Y. B. Tech.-EEE Lab 2016 MIT Academy of Engineering, Alandi (D), Pune Page 67 CRO screen. 3. Measure the time interval T for one cycle. 4. Determine the frequency F of the signal (F=l/T ) 5. Repeat the same procedure for different frequencies. 2) DC voltage measurement: 1. Adjust the beam to certain reference level 2. Keep AC/DC selector switch on DC position. 3. Apply test voltage to CRO input. 4. Measure the shift of beam from reference level. 6. Calculate D.C. Voltage No. of divisions on y – axis x Volts/Div. 7. Note down the reading. 3) AC voltage measurement: 1. Keep AC/DC selector switch on AC position. 2. Apply AC voltage from signal generator to CRO input. 3. Measure no. of divisions on y – axis. 4. Calculate A.C. Voltage No. of divisions on y – axis x Volts/Div. OBSERVATION TABLE: 1) Frequency measurement: Sr. No Applied Frequency No. of Divisions on X axis (a) Time / Div factor (b) T=a*b F =1/T 1 2 3 2) AC voltage measurement (Amplitude measurement):
  • 68. F.Y. B. Tech.-EEE Lab 2016 MIT Academy of Engineering, Alandi (D), Pune Page 68 Sr. No Applied Voltage No. of Divisions on Y axis (a) Volts / Div factor (b) Vpp=a*b Voltage (RMS) 1 2 3 3) DC voltage measurement: Sr. No Applied Voltage No. of Divisions on Y axis (a) Volts / Div factor (b) Vdc= a*b 1 2 3 Signal Generator: Signal Generator provides various signals like sine wave, square wave for different test circuits. Its frequency range varies from 1Hz to 1MHz with adjustable amplitude, for sine wave 0 to 10V, for square wave 0 to 20V peak to peak. The output impedance of generator is 600Ω at output level of 1V & below. The front panel of signal generator is shown in figure 1. Figure : Front panel of Signal Generator
  • 69. F.Y. B. Tech.-EEE Lab 2016 MIT Academy of Engineering, Alandi (D), Pune Page 69 Front Panel Controls of Signal Generator: 1. Power On indication: Red LED glows when power is on. 2. Frequency Multiplier Switch: Used to select the range of frequency. 3. Frequency Select Dial: Used to select the desired frequency. 4. Waveform Selection Switch: Select desired waveform. 5. Amplitude Selection Potentiometer: Amplitude of selected waveform is adjusted. 6. Output Terminals: Provides output signal selected by user. CONCLUSION :
  • 70. F.Y. B. Tech.-EEE Lab 2016 MIT Academy of Engineering, Alandi (D), Pune Page 70 Laboratory Performance Report Experiment No. : 06 Title of the Experiment : _______________________________________________________________________ ________________________________________________________________________ ________________________________________________________________________ Date of Conduction (As per Plan) : / / Actual Data Conduction : / / Date of Evaluation (As per Plan) : / / Actual Data Evaluation : / / Roll Number : Name of the Student : Exam Seat Number : Grade : __________ Remark : ____________________________________________________________________________________________________________________ ____________________________________________________________________________________________________________________ ____________________________________________________________________ Facilitator (Sign and Date):
  • 71. F.Y. B. Tech.-EEE Lab 2016 MIT Academy of Engineering, Alandi (D), Pune Page 71 AIM : DC Regulated Power Supply: a) To design 12V/ 05 V IC based DC regulated power supply (Theoretically). b) To test and observe waveforms at various stages on CRO and measure the voltage using DMM. OBJECTIVES: a) Study of the data sheet specifications of the Rectifier Diode (1N4001-1N4007) from the given Regulated Power Supply circuit with Bridge Rectifier, Capacitor Filter and 3-terminal Regulator IC b) Study of the data sheet specifications of the 3-terminal Regulator (LM 79XX/78XX). c) Measure the voltages and observe the waveforms at transformer’s secondary and at the output of Bridge Rectifier and Regulator. THEORY : DC power supply: The dc power supply converts the standard ac voltage (230V, 50Hz) into a constant dc voltage. It is one of the most commonly used electronic circuits. The dc voltage produced by a power supply is used to power all the types of electronic circuits, such as television, VCRs, CD players and most of laboratory equipments. Design of DC power supply (12V): 1. Design of transformer: The transformer is used to couple the ac voltage from the source to rectifier. Design parameters for transformer are as below • Vp (pri) = primary voltage of transformer i.e. input ac voltage • Vs (sec) =secondary voltage of transformer • Turns ratio of transformer (n) =Vs (sec)/Vp (pri) Thus for 12v power supply, Vp (sec) =15v Vp (pri) =230v, 50Hz Thus n=1:15 So as the required rectified voltage is 15V so we have used the 15-0-15 transformer. 2. Design of rectifier:
  • 72. F.Y. B. Tech.-EEE Lab 2016 MIT Academy of Engineering, Alandi (D), Pune Page 72 The rectifier can be either half wave or full wave. The rectifier converts the ac input voltage to a pulsating dc voltage. In this design full wave bridge rectifier is used. In the bridge rectifier design the diodes PIV voltages should be considered. PIV=peak inverse voltage (specified in diode data sheet) PIV=Vp (out) + 0.7 here Vp (out) =Vp (sec)-1.4v So, PIV = 15-0.7 =14.3v So according to data sheet of rectifier diodes, we can select diodes with PIV ranging from 50V to 1000V. 1N4007 diode is used in our design of power supply with regulated DC output of 12V. Please refer the Rectifier diodes data sheet. 3. Design for filter: The filter is simply a capacitor connected from the rectifier to ground. In design of filter following points are considered. a) Ripple factor: The variation in capacitor voltage due to the charging and discharging is called as ripple. Generally ripple is undesirable so smaller the value of ripple better will be the filtering action. The ripple factor is lower by increasing value of filter capacitor or increasing load resistance. Thus we have selected value of filter capacitor C=1000uF 4. Design of Voltage Regulator:
  • 73. F.Y. B. Tech.-EEE Lab 2016 MIT Academy of Engineering, Alandi (D), Pune Page 73 While filters can reduce the ripple from power supplies to a low value, the most effective approach is a combination of a capacitor-input filter used with a voltage regulator. A voltage regulator is connected to the output of a filtered rectifier and maintains a constant output voltage (or current) despite changes in the input, the load current, or the temperature. The capacitor-input filter reduces the input ripple to the regulator to an acceptable level. The combination of a large capacitor and a voltage regulator helps produce an excellent power supply. Most regulators are integrated circuits and have three terminals-an input terminal, an output terminal and a reference (or adjust) terminal. The input to the regulator is first filtered with a capacitor to reduce the ripple to < 10%. The regulator reduces the ripple to a negligible amount. In addition, most regulators have an internal voltage reference, short- circuit protection and thermal shutdown circuitry. They are available in a variety of voltages, including positive and negative outputs, and can be designed for variable outputs with a minimum of external components. Typically, voltage regulators can furnish a constant output of one or more amps of current with high ripple rejection. Three-terminal regulators designed for fixed output voltages require only external capacitors to complete the regulation portion of the power supply, as shown below. Filtering is accomplished by a large-value capacitor between the input voltage and ground. An output capacitor (typically 0.1 J.LF to 1.0 J.LF) is connected from the output to ground to improve the transient response. A basic fixed power supply with a +12 V voltage regulator is shown in Figure 3. 15-0-15
  • 74. F.Y. B. Tech.-EEE Lab 2016 MIT Academy of Engineering, Alandi (D), Pune Page 74 LM 7812 230 V, 50 Hz 15 V 12 V DCAC D1-D4 is 1N4007 Rectifier diodes C1: 1000µF, C2: 100µF Figure 3: A basic +12V regulated power supply Refer to the technical data sheet of LM78XX as a Voltage Regulator. PROCEDURE: A) Measurement of Transformer’s Secondary voltage 1. Connect the primary of the transformer to the ac mains & measure the ac voltage across the Transformer’s secondary on the DMM. 2. Observe the waveform across the transformer’s secondary on the CRO. B) Measurement of rectified voltage across bridge rectifier 1) Measure the pulsating DC voltage on DMM 2) Observe the rectified output voltage on the CRO. Vdc = Vrms * 1.4142 C) Measurement of output across the Capacitor Filter 1) Measure the filtered pulsating DC voltage on DMM 2) Observe the filtered output voltage on the CRO. D) Measurement of Regulated output at 3-pin Voltage Regulator IC (LM-7812) 1) Measure the regulated DC voltage on DMM 2) Observe the DC voltage on CRO. RESULTS : OBSERVATION TABLE A) DIGITAL MULTIMETER Sl. Output Stages Vac (RMS Volts) Vdc (Volts) No.
  • 75. F.Y. B. Tech.-EEE Lab 2016 MIT Academy of Engineering, Alandi (D), Pune Page 75 01. Transformer’s Secondary 02. Bridge Rectifier O/P without Filter 03. Bridge Rectifier O/P with Capacitor Filter 04. IC Regulator THINK PAIR SHARE Component Rating Particulars Value (12V) Value (5V) Transformer V L rms Diode V L dc Capacitor V L dc IC Regulator V L dc CONCLUSION :
  • 76. F.Y. B. Tech.-EEE Lab 2016 MIT Academy of Engineering, Alandi (D), Pune Page 76 Laboratory Performance Report Experiment No. : 07 Title of the Experiment : _______________________________________________________________________ ________________________________________________________________________ ________________________________________________________________________ Date of Conduction (As per Plan) : / / Actual Data Conduction : / / Date of Evaluation (As per Plan) : / / Actual Data Evaluation : / / Roll Number : Name of the Student : Exam Seat Number : Grade : __________ Remark : ____________________________________________________________________________________________________________________ ____________________________________________________________________________________________________________________ ____________________________________________________________________ Facilitator (Sign and Date):
  • 77. F.Y. B. Tech.-EEE Lab 2016 MIT Academy of Engineering, Alandi (D), Pune Page 77 AIM : Combinational Digital Circuits: (a) To design and implement half adder and Full adder (using Half adder). (b) To design and implement 8:1 MUX using IC-74LS153 and verify its truth table. OBJECTIVES: a) Identify pins of Digital Logic gate IC’s such as AND,OR,NOT,NAND,EX-OR b) Implement Half and Full Adder Circuits using the Digital Logic gates and verify truth table. c) Implement 8:1 MUX using IC-74LS153 and Verify truth table THEORY: Introduction to Adders: In electronics, an adder or summer is a digital circuit that performs addition of numbers. In many computers and other kinds of processors, adders are used not only in the arithmetic logic unit(s), but also in other parts of the processor, where they are used to calculate addresses, table indices, and similar. Although adders can be constructed for many numerical representations, such as binary-coded decimal or excess-3, the most common adders operate on binary numbers. Half Adder A half adder (HA) is an arithmetic circuit that is used to add two bits. The block diagram of HA is shown. It has two inputs and two outputs. The inputs of the HA are the 2 bits to be added; the augend, and addend. The output is the result of this addition, i.e. a sum bit (S) and a carry bit (C).
  • 78. F.Y. B. Tech.-EEE Lab 2016 MIT Academy of Engineering, Alandi (D), Pune Page 78 Table 1: Truth table of Half Adder. The truth table of HA is shown above. The Boolean functions for the two outputs can be obtained from the truth table which are: Thus, the HA can be implemented using one XOR gate and one AND gate as shown in the Figure1 Figure1. Circuit Diagram of Half Adder Full Adder A full adder (FA) is an arithmetic circuit that is used to add three bits. The block diagram of FA is shown. It has three inputs and two outputs.
  • 79. F.Y. B. Tech.-EEE Lab 2016 MIT Academy of Engineering, Alandi (D), Pune Page 79 The inputs of the FA are the 3 bits to be added, and carry from previous lower significant position. The output is the result of this addition, i.e. a sum bit (S) and a carry bit (C). Table 2: Truth table of Full Adder. The truth table of FA is shown above. The simplified Boolean functions for the two outputs can be obtained from the truth table, which are: Figure 3: Implementation of Full Adder using Half Adders
  • 80. F.Y. B. Tech.-EEE Lab 2016 MIT Academy of Engineering, Alandi (D), Pune Page 80
  • 81. F.Y. B. Tech.-EEE Lab 2016 MIT Academy of Engineering, Alandi (D), Pune Page 81 PROCEDURE: A) To verify the truth table of Half Adder and Full Adder. 1. Make the connections as shown in figure 1 and figure 2. 2. Apply +5 V DC supply as VCC and GND to the respective pins of the digital ICs used- 7408 (2-input AND Gate), 7432 (2-input OR Gate) and 7486 (2-input EX-OR Gate). 3. Verify the functionality according to the truth tables for Half Adder and Full Adder as shown in table 1 and table 2. Multiplexer or Data Selector: A multiplexer is a device that allows digital information from several sources to be routed onto a single line for transmission over that line to a common destination. The basic multiplexer has several data input lines and a single output line. It also has data selector inputs, which permit digital data on any one of the inputs to be switched to the output line. Multiplexers are also known as data selector. Note from the table that when C is 1, output is connected to the input B and in that case the state of input at A does not have any effect on the output Y. Similarly when C is 0, output is connected to the input A. Following is the top view of IC 74LS153 which is a dual 4 line to 1 line Multiplexer (i.e it contains two 4 line to 1 line MUX). Its internal circuit diagram is also given.
  • 82. F.Y. B. Tech.-EEE Lab 2016 MIT Academy of Engineering, Alandi (D), Pune Page 82 Exercise: Implement the following logic using IC 74Ls153 F (A, B) = Σ (1,3) Truth Table A B Y 0 0 0 (1C0=0) 0 1 1 (1C1=1) 1 0 0 (1C2=0) 1 1 1 (1C3=1) Exercise: Implement a 8 line to 1 line MUX using two 4 line to 1 line MUX (found in IC 74153) and an OR gate.
  • 83. F.Y. B. Tech.-EEE Lab 2016 MIT Academy of Engineering, Alandi (D), Pune Page 83 Space for exercise : CONCLUSION:
  • 84. F.Y. B. Tech.-EEE Lab 2016 MIT Academy of Engineering, Alandi (D), Pune Page 84
  • 85. F.Y. B. Tech.-EEE Lab 2016 MIT Academy of Engineering, Alandi (D), Pune Page 85 Laboratory Performance Report Experiment No. : 08 Title of the Experiment : _______________________________________________________________________ ________________________________________________________________________ ________________________________________________________________________ Date of Conduction (As per Plan) : / / Actual Data Conduction : / / Date of Evaluation (As per Plan) : / / Actual Data Evaluation : / / Roll Number : Name of the Student : Exam Seat Number : Grade : __________ Remark : ____________________________________________________________________________________________________________________ ____________________________________________________________________________________________________________________ ____________________________________________________________________ Facilitator (Sign and Date):
  • 86. F.Y. B. Tech.-EEE Lab 2016 MIT Academy of Engineering, Alandi (D), Pune Page 86 AIM : OP-AMP Applications (a) To verify operations of inverting and non inverting amplifier for various gain factors. (b) To verify application of OPAMP as summing and difference amplifier. (c) To verify the application of OPAMP as voltage follower. OBJECTIVES: a) Identify pins of LM-741. b) Implement OP-AMP based Inverting and non inverting Amplifier. c) Verify application of OPAMP as summing and difference amplifier d) Verify application of OPAMP as voltage follower THEORY: Inverting Amplifier: An op-amp connected as an inverting amplifier with a controlled amount of voltage gain is shown in Figure (a). The input signal is applied through a series input resistor Ri to the inverting (-) input. Also, the output is fed back through Rf to the same input. The non- inverting (+) input is grounded. Figure (a): Inverting amplifier. At this point the ideal op-amp parameters are useful in simplifying the analysis of this circuit. In particular, the concept of infinite input impedance is of great value. An infinite input impedance implies zero current at the inverting input. If there is zero current through the input impedance, then there must be no voltage drop between the in-verting and noninverting inputs. This means that the voltage at the inverting (-) input is zero. because the non inverting (+) input is grounded. This zero voltage at the inverting input terminal is referred
  • 87. F.Y. B. Tech.-EEE Lab 2016 MIT Academy of Engineering, Alandi (D), Pune Page 87 to as virtual ground. This condition is illustrated in Figure (b). Figure (b): Virtual Ground Figure (c): Iin = If and current at the inverting Input (I1) is O. Since there is no current at the inverting input, the current through Ri and the current through Rf are equal, as shown in Figure (c). The voltage across Ri equals Vin because the resistor is connected to virtual ground at the inverting input of the op-amp_ Therefore, Also, the voltage across RF equals - Vout, because of virtual ground, and therefore, Of course, Vout/Vin is the overall gain of the inverting (I) amplifier. Above equation shows that the dosed-loop voltage gain of the inverting amplifier Acl(I)
  • 88. F.Y. B. Tech.-EEE Lab 2016 MIT Academy of Engineering, Alandi (D), Pune Page 88 is the ratio of the feedback resistance (Rf ) to the input resistance (Ri). The closed-loop gain is independent of the op-amp's internal open-loop gain. Thus, the negative feedback stabilizes the voltage gain. The negative sign indicates inversion. PROCEDURE: A) To measure the output voltage of inverting amplifier implemented using IC 741 and to observe the output waveform on CRO. 1. Make the circuit connections as shown in figure (a) with Rf= 5KΩ and R1=1KΩ 2. Apply dual power supply of +12V and -12 V DC supply as +VCC and -VEE (pin no. 7 and pin no. 4 of IC 741). 3. Observe the output waveform on OUT Pin (Pin no: 6 of 741 op- amp) on CRO. 4. Calculate the output voltage for inverting amplifier RESULTS : OBSERVATION TABLE ON CRO Output voltages for inverting amplifier using the IC-741 Sl. Input Voltage Voltage Gain Output Voltage No. (VIN) (VOUT) 01. 02. Output voltages for non inverting amplifier using the IC-741 Sl. Input Voltage Voltage Gain Output Voltage No. (VIN) (VOUT) 01. 02.
  • 89. F.Y. B. Tech.-EEE Lab 2016 MIT Academy of Engineering, Alandi (D), Pune Page 89 THEORY: SUMMING AMPLIFIERS: The summing amplifier is an application of the inverting op-amp configuration. A summing amplifier has two or more inputs, and its output voltage is proportional to the negative of the algebraic sum of its input voltages SUMMING AMPLIFIER WITH UNITY GAIN: A two-input summing amplifier is shown in Figure (a), but any number of inputs can be used. The operation of the circuit and derivation of the output expression are as follows. Two voltages, VIN1 and V1N2, are applied to the inputs and produce currents I1 and I2 , as shown below. Figure (a). Two-input inverting summing amplifier. R1=R2=Rf = 1KΩ Using the concepts of infinite input impedance and virtual ground, you can see that the inverting (-) input of the op-amp is approximately 0 V, and there is no current at the input. This means that both input currents II and I combine at this summing point and form the total current (IT)' which goes through Rf' as indicated in Figure (a) Since VOUT = -IT*Rf, the following steps apply: If all three of the resistors are equal (R1 = R 2 = Rf = R), then The previous equation shows that the output voltage has the same magnitude as the sum of the two input voltages but with a negative sign, indicating inversion. A general expression is given in following equation for a unity-gain summing amplifier with n
  • 90. F.Y. B. Tech.-EEE Lab 2016 MIT Academy of Engineering, Alandi (D), Pune Page 90 inputs, as shown in Figure (b) where all resistors are equal in value. Figure (b): Summing amplifier with n inputs. Figure (c): Two-input inverting summing amplifier. APPLICATIONS OF SUMMING AMPLIFIERS: • Averaging amplifiers • Scaling adder • D/A Conversion DIFFERENTIAL AMPLIFIER: Thus far we have used only one of the operational amplifiers inputs to connect to the amplifier, using either the "inverting" or the "non-inverting" input terminal to amplify a single input signal with the other input being connected to ground. But we can also connect signals to both of the inputs at the same time producing another common type of operational amplifier circuit called a Differential Amplifier.
  • 91. F.Y. B. Tech.-EEE Lab 2016 MIT Academy of Engineering, Alandi (D), Pune Page 91 Basically, as we saw in the first tutorial about operational amplifiers, all op-amps are "Differential Amplifiers" due to their input configuration. But by connecting one voltage signal onto one input terminal and another voltage signal onto the other input terminal the resultant output voltage will be proportional to the "Difference" between the two input voltage signals of V1 and V2. Then differential amplifiers amplify the difference between two voltages making this type of operational amplifier circuit a Subtractor unlike a summing amplifier which adds or sums together the input voltages. This type of operational amplifier circuit is commonly known as a Differential Amplifier configuration and is shown below: Figure (d): Differential Amplifier R1=R2=Rf = 1KΩ By connecting each input in turn to 0v ground we can use superposition to solve for the output voltage Vout. Then the transfer function for a Differential Amplifier circuit is given as:
  • 92. F.Y. B. Tech.-EEE Lab 2016 MIT Academy of Engineering, Alandi (D), Pune Page 92 By connecting each input in turn to 0v ground we can use superposition to solve for the output voltage Vout. Then the transfer function for a Differential Amplifier circuit is given as: When resistors, R1 = R2 and R3 = R4 the above transfer function for the differential amplifier can be simplified to the following expression: Differential Amplifier Equation If all the resistors are all of the same ohmic value, that is: R1 = R2 = R3 = R4 then the circuit will become a Unity Gain Differential Amplifier and the voltage gain of the amplifier will be exactly one or unity. Then the output expression would simply be Vout = V2 - V1. PROCEDURE: A) To measure the output voltage of summing and difference amplifiers implemented using IC 741 and to observe the output waveform on CRO. 1. Make the circuit connections as shown in figure (a) and figure (d). 2. Apply dual power supply of +12V and -12 V DC supply as +VCC and -VEE (pin no. 7 and pin no. 4
  • 93. F.Y. B. Tech.-EEE Lab 2016 MIT Academy of Engineering, Alandi (D), Pune Page 93 of IC 741). 3. Observe the output waveform on OUT Pin (Pin no: 6 of 741 op- amp) on CRO. 4. Calculate the output voltages for both the summing and difference amplifier RESULTS : OBSERVATION TABLE ON CRO Output voltages for summing and difference amplifier using the IC-741 Application Sr. No. VIN1 VIN2 VOUT SUMMING AMPLIFIER 1. 2. 3. DIFFERENCE 1. AMPLIFIER 2. 3. CONCLUSION: