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1. AEE 303
A/D & D/A
Converters
Dr. Dhawan Singh
Chitkara University, Punjab

2. Syllabus to be covered
D/A Converter and A/D converters:
DAC
Introduction, Digital to analog conversion, R-2R DAC,
weighted resistor DAC
ADC
A/D Converter: Analog to digital conversion using
Successive approximation method, Dual slope method.

3. Objective
� Recognize the relationship between digital and
analog value in D/A and A/D converters.
� Identify two type of D/A:
� The binary weighted resistor network
� The R-2R network
� Explain the operation of following A/D converters:
� Successive Approximation
� Dual Slope

5. Basic Terms
Resolution: the number of bits per conversion cycle that the
converter is capable of processing.
Accuracy: It means how the true ADC output reflects actual
input.
Throughput Rate: amount of time taken to complete the
whole conversion.

6. Interfacing with Analog World
using ADC and DAC

7. ADC

8. ADC
� There are several type of A/D converters.
Here, we will consider the following two
types:
� Successive Approximation Type
� Dual Slope Type

9. Dual Slope ADC

10. Operation: Dual Slope ADC
Advantages of Dual Slope ADC
• It is one of the slowest and most inexpensive ADC
• It had another advantage of low sensitivity to noise and to variation caused
by temperature change
Operation of Dual Slope ADC
• A dual slope ADC is made up of an integrator, a comparator, a counter an
AND gate a control switch and two analog inputs Vref and Va
• A dual slope ADC uses an op-amp to integrate the input (Vref and Va ) and
thus giving a ramp signal as an output.
• Initially let us assume that the counter is reset and output of integrator is 0.
• The conversion begin as the the switch is connected to analog input (Ein )
• As shown in Figures 1a and 1b, the voltage to be measured (Va) is input to
an integrator, charging the capacitor for a fixed time interval t1, which
corresponds to a certain number of clock cycles.

11. Operation: Dual Slope ADC
• This fixed interval of time is controlled by sensing the time when the
counter reaches a particular count. At this time counter is reset and the
control switch connects to (Vref) .So, a known reference voltage (Vref) of
opposite polarity is applied to the integrator, discharging the capacitor. The
time (and number of clock cycles) required to bring the integrator output
back to zero, (t2 – t1), is measured.
• The charge on the capacitor at time t1 is proportional to the average value
of (Va) times t1. This is equal to the charge lost by the capacitor during time
t2 – t1, while being discharged by the reference voltage, proportional to
(Vref) times (t2 – t1). Hence (t2 – t1) / t1 is proportional to Va / Vref . The
output binary count for the time interval (t2 – t1) is thus proportional to Va,
the input voltage.

12. Successive Approximation
ADC

13. Operation: Successive Approximation
● Successive approximation ADC is designed to reduce the conversion and to increase speed of
operation.
● In successive approximation ADC the normal counter is replaced with successive
approximation register (SAR) as shown in below figure.
● The successive approximation register counts by changing the bits from MSB to LSB according to
input. The detailed operation is shown below
● The principle of successive approximation process for a 4-bit conversion is explained here. This
type of ADC operates by successively dividing the voltage range by half, as explained in the
following steps.
(1) The MSB is initially set to 1 with the remaining three bits set as 000. The digital equivalent
voltage is compared with the unknown analog input voltage.
(2) If the analog input voltage is higher than the digital equivalent voltage, the MSB is retained
as 1 and the second MSB is set to 1. Otherwise, the MSB is set to 0 and the second MSB is set
to 1. Comparison is made as given in step (1) to decide whether to retain or reset the second
MSB.
The above steps are more accurately illustrated with the help of an example.
Let us assume that the 4-bit ADC is used and the analog input voltage is VA = 11 V. when the
conversion starts, the MSB bit is set to 1.
Now VA = 11V > VD = 8V = [1000]2

14. Operation: Successive Approximation
Since the unknown analog input voltage VA is higher than the equivalent digital voltage VD, as
discussed in step (2), the MSB is retained as 1 and the next MSB bit is set to 1 as follows
VD = 12V = [1100]2
Now VA = 11V < VD = 12V = [1100]2
Here now, the unknown analog input voltage VA is lower than the equivalent digital voltage VD.
As discussed in step (2), the second MSB is set to 0 and next MSB set to 1 as
VD = 10V = [1010]2
Now again VA = 11V > VD = 10V = [1010]2
Again as discussed in step (2) VA>VD, hence the third MSB is retained to 1 and the last bit is set
to 1. The new code word is
VD = 11V = [1011]2
Now finally VA = VD , and the conversion stops.