What are the advantages and disadvantages of membrane structures.pptx
Network analysis techniques basics
1. Network Theory(19EC33)
2020-21
Class-7: Network Analysis Techniques
MOHANKUMAR V.
ASSISTANT PROFESSOR
D E P A R TM E N T O F E L E C TR O N I C S A N D C O M M U N I C A TI O N E N G I N E E R I N G
D R . A M B E D K A R I N S TI TU TE O F TE C H N O L O G Y , B E N G A L U R U - 5 6
E - M A I L : MO H A N K U MA R . V @ D R - A I T . O R G
2. Dept. of ECE, Dr. Ambedkar Institute of Technology, Bengaluru
Network Theory (19EC33)
Network Analysis Techniques
Network Analysis: To study the behaviour ( Finding the voltages, currents) of electrical circuits.
Types:
1. Mesh Analysis
2. Node Analysis
Terminologies and definitions
Loop: Any closed path
Example: A-B-E-F-A, B-C-D-E-B, E-D-G-F-E, A-B-C-D-E-F-A, A-B-C-D-G-
F-A, A-B-E-D-G-F-A and B-C-D-E-F-G-D.
Mesh: Closed path without closed loops inside it.
Example: A-B-E-F-A, B-C-D-E-B and F-E-D-G-F
Node: Point or junction where two or more elements are connected
together.
Example: A, B, C, D, E, F and G.
Fundamental Node: Point or Junction where current is dividing.
Example: B, E, D and F. Note:
1. All meshes are loops and vice-versa is not true.
2. All fundamental nodes are nodes and vice-versa is not true
3. Dept. of ECE, Dr. Ambedkar Institute of Technology, Bengaluru
Network Theory (19EC33)
Network Analysis Techniques
KVL: Kirchhoff's Voltage Law
Statement:
Algebraic sum of the voltages in any Loop is equal to zero.
𝑖. 𝑒. , 𝑉𝑙𝑜𝑜𝑝 = 0
OR
Algebraic sum of the voltages applied is equal to the algebraic sum of the voltage developed
across the elements in a loop.
𝑖. 𝑒. , 𝑉𝐴𝑝𝑝𝑙𝑖𝑒𝑑 = 𝑉𝑑𝑟𝑜𝑝
Example:
KVL to loop ABEFA
−𝑉1 + 𝑅0 𝐼1 + 𝑅1 𝐼2 + 𝑅2 𝐼5 = 0;
OR
𝑉1 = 𝑅0 𝐼1 + 𝑅1 𝐼2 + 𝑅2 𝐼5
4. Dept. of ECE, Dr. Ambedkar Institute of Technology, Bengaluru
Network Theory (19EC33)
Network Analysis Techniques
KCL: Kirchhoff's Current Law
Statement:
Algebraic sum of the branch Currents meeting at a node is equal to zero.
𝑖. 𝑒. , 𝐼 𝑛𝑜𝑑𝑒 = 0;
OR
Algebraic sum of the Current entering the node is equal to the algebraic sum of the currents
leaving the node.
𝑖. 𝑒. , 𝐼 𝐸𝑛𝑡𝑒𝑟𝑖𝑛𝑔 = 𝐼𝑙𝑒𝑎𝑣𝑖𝑛𝑔
Example:
At Node B
Apply KCL
𝐼1 − 𝐼2 − 𝐼3 = 0;
OR
𝐼1 = 𝐼2 + 𝐼3 ;
5. Dept. of ECE, Dr. Ambedkar Institute of Technology, Bengaluru
Network Theory (19EC33)
Examples:
1. Find the branch currents and voltages for the electrical circuit shown in figure.
−10 + 5𝐼1 + 15𝐼2 = 0 −− − 1
10𝐼3 + 20𝐼4 − 15𝐼2 = 0 −− −(2)
𝐼3 = 𝐼4 −− −(3)
𝐼1 = 𝐼2 + 𝐼3 −− −(4)
Substitute 4 in 1
5 𝐼2 + 𝐼3 + 15𝐼2 = 10
20𝐼2 + 5𝐼3 = 10 − − 5
Substitute 3 in 2
10𝐼3 + 20𝐼3 − 15𝐼2
−15𝐼2 + 30𝐼3 = 0 − −(6)
𝑰 𝟐 =0.4 A
𝑰 𝟑 = 𝟎. 𝟐 𝑨
𝑰 𝟒 = 0.2 A
𝑰 𝟏 =0.6 A
6. Dept. of ECE, Dr. Ambedkar Institute of Technology, Bengaluru
Network Theory (19EC33)
Examples:
2. Find the branch currents for the electrical circuit shown in figure.
0.02 𝑥 − 80 + 0.02𝑥 + 0.01 𝑥 − 30 + 0.01 𝑥 + 40
+ 0.03 𝑥 − 80 + 0.01 𝑥 − 20 = 0 −− −(1)
0.1𝑥 = 4.1
𝑥 = 41𝐴
7. Dept. of ECE, Dr. Ambedkar Institute of Technology, Bengaluru
Network Theory (19EC33)
Examples:
3. Find the voltage “Vxy” for the electrical circuit shown in figure.
−2 + 3𝐼1 + 2𝐼1 = 0 −− − 1
𝑰 𝟏 = 𝟎. 𝟒𝑨
−4 + 3𝐼2 + 5𝐼2 = 0 − − 2
𝑰 𝟐 = 𝟎. 𝟓𝑨
𝑽 𝒙𝒚 = 𝑽 𝒙𝑨 + 𝑽 𝑨𝑩 + 𝑽 𝑩𝒚
𝑽 𝒙𝒚 = 𝟑 −𝑰 𝟏 + −𝟒 + 𝟑 𝑰 𝟐
𝑽 𝒙𝒚 = −𝟑. 𝟕 𝑽𝒐𝒍𝒕𝒔
8. Dept. of ECE, Dr. Ambedkar Institute of Technology, Bengaluru
Network Theory (19EC33)
Disclaimer
Some Contents and Images showed in this PPT have
been taken from the various internet sources and
from books for educational purpose only.
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