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Nodal and Mesh Analysis
Boylestad: Art 8.9 , P:306; Alexender: Art:3.2, P:76,
Node: A node is a junction of two or more branches,
where a branch is any combination of series elements.
Boylestad P:290.
Mesh: A mesh is a loop ,no other loop inside in it.
Boylestad
Mesh: A mesh is a loop which does not contain any
other loops within it. Alex P:88,
Active Node and Reference Node:
EEE-
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1
Determinants Methods For Solving Simultaneous
Equation
Boylestad: Appendix D, P:1128-1135
Simultaneous Equation Solution using
Calculator
“Youtube”
EEE-
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2
Nodal Analysis
Boylestad: Art 8.9 , P:306; Alexender: Art:3.2, P:76,
Procedure
1. Determine the number of nodes within the network.
2. Pick a reference node and label each remaining node
with a subscripted value of voltage: V1, V2 , and so on.
3. Apply KCL at each node
4. Solve the resulting simultaneous equations for the nodal
voltages.
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3
Nodal Analysis
Alexender: Example:3.1, P:78
......(1
)
......(2
)
At node 1, applying KCL
At node 2, applying KCL
Solving (1)and(2)
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4
Nodal Analysis
Write the nodal equations and find the voltage across the 2Ω resistor for the network in Figure.
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Nodal Analysis
Alexender: Art:3.3, P:82
Supernode:A supernode is formed by enclosing a voltage source connected between two
nonreference nodes and any elements connected in parallel with it.
At node 1,
v1 =10V..........(1)
Now, the supernode condition
v2 - v3 = 5V..........(2)
At supernode (2&3), applying KCL
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6
18v1 15v2  2v3  0........(3)
v1 
v2 
v3 
After solving (1), (2) and (3)
Nodal Analysis
Alexender: Example:3.3, P:82
Now, the supernode condition
v2 - v1 = 2V..........(1)
At supernode (1&2), applying KCL
 7  0
2v1  v2  20........(2)

v2
2 10 4 10
5  0; 
v1
 5
v1

v2
2 4 2 4

v1  v2

v2

v2  v1
 2
v1
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Nodal Analysis
Supernode Practice
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8
Mesh Analysis
Boylestad: Art 8.7 , P:295, P:, Alexender: Art:3.4 P:87,
Steps of Mesh Analysis
1. Assign a distinct current in the clockwise/anticlockwise
direction to each mesh.
2. Indicate the polarities for each element in each mesh.
3. Apply KVL around each closed loop.
4. Solve the equations for the assumed mesh currents.
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9
Mesh Analysis
Alexender: Example:3.5, P:90
KVL in mesh-1
Solving above two equations
KVL in mesh-2
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Mesh Analysis
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11
Supermesh Analysis
Alexender: Art:3.5, P:92
A supermesh results when two meshes have a current source in common.
Now, the supermesh condition
i2 - i1 = 6A.........(1)
In supermesh (2&3), applying KVL
Solving above two equations
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12
Supermesh Analysis
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13
Network Theorems
Boylestad: Ch:9 , P:345, P:, Alexender: Chap:4 P:119,
1. Superposition Theorem
2. Thévenin’s Theorem
3. Norton’s Theorem
4. Maximum Power Transfer Theorem
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14
Superposition Theorem
Boylestad: Art:9.1 , P:345, Alexender: Art:4.3 P:123;
Statement: The current through, or voltage across, any element of a
linear network is equal to the algebraic sum of the currents or
voltages produced independently by each source.
Steps to Apply Superposition Principle:
1. Turn off all independent sources except one source. Find the
output (voltage or current) due to that active source using nodal
or mesh analysis.
2. Repeat step 1 for each of the other independent sources.
3. Find the total contribution by adding algebraically all the
contributions due to the independent sources.
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Superposition Theorem
Alexender: Exam:4.3 P:123;
To obtain v1, we set the current
source to zero. Applying KVL to the loop.
To get v2, we set the voltage source to zero,Using
current division,
Or,
v2  (4 8) *3  8V
Therefore,
EEE-
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Superposition Theorem
Alexender: Ex:4.5 P:126;
To get i1,
To get i2,
To get i3,
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Superposition Theorem
EEE-
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18
Thévenin’s Theorem
Boylestad: Art:9.3 , P:353, Alexender: Art:4.5 P:132;
Statement: A linear two-terminal circuit can be replaced by an
equivalent circuit consisting of a voltage source in series with a
resistor.
Steps to Apply:
1. Remove that portion of the network where the Thévenin
equivalent circuit is to be applied.
2. Mark the terminals of the remaining two-terminal network.
3. Calculate the open-circuit voltage (ETh) between the marked
terminals.
4. Caculate the seen resistance from the marked terminal.
5. Draw Thévenin equivalent circuit.
6. Complete the Thévenin equivalent circuit by connecting the
removed portion in step1
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19
Thévenin’s Theorem
Alexender: Ex:4.8 P:133;
At the top node, KCL gives
The Thevenin equivalent
circuit
Rth
Eth
EEE-
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20
/Eth
Thévenin’s Theorem
Boylestad: Ex:9.10 P:359;
Eth
6 0.8 4
 6

Eth 10
 0
Eth

Eth
Eth
Eth=3V
Rth
Rth=2 kΩ
The Thevenin equivalent circuit
EEE-
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21
Thévenin’s Theorem
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22
Norton’s Theorem
Boylestad: Art:9.3 , P:353, Alexender: Art:4.5 P:132;
Statement: A linear two-terminal circuit can be replaced by an
equivalent circuit consisting of a current source in parallel with
a resistor.
Steps to Apply:
1. Remove that portion of the network where the Norton
equivalent circuit is to be applied.
2. Mark the terminals of the remaining two-terminal network.
3. Calculate the short circuit current (IN) between the marked
terminals.
4. Caculate the seen resistance from the marked terminal.
5. Draw Norton equivalent circuit.
6. Complete the Norton equivalent circuit by connecting the
removed portion in step1
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Norton’s Theorem
Alexender: Ex:4.11 P:138;
IN
= Rth
Eth
Rth
Eth=4V
Thevenin’s
circuit
Norton’s
circuit
RN
IN
EEE-
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24
th
N
R
I 
Eth
Norton’s Theorem
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25
Maximum Power Transfer Theorem
Boylestad: Art:9.5 , P:367, Alexender: Art:4.8 P:142;
Statement:A load will receive maximum power from a network
when its resistance is exactly equal to the Thévenin resistance of
the network applied to the load.
The power delivered to the load
x=RL
u=RL
v=(RTh+RL)2
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Maximum Power Transfer Theorem
Alexender: Ex:4.13 P:143;
From,Thevenin
'stheorem
ETh VTh  22V
RTh 9
For maximum power to load
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Maximum Power Transfer Theorem
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28
AC Circuit
Analysis
Alexender: Sinusoids and Phasors, Chap:9 P:352;
Complex number:
Complex Algebra:
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29
AC Circuit
Analysis
Alexender: Sinusoids and Phasors, Chap:9 P:352;
A sinusoid is a signal that has the form of the sine or cosine function.
v1(t) = Vm sin ωt
v2(t) =Vm cos ωt =Vm sin (ωt+90°)
EEE-
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30
v1(t) = Vm sin ωt =Vm cos (ωt-90°)
v2(t) =Vm cos ωt
AC Circuit
Analysis
31
EEE-
3111
Alexender: Sinusoids and Phasors, Art:9.3 P:359;
A phasor is a complex number that represents the amplitude and phase of a
sinusoid.
Time Domain Represntation
v1(t) = Vm sin ωt
v2(t) =Vm sin (ωt+90°)
Time Domain Represntation
v2(t) =Vm cos ωt
v1(t) = Vm cos (ωt-90°)
Phasor Domain Represntation
V2  Vm0
V2 Vm90
V1 Vm0
V1  Vm90
Phasor Domain Represntation
In general,
v1(t) = Vm sin ωt
v2(t) =Vm sin (ωt±θ)
V1  Vm0
V2  Vm θ
2
Time Domain Represntation
v(t) = Vm sin ωt
Phasor Domain Represntation
V  Vm0 (Maximum Value )
V 
Vm
0(RMS Value )
AC Circuit
Analysis
Alexender: Art:9.4 P:359; Boylestad Art 14.3, P:589
PHASOR RELATIONSHIPS FOR CIRCUIT ELEMENTS: Resistor
Z=R
EEE-
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32
I  Im ϕ
V  Vm 0
V  IR
AC Circuit
Analysis
3
3
Alexender: Art:9.4 P:359; Boylestad Art 14.3, P:589
PHASOR RELATIONSHIPS FOR CIRCUIT ELEMENTS: Inductor
Z=jωL=jXL=XL<90°
 jX L I L
VL  ωLI m sin( ωt  90 )
VL  ωLI m 90   jωLI L
V  jXLI
XL=ωL
EEE-
3111
IL  Im 0
I  Im ϕ
AC Circuit
Analysis
Alexender: Art:9.4 P:359; Boylestad Art 14.3, P:589
PHASOR RELATIONSHIPS FOR CIRCUIT ELEMENTS: Capacitor
Z=-j/(ωC)=-jXC=XC<-90°
I C   j I C   jX C I C
VC 
iC  ωCV m sin( ωt  90 )
I C  ωCV m  90   jωCV C ( In phasor
jωC ωC
form )
1 1
V   jX C I
XC=1/(ωC)
I
EEE-
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34
I   j I   jX
ωC
jωC
V 
I  ωCV
C
m
i  ωCVm cos(ωt  90)
In Phasor form
e j (ϕ90)
 jωCV
1
1
VC  Vm 0
V  Vm ϕ
AC Circuit
Analysis
Alexender: Art:9.4 P:359; Boylestad Art 14.3, P:589
PHASOR RELATIONSHIPS FOR CIRCUIT ELEMENTS:
Ohm’s
Law: I
V
 Z  V  IZ
v I R cos( ωt  ϕ)
In time domain ,
ϕ* R
I  I ϕ;
Z  R
i  I m cos( ωt  ϕ)
In Phasor form
V  I Rϕ
V  IZ  I
m
m
m
m
v  ωLI cos( ωt  ϕ 90 )
In time domain ,
ϕ* jX
V  jωLI m ϕ ωLI m ϕ 90 
I  I ϕ;
V  IZ  I
Z  jX  jωL
L
i  Im cos( ωt  ϕ)
form
In Phasor
m
m L
m
i  ωCV cos( ωt  ϕ 90 )
  90 
V V ϕ
Z  jX
V  V cos( ωt  ϕ)
I 
 j
 X
Z   jX 
ωC
I  jωCV m ϕ ωCV m ϕ 90 
In time domain ,
m
C
 m
In Phasor form
V  Vm ϕ;
m
C
C
EEE-
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35
AC Circuit
Analysis
Alex Art 9.7, P: 373;Boylestad Art 15.3, 15.7, P:643,664
Impedances in Series and Parallel :
EEE-
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36
AC Circuit
Analysis
Alex Art 9.6, P: 372;Boylestad Art 15.3, 15.4, P:644,650
Kirchhoffs Voltage Law(KVL) :
Voltage Divider Rule(VDR) :
2
EEE-
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37
2
1
2
1
2
1
1
* Z
* Z
Z  Z
E
V 
Z  Z
E
V 
AC Circuit
Analysis
Alex Art 9.7, P: 373;Boylestad Art 15.8,15.9, P:668,675
Kirchhoffs Current Law(KVL) :
Current Divider Rule(VDR) :
T
EEE-
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38
IT Z 2

VP
) 
IT Z1 Z 2
T
P
I
Z 2
I
2
1
2
1
1
1
1 2
Z  Z
2
1
V  I (Z Z

Z Z  Z Z  Z

AC Circuit Analysis
ω1000rad /sec
Z1  R  30
Z2  jXL  jω
L  j*1000rad/sec*65mH j65
i(t)  i  0.24cos(1000t 38.13) A
 0.2438.13 A
Z 5053.13
I 
VS

InPhasor form
Vs 1215V
Z  Z1  Z2  Z3  30 j65 j25
 30 j40  5053.13
  j25
ω
C (1000rad/sec)*(40μ
F)

 j

 j
Z3   jXC
1215
EEE-
3111
39
AC Circuit
Analysis
Z1  R  30
Z2  jXL  jω
L  j*1000rad/sec*65mH j65
  j25
ω
C (1000rad/sec)*(40μ
F)
InPhasor form
Vs 1215V
VR  IZ1  IR  0.2438.13*30 7.238.13V
VL  IZ2  I( jXL )  0.2438.13*( j65) 15.651.87V
VC  IZ3  I( jXC )  0.2438.13*( j25)  6128.13V

 j

 j
Z3   jXC
ω1000rad /sec
VS VR VL VC 1215V
 6128.13V
EEE-
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40
( j25)*1215
Z
Z
15.651.87V
( j65)*1215
Z
Z
Z
38.13V
S
V 
T
C
V 
S
V 
T
L
V 
S
T
R
5053.13
5053.13
 7.2
5053.13

V  V
U sing KVL U sin gVDR
VS VR VL VC  0 Z 30*1215
3
2
1
AC Circuit
Analysis
Z1
Z2
Z3
Alex Ex9.11, P: 376;
ω 4rad /sec
Vo VS VR  2015(0.1774.04*60)
17.1515.66V
vo 17.15cos(4t 15.66)V
Z 116.6259.04
V 2015
  0.1774.04A
I  S
Z  Z1  Z2 Z3  60( j25) ( j20)
 60 j100 116.6259.04
 j
   j25
 j
Z2   jXC 
Z3  jXL  jω
L  j*4rad /sec*5H j20
InPhasor form
Vs  2015V
ω
C (4rad /sec)*(10mF)
Z1  R  60
17.1515.96V
Z Z  j25 j20
Vo  I3Z3 1715.96V
VDR(Z2 Z3  j100)
 0.68105.96A
I3  I  I2 (KCL)
 0.1774.040.68105.96
 0.8574.04 A
Z3I

j20*0.1774.04
I 
o
V 
Z1  Z2 Z3 60 j100
Z3)

2015* j100
VS *(Z2
2 3
2
EEE-
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41
AC Circuit Analysis (Power)
Boylestad Art 14.5, P: 603;
EEE-
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42
AC Circuit Analysis (Power)
Boylestad Ex 16.2, P: 715;
P  I 2
R  80 2
* 3  19200 Watt
R 1
EEE-
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43
 VI cos(θ
V θI )  400 * 50 cos( 46.25  30)  19201 Watt
Psource
V  IZ  I2 Z2  I1Z1
 50 A136 .26 * ( j8)  400 46.25 V
AC Circuit Analysis (Power)
Boylestad Ex 16.4, P: 716;
EEE-
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44

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node analysis.pptx

  • 1. Nodal and Mesh Analysis Boylestad: Art 8.9 , P:306; Alexender: Art:3.2, P:76, Node: A node is a junction of two or more branches, where a branch is any combination of series elements. Boylestad P:290. Mesh: A mesh is a loop ,no other loop inside in it. Boylestad Mesh: A mesh is a loop which does not contain any other loops within it. Alex P:88, Active Node and Reference Node: EEE- 3111 1
  • 2. Determinants Methods For Solving Simultaneous Equation Boylestad: Appendix D, P:1128-1135 Simultaneous Equation Solution using Calculator “Youtube” EEE- 3111 2
  • 3. Nodal Analysis Boylestad: Art 8.9 , P:306; Alexender: Art:3.2, P:76, Procedure 1. Determine the number of nodes within the network. 2. Pick a reference node and label each remaining node with a subscripted value of voltage: V1, V2 , and so on. 3. Apply KCL at each node 4. Solve the resulting simultaneous equations for the nodal voltages. EEE- 3111 3
  • 4. Nodal Analysis Alexender: Example:3.1, P:78 ......(1 ) ......(2 ) At node 1, applying KCL At node 2, applying KCL Solving (1)and(2) EEE- 3111 4
  • 5. Nodal Analysis Write the nodal equations and find the voltage across the 2Ω resistor for the network in Figure. EEE- 3111 5
  • 6. Nodal Analysis Alexender: Art:3.3, P:82 Supernode:A supernode is formed by enclosing a voltage source connected between two nonreference nodes and any elements connected in parallel with it. At node 1, v1 =10V..........(1) Now, the supernode condition v2 - v3 = 5V..........(2) At supernode (2&3), applying KCL EEE- 3111 6 18v1 15v2  2v3  0........(3) v1  v2  v3  After solving (1), (2) and (3)
  • 7. Nodal Analysis Alexender: Example:3.3, P:82 Now, the supernode condition v2 - v1 = 2V..........(1) At supernode (1&2), applying KCL  7  0 2v1  v2  20........(2)  v2 2 10 4 10 5  0;  v1  5 v1  v2 2 4 2 4  v1  v2  v2  v2  v1  2 v1 EEE- 3111 7
  • 9. Mesh Analysis Boylestad: Art 8.7 , P:295, P:, Alexender: Art:3.4 P:87, Steps of Mesh Analysis 1. Assign a distinct current in the clockwise/anticlockwise direction to each mesh. 2. Indicate the polarities for each element in each mesh. 3. Apply KVL around each closed loop. 4. Solve the equations for the assumed mesh currents. EEE- 3111 9
  • 10. Mesh Analysis Alexender: Example:3.5, P:90 KVL in mesh-1 Solving above two equations KVL in mesh-2 EEE- 3111 10
  • 12. Supermesh Analysis Alexender: Art:3.5, P:92 A supermesh results when two meshes have a current source in common. Now, the supermesh condition i2 - i1 = 6A.........(1) In supermesh (2&3), applying KVL Solving above two equations EEE- 3111 12
  • 14. Network Theorems Boylestad: Ch:9 , P:345, P:, Alexender: Chap:4 P:119, 1. Superposition Theorem 2. Thévenin’s Theorem 3. Norton’s Theorem 4. Maximum Power Transfer Theorem EEE- 3111 14
  • 15. Superposition Theorem Boylestad: Art:9.1 , P:345, Alexender: Art:4.3 P:123; Statement: The current through, or voltage across, any element of a linear network is equal to the algebraic sum of the currents or voltages produced independently by each source. Steps to Apply Superposition Principle: 1. Turn off all independent sources except one source. Find the output (voltage or current) due to that active source using nodal or mesh analysis. 2. Repeat step 1 for each of the other independent sources. 3. Find the total contribution by adding algebraically all the contributions due to the independent sources. EEE- 3111 15
  • 16. Superposition Theorem Alexender: Exam:4.3 P:123; To obtain v1, we set the current source to zero. Applying KVL to the loop. To get v2, we set the voltage source to zero,Using current division, Or, v2  (4 8) *3  8V Therefore, EEE- 3111 16
  • 17. Superposition Theorem Alexender: Ex:4.5 P:126; To get i1, To get i2, To get i3, EEE- 3111 17
  • 19. Thévenin’s Theorem Boylestad: Art:9.3 , P:353, Alexender: Art:4.5 P:132; Statement: A linear two-terminal circuit can be replaced by an equivalent circuit consisting of a voltage source in series with a resistor. Steps to Apply: 1. Remove that portion of the network where the Thévenin equivalent circuit is to be applied. 2. Mark the terminals of the remaining two-terminal network. 3. Calculate the open-circuit voltage (ETh) between the marked terminals. 4. Caculate the seen resistance from the marked terminal. 5. Draw Thévenin equivalent circuit. 6. Complete the Thévenin equivalent circuit by connecting the removed portion in step1 EEE- 3111 19
  • 20. Thévenin’s Theorem Alexender: Ex:4.8 P:133; At the top node, KCL gives The Thevenin equivalent circuit Rth Eth EEE- 3111 20 /Eth
  • 21. Thévenin’s Theorem Boylestad: Ex:9.10 P:359; Eth 6 0.8 4  6  Eth 10  0 Eth  Eth Eth Eth=3V Rth Rth=2 kΩ The Thevenin equivalent circuit EEE- 3111 21
  • 23. Norton’s Theorem Boylestad: Art:9.3 , P:353, Alexender: Art:4.5 P:132; Statement: A linear two-terminal circuit can be replaced by an equivalent circuit consisting of a current source in parallel with a resistor. Steps to Apply: 1. Remove that portion of the network where the Norton equivalent circuit is to be applied. 2. Mark the terminals of the remaining two-terminal network. 3. Calculate the short circuit current (IN) between the marked terminals. 4. Caculate the seen resistance from the marked terminal. 5. Draw Norton equivalent circuit. 6. Complete the Norton equivalent circuit by connecting the removed portion in step1 EEE- 3111 23
  • 24. Norton’s Theorem Alexender: Ex:4.11 P:138; IN = Rth Eth Rth Eth=4V Thevenin’s circuit Norton’s circuit RN IN EEE- 3111 24 th N R I  Eth
  • 26. Maximum Power Transfer Theorem Boylestad: Art:9.5 , P:367, Alexender: Art:4.8 P:142; Statement:A load will receive maximum power from a network when its resistance is exactly equal to the Thévenin resistance of the network applied to the load. The power delivered to the load x=RL u=RL v=(RTh+RL)2 EEE- 3111 26
  • 27. Maximum Power Transfer Theorem Alexender: Ex:4.13 P:143; From,Thevenin 'stheorem ETh VTh  22V RTh 9 For maximum power to load EEE- 3111 27
  • 28. Maximum Power Transfer Theorem EEE- 3111 28
  • 29. AC Circuit Analysis Alexender: Sinusoids and Phasors, Chap:9 P:352; Complex number: Complex Algebra: EEE- 3111 29
  • 30. AC Circuit Analysis Alexender: Sinusoids and Phasors, Chap:9 P:352; A sinusoid is a signal that has the form of the sine or cosine function. v1(t) = Vm sin ωt v2(t) =Vm cos ωt =Vm sin (ωt+90°) EEE- 3111 30 v1(t) = Vm sin ωt =Vm cos (ωt-90°) v2(t) =Vm cos ωt
  • 31. AC Circuit Analysis 31 EEE- 3111 Alexender: Sinusoids and Phasors, Art:9.3 P:359; A phasor is a complex number that represents the amplitude and phase of a sinusoid. Time Domain Represntation v1(t) = Vm sin ωt v2(t) =Vm sin (ωt+90°) Time Domain Represntation v2(t) =Vm cos ωt v1(t) = Vm cos (ωt-90°) Phasor Domain Represntation V2  Vm0 V2 Vm90 V1 Vm0 V1  Vm90 Phasor Domain Represntation In general, v1(t) = Vm sin ωt v2(t) =Vm sin (ωt±θ) V1  Vm0 V2  Vm θ 2 Time Domain Represntation v(t) = Vm sin ωt Phasor Domain Represntation V  Vm0 (Maximum Value ) V  Vm 0(RMS Value )
  • 32. AC Circuit Analysis Alexender: Art:9.4 P:359; Boylestad Art 14.3, P:589 PHASOR RELATIONSHIPS FOR CIRCUIT ELEMENTS: Resistor Z=R EEE- 3111 32 I  Im ϕ V  Vm 0 V  IR
  • 33. AC Circuit Analysis 3 3 Alexender: Art:9.4 P:359; Boylestad Art 14.3, P:589 PHASOR RELATIONSHIPS FOR CIRCUIT ELEMENTS: Inductor Z=jωL=jXL=XL<90°  jX L I L VL  ωLI m sin( ωt  90 ) VL  ωLI m 90   jωLI L V  jXLI XL=ωL EEE- 3111 IL  Im 0 I  Im ϕ
  • 34. AC Circuit Analysis Alexender: Art:9.4 P:359; Boylestad Art 14.3, P:589 PHASOR RELATIONSHIPS FOR CIRCUIT ELEMENTS: Capacitor Z=-j/(ωC)=-jXC=XC<-90° I C   j I C   jX C I C VC  iC  ωCV m sin( ωt  90 ) I C  ωCV m  90   jωCV C ( In phasor jωC ωC form ) 1 1 V   jX C I XC=1/(ωC) I EEE- 3111 34 I   j I   jX ωC jωC V  I  ωCV C m i  ωCVm cos(ωt  90) In Phasor form e j (ϕ90)  jωCV 1 1 VC  Vm 0 V  Vm ϕ
  • 35. AC Circuit Analysis Alexender: Art:9.4 P:359; Boylestad Art 14.3, P:589 PHASOR RELATIONSHIPS FOR CIRCUIT ELEMENTS: Ohm’s Law: I V  Z  V  IZ v I R cos( ωt  ϕ) In time domain , ϕ* R I  I ϕ; Z  R i  I m cos( ωt  ϕ) In Phasor form V  I Rϕ V  IZ  I m m m m v  ωLI cos( ωt  ϕ 90 ) In time domain , ϕ* jX V  jωLI m ϕ ωLI m ϕ 90  I  I ϕ; V  IZ  I Z  jX  jωL L i  Im cos( ωt  ϕ) form In Phasor m m L m i  ωCV cos( ωt  ϕ 90 )   90  V V ϕ Z  jX V  V cos( ωt  ϕ) I   j  X Z   jX  ωC I  jωCV m ϕ ωCV m ϕ 90  In time domain , m C  m In Phasor form V  Vm ϕ; m C C EEE- 3111 35
  • 36. AC Circuit Analysis Alex Art 9.7, P: 373;Boylestad Art 15.3, 15.7, P:643,664 Impedances in Series and Parallel : EEE- 3111 36
  • 37. AC Circuit Analysis Alex Art 9.6, P: 372;Boylestad Art 15.3, 15.4, P:644,650 Kirchhoffs Voltage Law(KVL) : Voltage Divider Rule(VDR) : 2 EEE- 3111 37 2 1 2 1 2 1 1 * Z * Z Z  Z E V  Z  Z E V 
  • 38. AC Circuit Analysis Alex Art 9.7, P: 373;Boylestad Art 15.8,15.9, P:668,675 Kirchhoffs Current Law(KVL) : Current Divider Rule(VDR) : T EEE- 3111 38 IT Z 2  VP )  IT Z1 Z 2 T P I Z 2 I 2 1 2 1 1 1 1 2 Z  Z 2 1 V  I (Z Z  Z Z  Z Z  Z 
  • 39. AC Circuit Analysis ω1000rad /sec Z1  R  30 Z2  jXL  jω L  j*1000rad/sec*65mH j65 i(t)  i  0.24cos(1000t 38.13) A  0.2438.13 A Z 5053.13 I  VS  InPhasor form Vs 1215V Z  Z1  Z2  Z3  30 j65 j25  30 j40  5053.13   j25 ω C (1000rad/sec)*(40μ F)   j   j Z3   jXC 1215 EEE- 3111 39
  • 40. AC Circuit Analysis Z1  R  30 Z2  jXL  jω L  j*1000rad/sec*65mH j65   j25 ω C (1000rad/sec)*(40μ F) InPhasor form Vs 1215V VR  IZ1  IR  0.2438.13*30 7.238.13V VL  IZ2  I( jXL )  0.2438.13*( j65) 15.651.87V VC  IZ3  I( jXC )  0.2438.13*( j25)  6128.13V   j   j Z3   jXC ω1000rad /sec VS VR VL VC 1215V  6128.13V EEE- 3111 40 ( j25)*1215 Z Z 15.651.87V ( j65)*1215 Z Z Z 38.13V S V  T C V  S V  T L V  S T R 5053.13 5053.13  7.2 5053.13  V  V U sing KVL U sin gVDR VS VR VL VC  0 Z 30*1215 3 2 1
  • 41. AC Circuit Analysis Z1 Z2 Z3 Alex Ex9.11, P: 376; ω 4rad /sec Vo VS VR  2015(0.1774.04*60) 17.1515.66V vo 17.15cos(4t 15.66)V Z 116.6259.04 V 2015   0.1774.04A I  S Z  Z1  Z2 Z3  60( j25) ( j20)  60 j100 116.6259.04  j    j25  j Z2   jXC  Z3  jXL  jω L  j*4rad /sec*5H j20 InPhasor form Vs  2015V ω C (4rad /sec)*(10mF) Z1  R  60 17.1515.96V Z Z  j25 j20 Vo  I3Z3 1715.96V VDR(Z2 Z3  j100)  0.68105.96A I3  I  I2 (KCL)  0.1774.040.68105.96  0.8574.04 A Z3I  j20*0.1774.04 I  o V  Z1  Z2 Z3 60 j100 Z3)  2015* j100 VS *(Z2 2 3 2 EEE- 3111 41
  • 42. AC Circuit Analysis (Power) Boylestad Art 14.5, P: 603; EEE- 3111 42
  • 43. AC Circuit Analysis (Power) Boylestad Ex 16.2, P: 715; P  I 2 R  80 2 * 3  19200 Watt R 1 EEE- 3111 43  VI cos(θ V θI )  400 * 50 cos( 46.25  30)  19201 Watt Psource V  IZ  I2 Z2  I1Z1  50 A136 .26 * ( j8)  400 46.25 V
  • 44. AC Circuit Analysis (Power) Boylestad Ex 16.4, P: 716; EEE- 3111 44