8. Complex Logic Circuits
•OR by parallel-
connected drivers.
•AND by series-
connected drivers.
•Inversion by MOS
circuit operation.
9. CMOS Logic Circuit
Pull down graph (NMOS)
Vertex represents
node
Pull up graph: vertex is drawn with area
of pull down graph. Edge cross pull down
graph’s edge once.
14. Stick Diagram
• A stick diagram is a graphical view of a
layout.
• Does show all components/vias (except
possibly tub ties), relative placement.
• Does not show exact placement, transistor
sizes, wire lengths, wire widths, tub
boundaries.
15. Stick Diagram
• Represents relative positions of transistors
• Stick diagrams help plan layout quickly
– Need not be to scale
– Draw with color pencils or dry-erase markers
In
Out
VDD
GND
Inverter
A
Out
VDD
GND
B
NAND2
16. Common Euler Path
The Euler path is defined as an uninterrupted path
that traverses each edge (branch) of the graph exactly once
18. References
• S-M. Kang and Y. Leblebici ,CMOS Digital
Integrated Circuits: Analysis and Design,,
3rd edition
• Jan M. Rabaey, Anantha Chandrakasan,
and Borivoje Nikolic, Digital Integrated
Circuits: A Design Perspective, 2nd
edition, Prentice Hall, 2002.