1. Jyoti Tiwari
Email: jyotitiwari55@gmail.com
Current Address:
Viman nagar,
Pune- 411014
India
Mobile: +91 8550969614
Objective:
• To work on challenging assignments where my abilities and knowledge can be used to contribute
towards the growth of the organization and further enhance my current levels of skill and
competency.
• To be among the best employees in your organization and achieve as much as possible to benefit
mutually based on my analytical and technical skills.
Summary
• A result oriented, self-motivated individual with a strong sense of responsibility, excellent
communication & interpersonal skill.
• Had done M.Tech from RGPV Bhopal.
• Knowledgeable in VHDL, Verilog, Spartan FPGA programming.
• Involved in the Teaching of subjects like CMOS, VLSI to Engineering Student for
continuous learning and Enhancement of technical and functional skills.
• Well versed with SDLC & STLC.
• Good knowledge as a Tester within a Waterfall Model and V-Model environment of software
development process.
• Good knowledge on bug tracking, bug analysis and in preparation of execution status reports
and Defect reports.
• Good knowledge on SRS review, test plan document, defect sheet document, test case writing,
test data preparation.
• Knowledge on different techniques of testing like Black box testing, White Box Testing.
• Sound knowledge of automation tool like “QTP, "QC", "Bugzilla", "Selenium".
• Ability troubleshooting, resolving, and escalating issues in a timely manner.
• Excellent soft skills such as leadership extracting best from each team member, communication,
organization, time management, multi-tasking, and people-management.
• An excellent team player, with a track record for meeting strict deadlines.

2. Technical Skills
Group
Software Tools/Technologies
Operating Systems Windows Family
Language C,C++,MAT Lab , VHDL, Verilog HDL, VHDL-AMS
Testing Manual and automation
Automation Tool QTP, Bugzilla, QC, Selenium
Database MSSQL server
Academic Projects
Project/Thesis Digital controller based on FPGA programming
Description
The design and implementation of digital controller based
on Field Programmable Gate Array (FPGA) device is more
compact, power efficient and provides high speed
capabilities as compared to software based PID
controllers. The proposed method is based on
implementation of Digital controller as digital filters using
DSP architectures. The PID controller is designed using
MATLAB and Simulink to generate a set of coefficients
associated with the desired controller characteristics. The
controller coefficients are then included in VHDL that
implements the PID controller on to FPGA. MATLAB
program is used to design PID controller to calculate and
plot the time response of the control system. The
synthesis report concludes the resource utilization of
selected FPGA.
Tools used
Modelsim, Spartan-3E FPGA
HDL Language : VHDL
Major Project Artificial Plant Growing system.
Description
Plant growing system is a versatile and efficient system
which is useful for proper care of the small plants in the
greenhouse. This system can add various different
functions according to the need of the greenhouse. This
system is basically based on microcontroller, controlling
system with different other component such as relay, ADC
board, Buzzer, and families of various sensors according
to the need of plant growing area.
Tools used
Hardware:8051 based development board, ADC 0809
board, relay board, LCD, Buzzer, 9V Adaptor/Battery.
Software: Kiel uv3 IDE, Flash magic.
Minor Project FIRE ALARM
Description
This project is based on the alertness and security for the
peoples they lived without any protection and awareness.
This project is giving information about the alertness
through the alarm or a type of security bell.
Tools used
Buzzer,Loudspeaker,555Timer,Potentiometer,connecting
wires

3. Educational Qualifications:
• RGPV, Bhopal Madhya Pradesh.
M. Tech
Passed with 89%
Thesis Enrolled
• RGPV, Bhopal Madhya Pradesh.
B.E(Electronics & Ins. Engineering)
Passed with 68 %
• Board of Secondary Education, Madhya Pradesh, Bhopal
10+2 passed with 68%
Personal:
Date of Birth: Dec 29th, 1988
Parents: Mr. S.B. Tiwari
Mrs. Urmila Tiwari
Marital Status: Married (Husband: Shivendra Mishra )
Citizenship: Indian
Interest: Reading Books, Singing song
Thanking you,
Date:
Place: - Pune Jyoti Tiwari