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International Journal of Modern Engineering Research (IJMER)
              www.ijmer.com               Vol.3, Issue.2, March-April. 2013 pp-659-666      ISSN: 2249-6645


                      Simulink Modeling of Novel Hybrid H-Bridge
                          Inverter for Smart Grid Application

                      Ch.Venkateswra rao, 1 S.S.Tulasiram, 2 Arun Kumar Rath3
                                  1
                                     (PHD scholar, Department of EEE, JNTUK, Kakinad, India)
                             2
                                 (Professor in Department of EEE, JNTUH, Hyderabad, AP India)
                                  3
                                    (Asst. Professor in Department of EEE, GIET, Gunupur, India)

Abstract: Hybrid H- bridge inverter. The proposed novel cascaded Hybrid H-bridge produces higher voltage levels with
less number this paper presents a single-phase multistring Multi-level photovoltaic (PV) inverter topology for Micro grid-
connected PV systems with a novel of devices. This will reduce the number of gate drives and protection circuits
requirement, this inurn reduces the cost increase the reliability. Design Procedure for various components of single Hybrid
H- bridge cell is given. A cascaded Grid connected PV topology is proposed. Finally a Matlab/Simulink based model is
developed and simulation results are presented.

Keywords:PVCell, Hybridge H-bridge, Multi-lebel phovoltaic(PV) inverter, Matalab/Simulink, Micro grid-connected PV
System;

                                                        I. Introduction
         Natural quantity available, it has been spotlighted as the future energy sources of promising potentiality, due As the
PV system is clean and large enough in the to the stable supply of the energy and alternative method of responding to the
problem of the earth environment followed by the increase of the demand for the electric power supply. Solar-electric-energy
demand has grown consistently by 20%–25% per annum over the past 20 years, which is mainly due to the decreasing costs
and prices. This decline has been driven by the following: 1) an increasing efficiency of solar cells; 2) manufacturing-
technology improvements; and 3) economies of scale [2]. A PV inverter, which is an important element in the PV system, is
used to convert dc power from the solar modules into ac power to be fed into the grid. A general overview of different types
of PV inverters is given in [3] and [4].
         In recent years, multilevel converters have shown some significant advantages over traditional two-level converters,
especially for high power and high voltage applications. In addition to their superior output voltage quality, they can also
reduce voltage stress across switching devices. Since the output voltages have multiple levels, lower dv/dt is achieved, which
greatly alleviates electromagnetic interference problems due to high frequency switching. Over the years most research work
has focused on converters with three to five voltage levels, although topologies with very high number of voltage levels were
also proposed. In general, the more voltage levels a converter has the less harmonic and better power quality it provides.
However, the increase in converter complexity and number of switching devices is a major concern for multilevel converter.
There are several topologies available, being the Neutral Point Clamped [5], Flying Capacitor [6] and Cascaded H bridge
inverter [7] the most studied and used. In recent years many variations and combinations of these topologies have been
reported, one of them is the cascaded H-bridge [7-10].

                                      II. HIGH POWER CONVERTERS CLASSIFICATIONS




                                         Figure 1 Classification of High power Converters



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International Journal of Modern Engineering Research (IJMER)
             www.ijmer.com             Vol.3, Issue.2, March-April. 2013 pp-659-666      ISSN: 2249-6645

        Fig.1 shows the classification of high power converters. Out of all converters Cascaded bridge configuration is
more popular. Cascaded bridge configuration is again classified into 2 types 1) Cascaded Half Bridge 2) Cascaded Full
Bridge or Cascaded H-Bridge. In this paper a novel cascaded hybrid H- Bridge topology is proposed for PV application.

A Half H-Bridge

                                                        S1

               Vdc/2

                                                           Vout

               Vdc/2
                                                          S2




                                                   Figure 2 Half Bridge

        Fig.2 shows the Half H-Bridge Configuration. By using single Half H-Bridge we can get 2 voltage levels. The
switching table is given in Table 1

                                         Table 1. Switching table for Half Bridge
                                          Switches Turn ON Voltage Level
                                                   S2                 Vdc/2
                                                   S1                -Vdc/2


B Full H-Bridge

                                           S1
                                                                                    S3


                                                                       Vout
                        Vdc

                                           S4
                                                                                    S2




                                                 Figure. 3 Full H-Bridges

         Fig.3 shows the Full H-Bridge Configuration. By using single H-Bridge we can get 3 voltage levels. The number
output voltage levels of cascaded Full H-Bridge are given by 2n+1 and voltage step of each level is given by Vdc/n. Where n
is number of H-bridges connected in cascaded. The switching table is given in Table2

C Hybrid H-Bridge

                                                                S1                              S3
              Vdc/2          D1                          D3

                                      Sa                                                 Vout


               Vdc/2                                            S4                              S2
                             D4                          D2



                                           Table 2. Switching tabe Full Bridge

                                           Switches Turn ON      Voltage Level
                                                 S1,S2                Vdc
                                                 S3,S4               -Vdc
                                                S4,D2                  0
                                                Figure. 4 Hybrid H-Bridges


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International Journal of Modern Engineering Research (IJMER)
             www.ijmer.com            Vol.3, Issue.2, March-April. 2013 pp-659-666      ISSN: 2249-6645

        Fig. 4 shows the Hybrid H-Bridge configuration. By using single Hybrid H-Bridge we can get 5 voltage levels. The
number output voltage levels of cascaded Hybrid H-Bridge are given by 4n+1 and voltage step of each level is given by
Vdc/2n. Where n is number of H-bridges connected in cascaded. The switching table of Hybrid H-Bridge is given in Table
3.

                                        Table 3. Switching table for Hybrid H-Bridge
                                        Switches Turn On               Voltage Level
                                             Sa, S2                        Vdc/2
                                             S1,S2                          Vdc
                                             S4,D2                           0
                                             Sa,S3                        -Vdc/2
                                             S3,S4                         -Vdc

D Cascaded Hybrid H-Bridge


                                                              S1                S3
                                D1                       D3
                    Vdc/4
                                        Sa


                    Vdc/4
                                                              S4                    S2
                                D4                       D2

                                                                                             Vout




                                                              S5                    S7
                                 D5                      D7
                     Vdc/4
                                         Sb


                     Vdc/4                                    S8                    S6
                                 D8                      D6




                                              Figure 5. Cascaded Hybrid H-Bridges

        The proposed CHHB uses less number of switches to produce more voltage levels. This will reduce Gate Drivers
and protection circuit requirement thus it reduce cost and complexity of the circuit. For example for 9 level output the
proposed converter uses 10 switches but cascaded H- Bridge converter uses 12 switches. This difference increases as the
number of output voltage levels increases

                                      Table 4 Switching table for Cascaded Hybrid H-Bridge
                                             Switches Turn On       Voltage Level
                                               Sa,S2,S8,D6              Vdc/4
                                               S1.S2,S8,D6             2Vdc/4
                                               S1,S2,Sb,S6             3Vdc/4
                                               S1,S2,S5,S6               Vdc
                                               S4,D2,S8,D6                0
                                               Sa,S3,S8,D6             -Vdc/4
                                               S3,S4,S8,D6            -2Vdc/4
                                               S3,S4,Sb,S7            -3Vdc/4
                                               S3,S4,S7,S8              -Vdc

                      III. DESIGN OF PROPOSED NOVEL HYBRID H-BRIDGE INVERTER
A. Device Current
        The IGBT and DIODE currents can be obtained from the load current by multiplying with the corresponding duty
cycles. Duty cycle,                           d = ½(1+Kmsinωt)
Where, m = modulation index K = +1 for IGBT, -1 for Diode.
                                                   iph = 2 𝐼 sin(πœ”π‘‘ βˆ’ ΓΈ )
Where i = RMS value of the load (output) current,
 Ø = Phase angle between load voltage and current.
Then the device current can be written as follows.
                                                     2
                                     ∴ 𝑖 𝑑𝑒𝑣𝑖𝑐𝑒 = 2 𝐼 sin πœ”π‘‘ βˆ’ ΓΈ βˆ— (1 + π‘˜π‘š sin πœ”π‘‘ )
The average value of the device current over a cycle is calculated as

                                                              www.ijmer.com                                   661 | Page
International Journal of Modern Engineering Research (IJMER)
              www.ijmer.com                 Vol.3, Issue.2, March-April. 2013 pp-659-666      ISSN: 2249-6645
                                                        πœ‹+ΓΈ
                                                   1           2
                                        𝑖 π‘Žπ‘£π‘” =   2πœ‹          2
                                                                   𝐼 sin πœ”π‘‘ βˆ’ ΓΈ βˆ— 1 + π‘˜ π‘šπ‘ π‘–π‘›πœ”π‘‘ π‘‘πœ”π‘‘
                                                        ΓΈ
                                                                                        1              𝐾 π‘š
                                                               =        2𝐼              2πœ‹
                                                                                             +          8
                                                                                                               cos ΓΈ
The device RMS current can be written as

                                πœ‹+ΓΈ 1                              2        1                                                           1       𝐾 π‘š
                 𝑖 π‘Ÿπ‘šπ‘  =    ΓΈ      2πœ‹
                                         2 𝐼 sin πœ”π‘‘ βˆ’ ΓΈ                βˆ—    2
                                                                                βˆ—            1 + π‘˜ π‘šπ‘ π‘–π‘›πœ”π‘‘ π‘‘πœ”π‘‘ = 2 𝐼                     8
                                                                                                                                            +   3πœ‹
                                                                                                                                                      cos ΓΈ

B. IGBT Loss Calculation
IGBT loss can be calculated by the sum of switching loss and conduction loss. Where conduction loss can be calculated by,
                                               2
          Pon (IGBT ) = Vceo βˆ— Iavg (igbt ) + Irms (igbt ) βˆ— rceo
                                                                                                1              π‘š
                                                        𝐼 π‘Žπ‘£π‘” (𝑖𝑔𝑏𝑑 ) = 2 𝐼                     2πœ‹
                                                                                                       +       8
                                                                                                                       cos ΓΈ
                                                                                                   1               π‘š
                                                       𝐼 π‘Ÿπ‘šπ‘  (𝑖𝑔𝑏𝑑 ) = 2 𝐼                                 +            cos ΓΈ
                                                                                                   8           3πœ‹
    Values of Vceo and rceo at any junction temperature can be obtained from the output characteristics (Ic vs. Vce) of the




                 IGBT as shown in Fig .6.
                                                            Figure 6 IGBT output characteristics

The switching losses are the sum of all turn-on and turn-off energies at the switching events
                                              𝐸 𝑠𝑀 = 𝐸 π‘œπ‘› + 𝐸 π‘œπ‘“π‘“ = π‘Ž + 𝑏 𝐼 + 𝑐 𝐼2
                                                                                                                                 𝑉 𝐷𝐢
Assuming the linear dependence, switching energy 𝐸 𝑠𝑀 =                                 π‘Ž + 𝑏 𝐼 + 𝑐 𝐼2 βˆ—
                                                                                                                                𝑉 π‘›π‘œπ‘š


 Here VDC is the actual DC-Link voltage and Vnom is the DC-Link Voltage at which Esw is given. Switching losses are
calculated by summing up the switching energies.
                                                           1
                                                     𝑃𝑠𝑀 = 𝑇   𝑛 𝐸 𝑠𝑀 𝑖
                                                                                        π‘œ


Here β€žnβ€Ÿ depends on the switching frequency.
                                                                       1
                                                            𝑃𝑠𝑀 =      π‘‡π‘œ           𝑛       π‘Ž + 𝑏 𝐼 + 𝑐 𝐼2
                                                                       1        π‘Ž            𝑏 𝐼           𝑐 𝐼2
                                                                       π‘‡π‘œ       2
                                                                                  +          πœ‹
                                                                                                   +           4


After considering the DC-Link voltage variations switching losses of the IGBT can be written as follows.
                                                                                        π‘Ž          𝑏 𝐼             𝑐 𝐼2        𝑉 𝐷𝐢
                                                   𝑃 𝑠𝑀 (𝐼𝐺𝐡𝑇 ) = 𝑓𝑠𝑀                       +              +              βˆ—
                                                                                        2              πœ‹           4           𝑉 π‘›π‘œπ‘š


So, the sum of conduction and switching losses gives the total losses.

              𝑃 𝑇(𝐼𝐺𝐡𝑇 ) = 𝑃 π‘œπ‘› (𝐼𝐺𝐡𝑇 ) + 𝑃 𝑠𝑀 (𝐼𝐺𝐡𝑇 )
          C. Diode Loss Calculation

The DIODE switching losses consists of its reverse recovery losses and the turn-on losses are negligible.


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International Journal of Modern Engineering Research (IJMER)
              www.ijmer.com             Vol.3, Issue.2, March-April. 2013 pp-659-666      ISSN: 2249-6645

              𝐸 π‘Ÿπ‘’π‘ = π‘Ž + 𝑏 𝐼 + 𝑐 𝐼2
                                                                       π‘Ž     𝑏 𝐼       𝑐 𝐼2       𝑉 𝐷𝐢
                                            𝑃 𝑠𝑀 (𝐷𝐼𝑂𝐷𝐸 ) = 𝑓𝑠𝑀      2
                                                                       +     πœ‹
                                                                                   +   4
                                                                                              βˆ—   𝑉 π‘›π‘œπ‘š
So, the sum of conduction and switching losses gives the total DIODE looses.

                                                𝑃 𝑇(𝐷𝐼𝑂𝐷𝐸 ) = 𝑃 π‘œπ‘› (𝐷𝐼𝑂𝐷𝐸 ) + 𝑃 𝑠𝑀 (𝐷𝐼𝑂𝐷𝐸 )

The total loss per one switch (IGBT+DIODE) is the sum of one IGBT and DIODE loss.

                                                     𝑃𝑇 = 𝑃 𝑇   𝐼𝐺𝐡𝑇       + 𝑃𝑇    𝐷𝐼𝑂𝐷𝐸


D. Thermal Calculations
          The junction temperatures of the IGBT and DIODE are calculated based on the device power losses and thermal
resistances. The thermal resistance equivalent circuit for a module is shown in Fig 7. In this design the thermal calculations
are started with heat sink temperature as the reference temperature. So, the case temperature from the model can be written
as follows.

                                                   𝑇𝑐 = 𝑃 𝑇 𝑅 𝑑𝑕 (π‘βˆ’π‘•) + 𝑇 𝑕
Here Rth(c-h) = Thermal resistance between case and heat sink

                                          PT = Total Power Loss (IGBT+DIODE)
IGBT junction temperature is the sum of the case temperature and temperature raise due to the power losses in the IGBT.

                                          𝑇𝑗 (𝐼𝐺𝐡𝑇 ) = 𝑃 𝑇(𝐼𝐺𝐡𝑇 ) 𝑅 𝑑𝑕(𝑗 βˆ’π‘)𝐼𝐺𝐡𝑇 + 𝑇𝑐
DIODE junction temperature is the sum of the case temperature and temperature raise due to the power losses in the DIODE.

junction    temperatures.    In    order     to make the calculated values close to the actual values,
                                          𝑇𝑗 (𝐷𝐼𝑂𝐷𝐸 ) = 𝑃 𝑇(𝐷𝐼𝑂𝐷𝐸 ) 𝑅 𝑑𝑕(𝑗 βˆ’π‘)𝐷𝐼𝑂𝐷𝐸 + 𝑇𝑐
         The above calculations are done based on the average power losses computed over a cycle. So, the corresponding
thermal calculation gives the average junction temperatures. In order to make the calculated values close to the actual values,

transient temperature values are to be added to the average junction temperatures.




                                        Figure. 7 Thermal resistance equivalent circuit

E. DC-Capacitor Selection
            The required capacitance for each cell depends on the allowable ripple voltage and the load current. The rms
ripple current flowing into the capacitor can be written as follows and the ripple current frequency is double the load current
frequency (Hybrid H-Bridge).



                                                                           S1                                    S3
                  Vdc/2           D1                            D3

                                           Sa                                                             Vout


                   Vdc/2                                                   S4                                    S2
                                  D4                            D2



                                             Figure. 8 Hybrid H- Bridge converter

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International Journal of Modern Engineering Research (IJMER)
             www.ijmer.com             Vol.3, Issue.2, March-April. 2013 pp-659-666      ISSN: 2249-6645

                                                    𝐼 1
                                         𝐼𝑐 = βˆ’            π‘ˆ π‘Žπ‘ βˆ— 𝐾 + πΌπœ”πΏ sin 2πœ”π‘‘
                                                  𝑉 𝑑𝑐 2
Since the value of β€žLβ€Ÿ is very small, the above equation can be written as below.

                                                                      𝐼 1
                                                           𝐼𝑐 = βˆ’               π‘ˆ π‘Žπ‘ βˆ— 𝐾 sin 2πœ”π‘‘
                                                                    𝑉 𝑑𝑐 2
                                         1     π‘ˆ π‘Žπ‘                π‘š
                             𝐼 𝐢 = βˆ’πΎ               βˆ— sin 2πœ”π‘‘ = βˆ’πΎ   sin 2πœ”π‘‘
                                         2     𝑉 𝑑𝑐                2
Here β€žmβ€Ÿ is the modulation index.
                                                                             𝑑 𝑒 𝑝𝑝
                                                            Here 𝐼 𝑐𝑝 = 𝐢      𝑑𝑑
                                                         π‘š
                                                           𝐼 2 = C 2πœ” βˆ— βˆ†π‘‰ 𝑉 𝑑𝑐
                                                         2
                                                                π‘š   1
                                                          C=                     2𝐼
                                                               4πœ” βˆ†π‘‰ 𝑉 𝑑𝑐


                                                 IV. PROPOSED PV SYSTEM

                                             PV String            DC/DC                CHHB
                                                                 Converter            Inverter

                                                                                                 AC




                                                                  DC/DC                CHHB
                                             PV String                                Inverter
                                                                 Converter


                                              Figure. 9. Grid Connected PV System

         The general block diagram of PV system is shown here. The PV string converters solar radiation into DC.Here we
are using DC/DC Boost converter to increase the output voltage. The output inverter converts DC into AC and feeding into
the grid. The proposed system uses small PV array cascading to produce higher voltage output. This system reduces overall
cost and complexity. The Fig.8 shows the proposed PV configuration.

                              V. SIMULINK MODELING AND SIMULATION RESULTS
        Fig. 10 Shows the Matlab/Simulink model of complete PV system. It consists of PV array block, DC/DC converter
Block, Hybrid H-Bridge Block.




                                    Figure. 10 Matlab/Simulink model of Hybrid H-bridge


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International Journal of Modern Engineering Research (IJMER)
               www.ijmer.com              Vol.3, Issue.2, March-April. 2013 pp-659-666      ISSN: 2249-6645

         Fig. 11 shows the inverter input DC voltage and Multilevel AC output voltage. Fig. 12 Shows the five level output
of the Hybrid H-Bridge. Fig.13 shows the grid voltage and current wave forms.




                                               Figure.11 Inverter Input and Output




                                          Figure12. Five level output of Hybrid H-bridge




                                             Figure13 Grid voltage and Grid current

                                                       VI. CONCLUSION
          This paper presents a single-phase multistring Multi-level photovoltaic (PV) inverter topology for grid-connected
PV systems with a novel hybrid H- bridge inverter. The proposed novel cascaded Hybrid H-bridge produces higher voltage
levels with less number of devices. This will reduce the number of gate drivers and protection circuits requirement, this inurn
reduces the cost increase the reliability. Design Procedure for various components of single Hybrid H- bridge cell is given. A
cascaded Grid connected PV topology is proposed. Finally a Matlab/Simulink based model is developed and simulation
results are presented.

                                                            REFERENCES
[1]  grid connected inverter for photovoltaic solar power generation system,” in Proc. IEEE PowerCon, Oct. 2002, vol. 1, pp. 570–573.
[2]  J. M. Carrasco, L. G. Franquelo, J. T. Bialasiewicz, E. Galvan, R. C. PortilloGuisado, M. A. M. Prats, J. I. Leon, and N.M oreno-
     Alfonso, β€œPower-electronic systems for the grid integration of renewable energy s[1] N. A. Rahim and S. Mekhilef,
     β€œImplementation of three-phase ources: A survey,” IEEE Trans. Ind. Electron., vol. 53, no. 4, pp. 1002–1016, Aug. 2006.
[3] S. B. Kjaer, J. K. Pedersen, and F. Blaabjerg, β€œA review of single-phase grid connected inverters for photovoltaic modules,” IEEE
     Trans. Ind. Appl., vol. 41, no. 5, pp. 1292–1306, Sep./Oct. 2005.
[4] S. Daher, J. Schmid, and F. L.M. Antunes, β€œMultilevel inverter topologies for stand-alone PV systems,” IEEE Trans. Ind. Electron.,
     vol. 55, no. 7, pp. 2703–2712, Jul. 2008.
[5] M. Meinhardt and G. Cramer, β€œPast, present and future of grid-connected photovoltaic- and hybrid-power-systems,” in Proc. IEEE-
     PES Summer Meeting, Jul. 2000, vol. 2, pp. 1283–1288.
[6] S. Kouro, J. Rebolledo, and J. Rodriguez, β€œReduced switching-frequency modulation algorithm for high-power multilevel inverters,”
     IEEE Trans.Ind. Electron., vol. 54, no. 5, pp. 2894–2901, Oct. 2007.
[7] S. J. Park, F. S. Kang, M. H. Lee, and C. U. Kim, β€œA new single-phase five level PWM inverter employing a deadbeat control
     scheme,” IEEE Trans. Power Electron., vol. 18, no. 18, pp. 831–843, May 2003.
[8] L. M. Tolbert and T. G. Habetler, β€œNovel multilevel inverter carrier-based PWM method,” IEEE Trans. Ind. Appl., vol. 35, no. 5,
     pp. 1098–1107, Sep./Oct. 1999.
[9] Y. Liu, H. Hong, and A. Q. Huang, β€œReal-time calculation of switching angles minimizing THD for multilevel inverters with step
     modulation,” IEEE Trans. Ind. Electron., vol. 56, no. 2, pp. 285–293, Feb. 2009.
[10] N. S. Choi, J. G. Cho, and G. H. Cho, β€œA general circuit topology of multilevel inverter,” in Proc. IEEE 22th Annu. PESC, Jun. 24–
     27, 1991, pp. 96–103.
 [9] L.M.Tolber, T.G.Habetler, β€œNovel Multilevel inverter Carrier based PWM Method,” IEEE Ind.Appli., vol.35. Pp.1098-1107.
     Sep/Oct 1999.
[10] Holmes, D. G. and Lipo, T. A., Pulse width modulation for power converters: principles and practice, IEEE.
[11] T.H.Barton, "Pulse Width Modulation Waveforms – The Bessel Approximatilon", IEEE-IAS Conference Record,


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International Journal of Modern Engineering Research (IJMER)
            www.ijmer.com              Vol.3, Issue.2, March-April. 2013 pp-659-666      ISSN: 2249-6645


Authors Profile
                  Ch. Venkateswara Rao receieved his M.Tech degree from JNTUK, kakinada and U.G from IE (India),
                  Kolkata) in the year 1993. A life member in ISTE and IAENG. This Author won first prize in Energy
                  conservations Award for the year 2009. He is currently working as a professor in the department of EEE in
                  Gandhi Institute. of Engineering and Technology, Gunupur, Odisha He guided many.UG & PG Projects.
                  He is having overall Industrial &Teaching experience of 18 years. His major Research interests are Energy
                  Conservation and Smart Grid technologies.


                  S STulsiram working as a Professor in the Department of EEE in JNTUH, Hyd. He has 30 years of
                  Teaching experience. He is former Head of the department of EEE, JNTUCE, Kakinada. The Author has
                  Published many papers in International & National Journals/ Conferences. His research interests are Power
                  Systems, High Voltage Engineering & smart grid technologies.


                  Arun Kumar Rath received his M. Tech Degree in Power Electronics and Drives from GIET, Gunupur
                  under BPUT and UG from BPUT. A life time member of ISTE and also a life time member of SESI &
                  IAENG. He working as a Asst. professor in EEE Department at Gandhi institute of engineering &
                  Technology. He is having overall more thane 9 years experiences in Industrial and teaching fields. His
                  interest areas are Power system engineering and Power Electronics & smart grid technologies.




                                                          www.ijmer.com                                         666 | Page

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Ak32659666

  • 1. International Journal of Modern Engineering Research (IJMER) www.ijmer.com Vol.3, Issue.2, March-April. 2013 pp-659-666 ISSN: 2249-6645 Simulink Modeling of Novel Hybrid H-Bridge Inverter for Smart Grid Application Ch.Venkateswra rao, 1 S.S.Tulasiram, 2 Arun Kumar Rath3 1 (PHD scholar, Department of EEE, JNTUK, Kakinad, India) 2 (Professor in Department of EEE, JNTUH, Hyderabad, AP India) 3 (Asst. Professor in Department of EEE, GIET, Gunupur, India) Abstract: Hybrid H- bridge inverter. The proposed novel cascaded Hybrid H-bridge produces higher voltage levels with less number this paper presents a single-phase multistring Multi-level photovoltaic (PV) inverter topology for Micro grid- connected PV systems with a novel of devices. This will reduce the number of gate drives and protection circuits requirement, this inurn reduces the cost increase the reliability. Design Procedure for various components of single Hybrid H- bridge cell is given. A cascaded Grid connected PV topology is proposed. Finally a Matlab/Simulink based model is developed and simulation results are presented. Keywords:PVCell, Hybridge H-bridge, Multi-lebel phovoltaic(PV) inverter, Matalab/Simulink, Micro grid-connected PV System; I. Introduction Natural quantity available, it has been spotlighted as the future energy sources of promising potentiality, due As the PV system is clean and large enough in the to the stable supply of the energy and alternative method of responding to the problem of the earth environment followed by the increase of the demand for the electric power supply. Solar-electric-energy demand has grown consistently by 20%–25% per annum over the past 20 years, which is mainly due to the decreasing costs and prices. This decline has been driven by the following: 1) an increasing efficiency of solar cells; 2) manufacturing- technology improvements; and 3) economies of scale [2]. A PV inverter, which is an important element in the PV system, is used to convert dc power from the solar modules into ac power to be fed into the grid. A general overview of different types of PV inverters is given in [3] and [4]. In recent years, multilevel converters have shown some significant advantages over traditional two-level converters, especially for high power and high voltage applications. In addition to their superior output voltage quality, they can also reduce voltage stress across switching devices. Since the output voltages have multiple levels, lower dv/dt is achieved, which greatly alleviates electromagnetic interference problems due to high frequency switching. Over the years most research work has focused on converters with three to five voltage levels, although topologies with very high number of voltage levels were also proposed. In general, the more voltage levels a converter has the less harmonic and better power quality it provides. However, the increase in converter complexity and number of switching devices is a major concern for multilevel converter. There are several topologies available, being the Neutral Point Clamped [5], Flying Capacitor [6] and Cascaded H bridge inverter [7] the most studied and used. In recent years many variations and combinations of these topologies have been reported, one of them is the cascaded H-bridge [7-10]. II. HIGH POWER CONVERTERS CLASSIFICATIONS Figure 1 Classification of High power Converters www.ijmer.com 659 | Page
  • 2. International Journal of Modern Engineering Research (IJMER) www.ijmer.com Vol.3, Issue.2, March-April. 2013 pp-659-666 ISSN: 2249-6645 Fig.1 shows the classification of high power converters. Out of all converters Cascaded bridge configuration is more popular. Cascaded bridge configuration is again classified into 2 types 1) Cascaded Half Bridge 2) Cascaded Full Bridge or Cascaded H-Bridge. In this paper a novel cascaded hybrid H- Bridge topology is proposed for PV application. A Half H-Bridge S1 Vdc/2 Vout Vdc/2 S2 Figure 2 Half Bridge Fig.2 shows the Half H-Bridge Configuration. By using single Half H-Bridge we can get 2 voltage levels. The switching table is given in Table 1 Table 1. Switching table for Half Bridge Switches Turn ON Voltage Level S2 Vdc/2 S1 -Vdc/2 B Full H-Bridge S1 S3 Vout Vdc S4 S2 Figure. 3 Full H-Bridges Fig.3 shows the Full H-Bridge Configuration. By using single H-Bridge we can get 3 voltage levels. The number output voltage levels of cascaded Full H-Bridge are given by 2n+1 and voltage step of each level is given by Vdc/n. Where n is number of H-bridges connected in cascaded. The switching table is given in Table2 C Hybrid H-Bridge S1 S3 Vdc/2 D1 D3 Sa Vout Vdc/2 S4 S2 D4 D2 Table 2. Switching tabe Full Bridge Switches Turn ON Voltage Level S1,S2 Vdc S3,S4 -Vdc S4,D2 0 Figure. 4 Hybrid H-Bridges www.ijmer.com 660 | Page
  • 3. International Journal of Modern Engineering Research (IJMER) www.ijmer.com Vol.3, Issue.2, March-April. 2013 pp-659-666 ISSN: 2249-6645 Fig. 4 shows the Hybrid H-Bridge configuration. By using single Hybrid H-Bridge we can get 5 voltage levels. The number output voltage levels of cascaded Hybrid H-Bridge are given by 4n+1 and voltage step of each level is given by Vdc/2n. Where n is number of H-bridges connected in cascaded. The switching table of Hybrid H-Bridge is given in Table 3. Table 3. Switching table for Hybrid H-Bridge Switches Turn On Voltage Level Sa, S2 Vdc/2 S1,S2 Vdc S4,D2 0 Sa,S3 -Vdc/2 S3,S4 -Vdc D Cascaded Hybrid H-Bridge S1 S3 D1 D3 Vdc/4 Sa Vdc/4 S4 S2 D4 D2 Vout S5 S7 D5 D7 Vdc/4 Sb Vdc/4 S8 S6 D8 D6 Figure 5. Cascaded Hybrid H-Bridges The proposed CHHB uses less number of switches to produce more voltage levels. This will reduce Gate Drivers and protection circuit requirement thus it reduce cost and complexity of the circuit. For example for 9 level output the proposed converter uses 10 switches but cascaded H- Bridge converter uses 12 switches. This difference increases as the number of output voltage levels increases Table 4 Switching table for Cascaded Hybrid H-Bridge Switches Turn On Voltage Level Sa,S2,S8,D6 Vdc/4 S1.S2,S8,D6 2Vdc/4 S1,S2,Sb,S6 3Vdc/4 S1,S2,S5,S6 Vdc S4,D2,S8,D6 0 Sa,S3,S8,D6 -Vdc/4 S3,S4,S8,D6 -2Vdc/4 S3,S4,Sb,S7 -3Vdc/4 S3,S4,S7,S8 -Vdc III. DESIGN OF PROPOSED NOVEL HYBRID H-BRIDGE INVERTER A. Device Current The IGBT and DIODE currents can be obtained from the load current by multiplying with the corresponding duty cycles. Duty cycle, d = Β½(1+KmsinΟ‰t) Where, m = modulation index K = +1 for IGBT, -1 for Diode. iph = 2 𝐼 sin(πœ”π‘‘ βˆ’ ΓΈ ) Where i = RMS value of the load (output) current, Ø = Phase angle between load voltage and current. Then the device current can be written as follows. 2 ∴ 𝑖 𝑑𝑒𝑣𝑖𝑐𝑒 = 2 𝐼 sin πœ”π‘‘ βˆ’ ΓΈ βˆ— (1 + π‘˜π‘š sin πœ”π‘‘ ) The average value of the device current over a cycle is calculated as www.ijmer.com 661 | Page
  • 4. International Journal of Modern Engineering Research (IJMER) www.ijmer.com Vol.3, Issue.2, March-April. 2013 pp-659-666 ISSN: 2249-6645 πœ‹+ΓΈ 1 2 𝑖 π‘Žπ‘£π‘” = 2πœ‹ 2 𝐼 sin πœ”π‘‘ βˆ’ ΓΈ βˆ— 1 + π‘˜ π‘šπ‘ π‘–π‘›πœ”π‘‘ π‘‘πœ”π‘‘ ΓΈ 1 𝐾 π‘š = 2𝐼 2πœ‹ + 8 cos ΓΈ The device RMS current can be written as πœ‹+ΓΈ 1 2 1 1 𝐾 π‘š 𝑖 π‘Ÿπ‘šπ‘  = ΓΈ 2πœ‹ 2 𝐼 sin πœ”π‘‘ βˆ’ ΓΈ βˆ— 2 βˆ— 1 + π‘˜ π‘šπ‘ π‘–π‘›πœ”π‘‘ π‘‘πœ”π‘‘ = 2 𝐼 8 + 3πœ‹ cos ΓΈ B. IGBT Loss Calculation IGBT loss can be calculated by the sum of switching loss and conduction loss. Where conduction loss can be calculated by, 2 Pon (IGBT ) = Vceo βˆ— Iavg (igbt ) + Irms (igbt ) βˆ— rceo 1 π‘š 𝐼 π‘Žπ‘£π‘” (𝑖𝑔𝑏𝑑 ) = 2 𝐼 2πœ‹ + 8 cos ΓΈ 1 π‘š 𝐼 π‘Ÿπ‘šπ‘  (𝑖𝑔𝑏𝑑 ) = 2 𝐼 + cos ΓΈ 8 3πœ‹ Values of Vceo and rceo at any junction temperature can be obtained from the output characteristics (Ic vs. Vce) of the IGBT as shown in Fig .6. Figure 6 IGBT output characteristics The switching losses are the sum of all turn-on and turn-off energies at the switching events 𝐸 𝑠𝑀 = 𝐸 π‘œπ‘› + 𝐸 π‘œπ‘“π‘“ = π‘Ž + 𝑏 𝐼 + 𝑐 𝐼2 𝑉 𝐷𝐢 Assuming the linear dependence, switching energy 𝐸 𝑠𝑀 = π‘Ž + 𝑏 𝐼 + 𝑐 𝐼2 βˆ— 𝑉 π‘›π‘œπ‘š Here VDC is the actual DC-Link voltage and Vnom is the DC-Link Voltage at which Esw is given. Switching losses are calculated by summing up the switching energies. 1 𝑃𝑠𝑀 = 𝑇 𝑛 𝐸 𝑠𝑀 𝑖 π‘œ Here β€žnβ€Ÿ depends on the switching frequency. 1 𝑃𝑠𝑀 = π‘‡π‘œ 𝑛 π‘Ž + 𝑏 𝐼 + 𝑐 𝐼2 1 π‘Ž 𝑏 𝐼 𝑐 𝐼2 π‘‡π‘œ 2 + πœ‹ + 4 After considering the DC-Link voltage variations switching losses of the IGBT can be written as follows. π‘Ž 𝑏 𝐼 𝑐 𝐼2 𝑉 𝐷𝐢 𝑃 𝑠𝑀 (𝐼𝐺𝐡𝑇 ) = 𝑓𝑠𝑀 + + βˆ— 2 πœ‹ 4 𝑉 π‘›π‘œπ‘š So, the sum of conduction and switching losses gives the total losses. 𝑃 𝑇(𝐼𝐺𝐡𝑇 ) = 𝑃 π‘œπ‘› (𝐼𝐺𝐡𝑇 ) + 𝑃 𝑠𝑀 (𝐼𝐺𝐡𝑇 ) C. Diode Loss Calculation The DIODE switching losses consists of its reverse recovery losses and the turn-on losses are negligible. www.ijmer.com 662 | Page
  • 5. International Journal of Modern Engineering Research (IJMER) www.ijmer.com Vol.3, Issue.2, March-April. 2013 pp-659-666 ISSN: 2249-6645 𝐸 π‘Ÿπ‘’π‘ = π‘Ž + 𝑏 𝐼 + 𝑐 𝐼2 π‘Ž 𝑏 𝐼 𝑐 𝐼2 𝑉 𝐷𝐢 𝑃 𝑠𝑀 (𝐷𝐼𝑂𝐷𝐸 ) = 𝑓𝑠𝑀 2 + πœ‹ + 4 βˆ— 𝑉 π‘›π‘œπ‘š So, the sum of conduction and switching losses gives the total DIODE looses. 𝑃 𝑇(𝐷𝐼𝑂𝐷𝐸 ) = 𝑃 π‘œπ‘› (𝐷𝐼𝑂𝐷𝐸 ) + 𝑃 𝑠𝑀 (𝐷𝐼𝑂𝐷𝐸 ) The total loss per one switch (IGBT+DIODE) is the sum of one IGBT and DIODE loss. 𝑃𝑇 = 𝑃 𝑇 𝐼𝐺𝐡𝑇 + 𝑃𝑇 𝐷𝐼𝑂𝐷𝐸 D. Thermal Calculations The junction temperatures of the IGBT and DIODE are calculated based on the device power losses and thermal resistances. The thermal resistance equivalent circuit for a module is shown in Fig 7. In this design the thermal calculations are started with heat sink temperature as the reference temperature. So, the case temperature from the model can be written as follows. 𝑇𝑐 = 𝑃 𝑇 𝑅 𝑑𝑕 (π‘βˆ’π‘•) + 𝑇 𝑕 Here Rth(c-h) = Thermal resistance between case and heat sink PT = Total Power Loss (IGBT+DIODE) IGBT junction temperature is the sum of the case temperature and temperature raise due to the power losses in the IGBT. 𝑇𝑗 (𝐼𝐺𝐡𝑇 ) = 𝑃 𝑇(𝐼𝐺𝐡𝑇 ) 𝑅 𝑑𝑕(𝑗 βˆ’π‘)𝐼𝐺𝐡𝑇 + 𝑇𝑐 DIODE junction temperature is the sum of the case temperature and temperature raise due to the power losses in the DIODE. junction temperatures. In order to make the calculated values close to the actual values, 𝑇𝑗 (𝐷𝐼𝑂𝐷𝐸 ) = 𝑃 𝑇(𝐷𝐼𝑂𝐷𝐸 ) 𝑅 𝑑𝑕(𝑗 βˆ’π‘)𝐷𝐼𝑂𝐷𝐸 + 𝑇𝑐 The above calculations are done based on the average power losses computed over a cycle. So, the corresponding thermal calculation gives the average junction temperatures. In order to make the calculated values close to the actual values, transient temperature values are to be added to the average junction temperatures. Figure. 7 Thermal resistance equivalent circuit E. DC-Capacitor Selection The required capacitance for each cell depends on the allowable ripple voltage and the load current. The rms ripple current flowing into the capacitor can be written as follows and the ripple current frequency is double the load current frequency (Hybrid H-Bridge). S1 S3 Vdc/2 D1 D3 Sa Vout Vdc/2 S4 S2 D4 D2 Figure. 8 Hybrid H- Bridge converter www.ijmer.com 663 | Page
  • 6. International Journal of Modern Engineering Research (IJMER) www.ijmer.com Vol.3, Issue.2, March-April. 2013 pp-659-666 ISSN: 2249-6645 𝐼 1 𝐼𝑐 = βˆ’ π‘ˆ π‘Žπ‘ βˆ— 𝐾 + πΌπœ”πΏ sin 2πœ”π‘‘ 𝑉 𝑑𝑐 2 Since the value of β€žLβ€Ÿ is very small, the above equation can be written as below. 𝐼 1 𝐼𝑐 = βˆ’ π‘ˆ π‘Žπ‘ βˆ— 𝐾 sin 2πœ”π‘‘ 𝑉 𝑑𝑐 2 1 π‘ˆ π‘Žπ‘ π‘š 𝐼 𝐢 = βˆ’πΎ βˆ— sin 2πœ”π‘‘ = βˆ’πΎ sin 2πœ”π‘‘ 2 𝑉 𝑑𝑐 2 Here β€žmβ€Ÿ is the modulation index. 𝑑 𝑒 𝑝𝑝 Here 𝐼 𝑐𝑝 = 𝐢 𝑑𝑑 π‘š 𝐼 2 = C 2πœ” βˆ— βˆ†π‘‰ 𝑉 𝑑𝑐 2 π‘š 1 C= 2𝐼 4πœ” βˆ†π‘‰ 𝑉 𝑑𝑐 IV. PROPOSED PV SYSTEM PV String DC/DC CHHB Converter Inverter AC DC/DC CHHB PV String Inverter Converter Figure. 9. Grid Connected PV System The general block diagram of PV system is shown here. The PV string converters solar radiation into DC.Here we are using DC/DC Boost converter to increase the output voltage. The output inverter converts DC into AC and feeding into the grid. The proposed system uses small PV array cascading to produce higher voltage output. This system reduces overall cost and complexity. The Fig.8 shows the proposed PV configuration. V. SIMULINK MODELING AND SIMULATION RESULTS Fig. 10 Shows the Matlab/Simulink model of complete PV system. It consists of PV array block, DC/DC converter Block, Hybrid H-Bridge Block. Figure. 10 Matlab/Simulink model of Hybrid H-bridge www.ijmer.com 664 | Page
  • 7. International Journal of Modern Engineering Research (IJMER) www.ijmer.com Vol.3, Issue.2, March-April. 2013 pp-659-666 ISSN: 2249-6645 Fig. 11 shows the inverter input DC voltage and Multilevel AC output voltage. Fig. 12 Shows the five level output of the Hybrid H-Bridge. Fig.13 shows the grid voltage and current wave forms. Figure.11 Inverter Input and Output Figure12. Five level output of Hybrid H-bridge Figure13 Grid voltage and Grid current VI. CONCLUSION This paper presents a single-phase multistring Multi-level photovoltaic (PV) inverter topology for grid-connected PV systems with a novel hybrid H- bridge inverter. The proposed novel cascaded Hybrid H-bridge produces higher voltage levels with less number of devices. This will reduce the number of gate drivers and protection circuits requirement, this inurn reduces the cost increase the reliability. Design Procedure for various components of single Hybrid H- bridge cell is given. A cascaded Grid connected PV topology is proposed. Finally a Matlab/Simulink based model is developed and simulation results are presented. REFERENCES [1] grid connected inverter for photovoltaic solar power generation system,” in Proc. IEEE PowerCon, Oct. 2002, vol. 1, pp. 570–573. [2] J. M. Carrasco, L. G. Franquelo, J. T. Bialasiewicz, E. Galvan, R. C. PortilloGuisado, M. A. M. Prats, J. I. Leon, and N.M oreno- Alfonso, β€œPower-electronic systems for the grid integration of renewable energy s[1] N. A. Rahim and S. Mekhilef, β€œImplementation of three-phase ources: A survey,” IEEE Trans. Ind. Electron., vol. 53, no. 4, pp. 1002–1016, Aug. 2006. [3] S. B. Kjaer, J. K. Pedersen, and F. Blaabjerg, β€œA review of single-phase grid connected inverters for photovoltaic modules,” IEEE Trans. Ind. Appl., vol. 41, no. 5, pp. 1292–1306, Sep./Oct. 2005. [4] S. Daher, J. Schmid, and F. L.M. Antunes, β€œMultilevel inverter topologies for stand-alone PV systems,” IEEE Trans. Ind. Electron., vol. 55, no. 7, pp. 2703–2712, Jul. 2008. [5] M. Meinhardt and G. Cramer, β€œPast, present and future of grid-connected photovoltaic- and hybrid-power-systems,” in Proc. IEEE- PES Summer Meeting, Jul. 2000, vol. 2, pp. 1283–1288. [6] S. Kouro, J. Rebolledo, and J. Rodriguez, β€œReduced switching-frequency modulation algorithm for high-power multilevel inverters,” IEEE Trans.Ind. Electron., vol. 54, no. 5, pp. 2894–2901, Oct. 2007. [7] S. J. Park, F. S. Kang, M. H. Lee, and C. U. Kim, β€œA new single-phase five level PWM inverter employing a deadbeat control scheme,” IEEE Trans. Power Electron., vol. 18, no. 18, pp. 831–843, May 2003. [8] L. M. Tolbert and T. G. Habetler, β€œNovel multilevel inverter carrier-based PWM method,” IEEE Trans. Ind. Appl., vol. 35, no. 5, pp. 1098–1107, Sep./Oct. 1999. [9] Y. Liu, H. Hong, and A. Q. Huang, β€œReal-time calculation of switching angles minimizing THD for multilevel inverters with step modulation,” IEEE Trans. Ind. Electron., vol. 56, no. 2, pp. 285–293, Feb. 2009. [10] N. S. Choi, J. G. Cho, and G. H. Cho, β€œA general circuit topology of multilevel inverter,” in Proc. IEEE 22th Annu. PESC, Jun. 24– 27, 1991, pp. 96–103. [9] L.M.Tolber, T.G.Habetler, β€œNovel Multilevel inverter Carrier based PWM Method,” IEEE Ind.Appli., vol.35. Pp.1098-1107. Sep/Oct 1999. [10] Holmes, D. G. and Lipo, T. A., Pulse width modulation for power converters: principles and practice, IEEE. [11] T.H.Barton, "Pulse Width Modulation Waveforms – The Bessel Approximatilon", IEEE-IAS Conference Record, www.ijmer.com 665 | Page
  • 8. International Journal of Modern Engineering Research (IJMER) www.ijmer.com Vol.3, Issue.2, March-April. 2013 pp-659-666 ISSN: 2249-6645 Authors Profile Ch. Venkateswara Rao receieved his M.Tech degree from JNTUK, kakinada and U.G from IE (India), Kolkata) in the year 1993. A life member in ISTE and IAENG. This Author won first prize in Energy conservations Award for the year 2009. He is currently working as a professor in the department of EEE in Gandhi Institute. of Engineering and Technology, Gunupur, Odisha He guided many.UG & PG Projects. He is having overall Industrial &Teaching experience of 18 years. His major Research interests are Energy Conservation and Smart Grid technologies. S STulsiram working as a Professor in the Department of EEE in JNTUH, Hyd. He has 30 years of Teaching experience. He is former Head of the department of EEE, JNTUCE, Kakinada. The Author has Published many papers in International & National Journals/ Conferences. His research interests are Power Systems, High Voltage Engineering & smart grid technologies. Arun Kumar Rath received his M. Tech Degree in Power Electronics and Drives from GIET, Gunupur under BPUT and UG from BPUT. A life time member of ISTE and also a life time member of SESI & IAENG. He working as a Asst. professor in EEE Department at Gandhi institute of engineering & Technology. He is having overall more thane 9 years experiences in Industrial and teaching fields. His interest areas are Power system engineering and Power Electronics & smart grid technologies. www.ijmer.com 666 | Page