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International Journal of Electrical and Computer Engineering (IJECE)
Vol. 8, No. 1, February 2018, pp. 11~18
ISSN: 2088-8708, DOI: 10.11591/ijece.v8i1.pp11-18  11
Journal homepage: http://iaescore.com/journals/index.php/IJECE
A Survey: Space Vector PWM (SVPWM) in 3φ Voltage Source
Inverter (VSI)
Shalini Vashishtha1
, K.R. Rekha2
1
Visvesvaraya Technological University, Belagavi, India
2
Dept of ECE, SJBIT, Bangalore, India
Article Info ABSTRACT
Article history:
Received Feb 23, 2017
Revised Jun 19, 2017
Accepted Oct 3, 2017
Since last decades, the pulse width modulation (PWM) techniques have been
an intensive research subject. Also, different kinds of methodologies have
been presented on inverter switching losses, inverter output current/ voltage
total harmonic distortion (THD), inverter maximum output of DC bus
voltage. The Sinusoidal PWM is generally used to control the inverter output
voltage and it helps to maintains drive performance. The recent years have
seen digital modulation mechanisms based on theory of space vector i.e.
Space vector PWM (SVPWM). The SVPWM mechanism offers the
enhanced amplitude modulation indexes (MI) than sinusoidal PWM along
with the reduction in the harmonics of inverter output voltage and reduced
communication losses. Currently, the digital control mechanisms have got
more attention than the analog counterparts, as the performance and
reliability of microprocessors has increased. Most of the SVPWM
mechanisms are performed by using the analog or digital circuits like
microcontrollers and DSPs. From the recent study, analysis gives that use of
Field Programmable Gate Arrays (FPGA) can offer more efficient and faster
solutions. This paper discusses the numerous existing research aspects of
FPGA realization for voltage source inverter (VSI) along with the future line
of research.
Keyword:
Analog circuits
Digital circuits
FPGA
PWM
Sinusoidal PWM
SVPWM
Total harmonic distortion
(THD)
VSI
Copyright © 2018 Institute of Advanced Engineering and Science.
All rights reserved.
Corresponding Author:
Shalini Vashishtha,
Visvesvaraya Technological University,
Belagavi, India.
Email:- shaliniv.vtu@gmail.com
1. INTRODUCTION
The concepts of PWM are turning out to be increasingly prevalent in today's motor drives. In the
inverters, PWM makes it conceivable to control both the frequency and magnitude of the current and voltage
connected to a motor. Along these lines, PWM for motor drives offers better efficiency and higher
performance contrasted with fixed frequency motor drives. PWM systems have been the subject of serious
research amid the most recent couple of decades. The PWM techniques have been the intensive research
subject. Also, different kinds of methodologies have been presented on inverter switching losses, inverter
output current/ voltage THD, inverter maximum output voltage of DC bus voltage [1].
The sinusoidal PWM is utilized to control the output current/voltage of the inverter and keeps up a
better performance of the drive in the whole operational range between 0-78percent of the value that would
be come to by square operation. In the event that the MIs surpass this value, straight relationship amongst MI
and output voltage is not kept up, and the over modulation techniques are required. As of late, a
characteristically advanced modulation system known as SVPWM which depends on space vector hypothesis
[2]. It has been accounted for that SVPWM mechanisms offers better performance over different methods
regarding torque ripple, better DC link utilization, lower THD, switching loss and easier digital system
 ISSN: 2088-8708
Int J Elec & Comp Eng, Vol. 8, No. 1, February 2018 : 11 – 18
12
implementation [3]. The SVPWM systems have been rapidly used, as it allows reducing commutation losses
and obtaining higher amplitude MIs if compared with Sinusoidal PWM techniques [4]. Currently, the digital
control mechanisms have got more attention than the analog counterparts, as the increased performance and
reliability of microprocessors [5]. Most of the SVPWM mechanisms are performed by using the analog or
digital circuits like microcontrollers and DSPs [6], [7].
The utilization of FPGA gives more faster and efficient solution, as it can complete parallel
processing by hardware mode which involves nothing of CPU, the framework can get a fast level [8]. The
field programmable capacity of FPGA's, and the adaptable modification of dead time, the adaptable
modification of dead time exchanging frequency makes it reasonable to drive different switching devices in
down to earth applications [9].
The SVPWM includes complex computations. In the work of [10] and [11] digital signal processors
was utilized to play out the number juggling counts. For this situation, least two processors are needed for
implementation of the technique. The every count of processors are done offline and put away in memory.
Despite the fact that memory space is vast contrasted with past techniques, it takes least getting to time. It
doesn't influence the speed of operation. Memory is additionally modified in FPGA itself and so no need of
outside memory. Moreover, there are many preferences because of the fast outline process and re-
programmable capacities for FPGA [12]. The FPGA empowers to deliver model pro type logic in a less
period. It is conceivable to make, actualize, and perform verification of the new design.
This paper is organized as Section 2 mentions conceptual description of voltage source inverter
(VSI), 3φ VSI, space vector PWM (SVPWM), significance of SVPWM, Xilinx FPGA flow, etc. In section 3
existing researches are discussed with their significances. Section 4 states the research gap while Section 5
provides the future line of research in SVPWM. Section 6 gives the conclusion.
2. VOLTAGE SOURCE INVERTER (VSI)
The smallest circuit which used to convert direct-current (DC)-to-alternating-current (AC) is known
as the inverter. The battery power is converted into AC power or main voltages and this power used for
different electronic appliances such as mobiles, television, computer, etc. The main functionality of inverter
is to convert DC to AC (DC-AC), and a step-up transformer is implemented to generate main voltages from
AC.
Figure 1. Inverter Block Diagram
In above inverter block diagram, battery supply is fed to MOSFET driver in which DC to AC
conversion may take place, and the resulting AC is fed to step up transformer to get original voltage.
Inverters can be classified as:
a. If the DC voltage is constant and this inverter is known as Voltage Source/ voltage fed Inverter.
b. If input current is kept constant and is known as Current Source or Current Fed.
2.1. Voltage Source Inverter (VSI)
a. This takes fixed voltage as input from a device and gives AC supply with variable-frequency. The VSI
are classified as Square-wave Inverters, 1φ Inverters with Voltage Cancellation, Pulse-width Modulated
(PWM) Inverters.
b. Square-wave inverters (SWI): In this input is connected to controlled dc voltage to control the output AC
voltage magnitude. The inverter only controls the output frequency with controlled input voltage
magnitude. The output voltage has square wave type.
Int J Elec & Comp Eng ISSN: 2088-8708 
A Survey: Space Vector PWM (SVPWM) in 3φ Voltage Source Inverter (VSI) (Shalini Vashishtha)
13
c. Pulse-width modulation (PWM) inverters: This takes constant dc voltage as input, where diode-rectifiers
are utilized for line voltage rectification and inverter should control the frequency and magnitude of the
AC output voltages. There are different methods to perform the PWM in an inverter to shape output AC
voltages to make a sine wave.
d. 1φ Inverters: In this voltage, cancellation is considered as constant dc source and an output square-wave.
The output controls both frequency and magnitude but does not use PWM.
e. Switch-mode dc-to-ac (SM dc-ac) inverters: These are utilized for Uninterrupted power supply (UPS) in
which a sinusoidal ac output is needed to be provided with controlled frequency and magnitude.
2.2. 3φ VSI
The 3φ VSI creates less harmonic distortion at output voltage used in the phase to phase AC load. A
3φ VSI circuit model is shown in Figure 2, along with six different switch ((TC+ and TC-, TB+ and TB-, or
TA+ and TA-)). These switches in 3φ VSI can't be switched on all the while at grounds this may give a short
circuit over the voltage supply of dc link. Thus, to move from undefined states in the VSI, the switches of
any inverter leg can't be switched off all the while as this will bring about voltages that will rely on the
separate polarity of line current.
Figure 2. Circuit of 3φ VSI
Numerous applications that require an inverter utilizes 3φ control. Two main cases are AC-motor
drive and UPS [3]. This can be obtained by three legs, one of every phase. The inverter output voltage can be
balanced. The most cases PWM control utilized within an inverter. The upsides of PWM techniques are
specified as:
a. The control of output voltage with PWM can be obtained with fewer components.
b. With the controlling of the output voltage, lower order harmonics can be minimized or erased. PWM
inverters are more utilized for industrial applications [4].
2.3. Space-Vector-Pulse-Width-Modulation (SVPWM)
The power circuit topology of a 3φ VSI supplying a star connected 3φ load is given in Figure 1. The
circuit consists of six semiconductor switches like IGBTs, MOSFETs, etc., along with anti-parallel diodes are
used for protection purpose. The one leg two power switches are used at small dead band among two devices
switching. The inverter switching gives eight output-vectors with six being active 654321 ,,,, VandVVVVV
or non-zero and two zero-vectors 70 ,VV
. The converted diagram of voltage vectors into two axes represented
in Figure 2. The non-zero vectors tips are cornered to form a regular hexagon consisting of two zero vectors
joining at the origin.
Space vector theory represents the 3φ voltages as voltage space vector rotates in the (d-q) plane. The
vector magnitude is related to phase voltages magnitude and the time to cover one revolution is the period of
fundamental phase voltages. The inverter power switches are used to obtain voltage vectors according to
different switching positions. These voltage vectors represent active vectors that subdivide the plane into
equal sectors, and non-active vectors, sometimes call zero vector at an origin. The desired three-phase
sinusoidal output voltages correspond to a circle in the (d-q) given in Figure 3.
The output line and phase voltages for each space vector are shown in Table 1. The 2φ components
can be calculated by using the Equation (1).
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Int J Elec & Comp Eng ISSN: 2088-8708 
A Survey: Space Vector PWM (SVPWM) in 3φ Voltage Source Inverter (VSI) (Shalini Vashishtha)
15
Figure 4. Xilinx flow Design
3. EXISTING RESEARCH
The existing researches in the field of VSI are surveyed and discussed in this section. The survey is
categorized as realization with the FPGA and without FPGA, where the researches performed in both the
techniques are discussed.
3.1. Researches on SVPWM without FPGA
The works of Shao et al. [13] have given a generalized concept of Discontinuous SVPWM
(DSVPWM) for 3φ VSI. The methods consist of six sectors like DSVPWMP, DSVPWMPN0, DSVPWMN,
DSVPWMPN1, DSVPWMPN2, and DSVPWMPN3 and are re-divided into twelve 1’s based on local over
modulation and SVPWM method. The principle of DSVPWMx is developed, and the traditional
discontinuous pulse width modulation (DPWM) strategies are studied on the basis of THD and switching
loss. The results state DSVPWMx strategies are feasible.
In Badran et al. [14] Digital Implementation of SVPWM Technique Using 8-bit Microcontroller is
presented. Authors study is meant to develop a novel inverter design. In this, a 8-bit microcontroller is
utilized to generate SVPWM signal needed for triggering the MOSFET bridge gates of the inverter. Here the
inverter composed of a low-pass LC-filter to generate the output of sine waveform. In this microcontroller
was used for implementation of SVPWM algorithm. Six pins of Port B of the microcontroller were used to
send the output pulses. The software that was used for PIC microcontroller programming was MikroC
compiler, while WinPIC800. The experimental outcome represents the effectiveness of the system to
generate a 3φ sine wave at the better frequency.
The work of Boudouda et al. [15] provided combined random SVPWM using induction motor for
variable speed drive. This research work focused on implementing Random space vector modulation. The
analysis of the output voltage based on the PSD of random signals clearly shows the obtained spreading of
the PSD and the important reduction of the peaks, compared to other simple and dual random techniques and
to the conventional deterministic technique, which is the sought EMC advantage. The author method
provides the good PSD performance.
Author Choudhari et al. [16] have given the SVPWM on DSP Platform for Utility Grid
Synchronizable Tieline Converter between AC-bus and DC-bus of aMicrogrid. The study aims to develop
Space vector pulse width modulation on DSP. In this, the PWM modules architecture based on DSP is
explained. The presented inverter is simulated using existing microgrid architecture scenarios are discussed.
The design and implementation of SVPWM inverter based on cost effective microcontroller were
presented in Gaballah [17]. The study was intended to develop a modulation technique with less THD, wider
linear modulation range, and fewer switching losses. The practical outcomes give that the better performance
at faster computation time along with less complexity in software implementation is achieved with presented
SVPWM than traditional SVPWM.
The combined work of Kassas and Ahmed [18] states the simulation and implementation of
SVPWM using the look-up table.This work is meant to use Loop up the table for designing SVPWM. From
this SVPWM a Simulink model was introduced to verify the lookup table scheme (LTS) viability and its
practical assumptions. The performance was compared among practical and simulated LTS results. The LTS
shows the nearest THD to simulation results.
The combined work was performed by Kumar and Singh [19] states the DSP Based IFO Control of
HEV fed through Impedance Source Inverter. The intention of the work is to achieve the good performances
 ISSN: 2088-8708
Int J Elec & Comp Eng, Vol. 8, No. 1, February 2018 : 11 – 18
16
of speed control of the electric vehicle (induction motor) fed Z-source inverter using DSP controller. This
method employs 3φ six sinusoidal reference signals, and one triangular wave of high frequency as carrier
signals. In this project, impedance source-inverter with IFOC system will be designed with a single DSP
controller using the TMS320F28335, a new kind of DSP chip of Texas Instrument (TI). The reason to use
this one is that the integrated and flexible features in the device meet the requirements we need for a control
system. The hybrid indirect field oriented controlled induction motor drives speed control with is verified
with simulation. The speed control on induction motor is controlled even input DC source voltage changes.
Author Kumar et al. [20] presented the digital control of SVPWM based on shunt active filter. The
THD measured a show that using the proposed topology provides better compensation of harmonics and the
implementation can be done by TMS320F28027 processor.
Mirazimi et al. [21] presented the SVPWM for Two-Phase Three-Leg Inverters. The study meant to
develop a novel SVPWM. This proposed control scheme allows independent control of the magnitude and
quadrature phase angle for two output phases. Thus, the presented two-phase inverter and its modulation
scheme make the two-phase inverter commensurate with both balanced and unbalanced two-phase loads.
Simulation results by using MATLAB/SIMULINK reconfirm the feasibility of the structure based on
SVPWM method for the inverter.
Piao and Hung [22] presented a control strategy for balancing dc-link capacitor voltage in multi-
level diode clamped VSI based on discontinuous SVPWM. The theoretical analysis and simulation results
suggest that the proposed strategy is feasible.
Promkhun and Kinnares [23] have given Speed Control of an Asymmetrical Type Two-Phase
Induction Motor Using DiscontinuousSpace Vector Pulse Width Modulation. The proposed DSVPWM can
reduce switching losses of the motor side inverter. Single-phase full bridge switched-mode converter is used
to improve power quality and allow regenerative power to grid. This system is simulated by
MATLAB/Simulink. The results of the motor side show quick response and good performance for the two-
phase induction motor control in both steady and dynamic responses.
Sun et al. [24] have presented the 3φ dual Buck Inverter based on unified PWMs. The work aims to
design three-phase four leg inverter based on dual-buck power cell. The Efficiency measurement of PWMs is
conducted, and the inverter achieves 98.8% of peak efficiency.
3.2. Research on VSI with FPGA
Author Castro et al. [25] have given the variable-clock-phase shifting based high-resolution FPGA
Digital PWM. The current FPGA exhibit above feature thus allows small and introduces programmable
delays between input and output clocks. The experimental outcome gives a 19.5ps time resolution using
Virtex-5 FPGA.
The work of Orithi and Julian [26] have expressed the 3φ VSI with FPGA-based multi-sampled
SVPWM. The modulator and the inverter controller are used using an FPGA platform, and bandwidth is
increased with respect to a digital signal processor (DSP) or with the microprocessor controller. This
bandwidth results from low output voltage THD. The experimental results are represented by state space
model of a VSI with an output LC filter.
Pan et al. [27] illustrated a shifted SVPWM mechanism for controlling the DC-Link Resonant
Inverters FPGA Realization. The mechanism exhibit same effective vectors. A shifted SVPWM mechanism
for dc-link inverters results show that the method is feasible for shifted SVPWM mechanism.
A concept to attain FPGA realization was performed by Rajendran et al. [28] using FPGA. In this
FPGA is employed to realize PWM strategies and meets the high-switching-frequency and reconfigurable-
structure issues for various applications. The realization and analysis of SVPWM were performed under
variable-speed-control of ac motor drives by using Xilinx. The complete execution time of SVPWM direct
torque controller achieved was 3.5μs.
Rohit et al. [29] an FPGA Implementation of SVPWM mechanism for 3φ Induction Motor using a
Fixed Point Realization. The design a high performance and low powered VHDL based SVPWM controller
for 3φ Induction Motor drive on FPGA. The SVPWM technique is an important PWM generation
mechanism for 3φ VSI to generate PWM signals to control different AC Motors. In this work the software
part is implemented with proposed fixed point realization which increases the accuracy; also since there are
no subroutines, it reduces the total area on FPGA board. The density of the code is less, which reduces
execution time and power consumption. The effectiveness of the method was analyzed with integer
realization.
Rashidi and Sabahi [30] have expressed the high-Performance FPGA-Based Digital SVPWM
(DSVPWM) 3φ VSI. The study aims to design a high performance based low power DSVPWM controller
using FPGA for 3φ VSI. This method is proposed to accurate and high performance based DSVPWM
technique of FPGA with fewer resources and minimum execution time. The authors DSVPWM algorithm
Int J Elec & Comp Eng ISSN: 2088-8708 
A Survey: Space Vector PWM (SVPWM) in 3φ Voltage Source Inverter (VSI) (Shalini Vashishtha)
17
was synthesized to implement over FPGA. In this controller’s total power consumption is minimized at the
clock frequency of 100MHz.
The work performed by Renukadevi and Rajambal [31] gives FPGA implementation of SVPWM
technique for five-phase VSI. The SVPWM algorithm was presented as the high speed circuit for hardware
coding and used over XILINX FPGA processor. The relationship of SVPWM with large, medium, and the
combinations of both space vectors for five-phase VSI is analyzed. The experiment is performed over 1-hp
5φ induction motor under different SVPWM mechanisms. Later, the prominent SVPWM is identified with
THD and output voltage.
Guzman et al. [32] have expressed the mechanism of load sharing in AC Micro-grids by using
FPGA. This is based on frequency-locked-loop (FLL) and adaptive-linear-neuron (ADALINE). The
experimental outcome mentions that the each VSI-control is used by implementing FPGA in micro-grid for
proposition validity.
4. RESEARCH GAP
The analysis outcome of the existing and recent researches idealizes that the realization mechanisms
for VSI using various PWM mechanisms are more but failed to provide better performance and low hardware
compatibility. The technique called SVPWM mechanisms offers better performance over different methods
regarding torque ripple, better DC link utilization, lower THD, switching loss and easier digital system
implementation. The SVPWM systems have been rapidly used, as it allows reducing commutation losses and
output voltage harmonics, and obtaining higher amplitude MIs if compared with Sinusoidal PWM
techniques. Currently, the digital control mechanisms have got more attention than the analog counterparts,
as the increased performance and reliability of microprocessors. Most of the SVPWM mechanisms are
performed by using the analog or digital circuits like microcontrollers and DSP. The studies which performed
using digital mechanisms are rare and need a futuristic research towards the SVPWM using digital methods.
5. CONCLUSION
In this paper, the various aspects of the SVPWM in VSI are discussed. The SVPWM based
mechanism offers the enhanced amplitude modulation indexes (MI) than sinusoidal PWM along with
harmonics reduction and reduced communication losses. The existing SVPWM mechanisms are performed
by the analog or digital circuits and FPGA. The FPGA SVPWM can offer more efficient and faster solution
to tackle inverter related issues by functioning as analog and digital circuit and through which better
realization can be achieved. This paper gives a prominent research survey in the SVPWM for 3φ voltage
source inverter (VSI) that includes the concept of VSI, SVPWM. The research survey represents the most
recent researches in SVPWM and highlights the existing unresolved/research gap.
Also, the future line of researches for better realization of FPGA is described along with the order of
future research. The future research can be followed with the following steps:-
a. Perform the survey of existing researches for VSI, FPGA realization, and SVPWM techniques.
b. Formulate the existing issues in the existing researches
c. Design an FPGA-based system for realization of SVPWM in VSI.
d. Perform the performance analysis of the system and compare with the other techniques
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A Survey: Space Vector PWM (SVPWM) in 3φ Voltage Source Inverter (VSI)

  • 1. International Journal of Electrical and Computer Engineering (IJECE) Vol. 8, No. 1, February 2018, pp. 11~18 ISSN: 2088-8708, DOI: 10.11591/ijece.v8i1.pp11-18  11 Journal homepage: http://iaescore.com/journals/index.php/IJECE A Survey: Space Vector PWM (SVPWM) in 3φ Voltage Source Inverter (VSI) Shalini Vashishtha1 , K.R. Rekha2 1 Visvesvaraya Technological University, Belagavi, India 2 Dept of ECE, SJBIT, Bangalore, India Article Info ABSTRACT Article history: Received Feb 23, 2017 Revised Jun 19, 2017 Accepted Oct 3, 2017 Since last decades, the pulse width modulation (PWM) techniques have been an intensive research subject. Also, different kinds of methodologies have been presented on inverter switching losses, inverter output current/ voltage total harmonic distortion (THD), inverter maximum output of DC bus voltage. The Sinusoidal PWM is generally used to control the inverter output voltage and it helps to maintains drive performance. The recent years have seen digital modulation mechanisms based on theory of space vector i.e. Space vector PWM (SVPWM). The SVPWM mechanism offers the enhanced amplitude modulation indexes (MI) than sinusoidal PWM along with the reduction in the harmonics of inverter output voltage and reduced communication losses. Currently, the digital control mechanisms have got more attention than the analog counterparts, as the performance and reliability of microprocessors has increased. Most of the SVPWM mechanisms are performed by using the analog or digital circuits like microcontrollers and DSPs. From the recent study, analysis gives that use of Field Programmable Gate Arrays (FPGA) can offer more efficient and faster solutions. This paper discusses the numerous existing research aspects of FPGA realization for voltage source inverter (VSI) along with the future line of research. Keyword: Analog circuits Digital circuits FPGA PWM Sinusoidal PWM SVPWM Total harmonic distortion (THD) VSI Copyright © 2018 Institute of Advanced Engineering and Science. All rights reserved. Corresponding Author: Shalini Vashishtha, Visvesvaraya Technological University, Belagavi, India. Email:- shaliniv.vtu@gmail.com 1. INTRODUCTION The concepts of PWM are turning out to be increasingly prevalent in today's motor drives. In the inverters, PWM makes it conceivable to control both the frequency and magnitude of the current and voltage connected to a motor. Along these lines, PWM for motor drives offers better efficiency and higher performance contrasted with fixed frequency motor drives. PWM systems have been the subject of serious research amid the most recent couple of decades. The PWM techniques have been the intensive research subject. Also, different kinds of methodologies have been presented on inverter switching losses, inverter output current/ voltage THD, inverter maximum output voltage of DC bus voltage [1]. The sinusoidal PWM is utilized to control the output current/voltage of the inverter and keeps up a better performance of the drive in the whole operational range between 0-78percent of the value that would be come to by square operation. In the event that the MIs surpass this value, straight relationship amongst MI and output voltage is not kept up, and the over modulation techniques are required. As of late, a characteristically advanced modulation system known as SVPWM which depends on space vector hypothesis [2]. It has been accounted for that SVPWM mechanisms offers better performance over different methods regarding torque ripple, better DC link utilization, lower THD, switching loss and easier digital system
  • 2.  ISSN: 2088-8708 Int J Elec & Comp Eng, Vol. 8, No. 1, February 2018 : 11 – 18 12 implementation [3]. The SVPWM systems have been rapidly used, as it allows reducing commutation losses and obtaining higher amplitude MIs if compared with Sinusoidal PWM techniques [4]. Currently, the digital control mechanisms have got more attention than the analog counterparts, as the increased performance and reliability of microprocessors [5]. Most of the SVPWM mechanisms are performed by using the analog or digital circuits like microcontrollers and DSPs [6], [7]. The utilization of FPGA gives more faster and efficient solution, as it can complete parallel processing by hardware mode which involves nothing of CPU, the framework can get a fast level [8]. The field programmable capacity of FPGA's, and the adaptable modification of dead time, the adaptable modification of dead time exchanging frequency makes it reasonable to drive different switching devices in down to earth applications [9]. The SVPWM includes complex computations. In the work of [10] and [11] digital signal processors was utilized to play out the number juggling counts. For this situation, least two processors are needed for implementation of the technique. The every count of processors are done offline and put away in memory. Despite the fact that memory space is vast contrasted with past techniques, it takes least getting to time. It doesn't influence the speed of operation. Memory is additionally modified in FPGA itself and so no need of outside memory. Moreover, there are many preferences because of the fast outline process and re- programmable capacities for FPGA [12]. The FPGA empowers to deliver model pro type logic in a less period. It is conceivable to make, actualize, and perform verification of the new design. This paper is organized as Section 2 mentions conceptual description of voltage source inverter (VSI), 3φ VSI, space vector PWM (SVPWM), significance of SVPWM, Xilinx FPGA flow, etc. In section 3 existing researches are discussed with their significances. Section 4 states the research gap while Section 5 provides the future line of research in SVPWM. Section 6 gives the conclusion. 2. VOLTAGE SOURCE INVERTER (VSI) The smallest circuit which used to convert direct-current (DC)-to-alternating-current (AC) is known as the inverter. The battery power is converted into AC power or main voltages and this power used for different electronic appliances such as mobiles, television, computer, etc. The main functionality of inverter is to convert DC to AC (DC-AC), and a step-up transformer is implemented to generate main voltages from AC. Figure 1. Inverter Block Diagram In above inverter block diagram, battery supply is fed to MOSFET driver in which DC to AC conversion may take place, and the resulting AC is fed to step up transformer to get original voltage. Inverters can be classified as: a. If the DC voltage is constant and this inverter is known as Voltage Source/ voltage fed Inverter. b. If input current is kept constant and is known as Current Source or Current Fed. 2.1. Voltage Source Inverter (VSI) a. This takes fixed voltage as input from a device and gives AC supply with variable-frequency. The VSI are classified as Square-wave Inverters, 1φ Inverters with Voltage Cancellation, Pulse-width Modulated (PWM) Inverters. b. Square-wave inverters (SWI): In this input is connected to controlled dc voltage to control the output AC voltage magnitude. The inverter only controls the output frequency with controlled input voltage magnitude. The output voltage has square wave type.
  • 3. Int J Elec & Comp Eng ISSN: 2088-8708  A Survey: Space Vector PWM (SVPWM) in 3φ Voltage Source Inverter (VSI) (Shalini Vashishtha) 13 c. Pulse-width modulation (PWM) inverters: This takes constant dc voltage as input, where diode-rectifiers are utilized for line voltage rectification and inverter should control the frequency and magnitude of the AC output voltages. There are different methods to perform the PWM in an inverter to shape output AC voltages to make a sine wave. d. 1φ Inverters: In this voltage, cancellation is considered as constant dc source and an output square-wave. The output controls both frequency and magnitude but does not use PWM. e. Switch-mode dc-to-ac (SM dc-ac) inverters: These are utilized for Uninterrupted power supply (UPS) in which a sinusoidal ac output is needed to be provided with controlled frequency and magnitude. 2.2. 3φ VSI The 3φ VSI creates less harmonic distortion at output voltage used in the phase to phase AC load. A 3φ VSI circuit model is shown in Figure 2, along with six different switch ((TC+ and TC-, TB+ and TB-, or TA+ and TA-)). These switches in 3φ VSI can't be switched on all the while at grounds this may give a short circuit over the voltage supply of dc link. Thus, to move from undefined states in the VSI, the switches of any inverter leg can't be switched off all the while as this will bring about voltages that will rely on the separate polarity of line current. Figure 2. Circuit of 3φ VSI Numerous applications that require an inverter utilizes 3φ control. Two main cases are AC-motor drive and UPS [3]. This can be obtained by three legs, one of every phase. The inverter output voltage can be balanced. The most cases PWM control utilized within an inverter. The upsides of PWM techniques are specified as: a. The control of output voltage with PWM can be obtained with fewer components. b. With the controlling of the output voltage, lower order harmonics can be minimized or erased. PWM inverters are more utilized for industrial applications [4]. 2.3. Space-Vector-Pulse-Width-Modulation (SVPWM) The power circuit topology of a 3φ VSI supplying a star connected 3φ load is given in Figure 1. The circuit consists of six semiconductor switches like IGBTs, MOSFETs, etc., along with anti-parallel diodes are used for protection purpose. The one leg two power switches are used at small dead band among two devices switching. The inverter switching gives eight output-vectors with six being active 654321 ,,,, VandVVVVV or non-zero and two zero-vectors 70 ,VV . The converted diagram of voltage vectors into two axes represented in Figure 2. The non-zero vectors tips are cornered to form a regular hexagon consisting of two zero vectors joining at the origin. Space vector theory represents the 3φ voltages as voltage space vector rotates in the (d-q) plane. The vector magnitude is related to phase voltages magnitude and the time to cover one revolution is the period of fundamental phase voltages. The inverter power switches are used to obtain voltage vectors according to different switching positions. These voltage vectors represent active vectors that subdivide the plane into equal sectors, and non-active vectors, sometimes call zero vector at an origin. The desired three-phase sinusoidal output voltages correspond to a circle in the (d-q) given in Figure 3. The output line and phase voltages for each space vector are shown in Table 1. The 2φ components can be calculated by using the Equation (1).
  • 4. Int J E 14 2.4. R circui SVPW efficie compu 2.5. X route FPGA effect arithm filters the pr as sho a. D b b. D st c c. V th  Elec & Comp          q d V V 3 2 Role of FPGA Recently it. Implementa WM algorithm ent SVPWM utational over Xilinx FPGA The FPGA scheme. The As are now po tively. This is metic. At pres s, and interfac rocessor hardw own in Figure Design Entry - based entry, a Design Implem tage of design ircuit descript Verification o hat the design Eng, Vol. 8, N       2 30 2 11 3 Ze V V A over SVPW some control ation of SVPW m for multileve algorithm i rheads and als A Design flow design metho e consideration osses logic cap s achieved wi sent, a single ces. Efficient ware together 4. The FPGA - In this stage schematic edi mentation- Usi n entry is conv tion (NCD) fil of Design- By n meets the tim No. 1, Februar             2 3 2 1 S Secto ero vector V4(011) V5(0 V3(01 V7(111) V0(000) Figure 3 Table 1. 3 WM l systems hav WM by using el multiphase s discussed so removes the odologies inclu ns are pin-pin pacity and suf ith exploiting FPGA platfor FPGA circuit with smart co A design flow e of the hardw itor, or both is ing the design verted to a ph le to use FPGA using Xilinx ming requirem ary 2018 : 11 –        cn bn an V V V Sector 2 Sector 3 Sector 5 or 4 001) 10) d . Voltage-vec 3φ Inverter Ou ve been cons g FPGA has b voltage sourc to reduce th e high samplin lude VHDL or n delays, pip fficient perfor g parallelism a rm can replac ts obtained by ompiler techno is consists of ware descripti s used to creat n in Xilinx arc hysical file for As. Then a bi XChecker ca ments and func – 18 Sector 1 Va V b Sector 6 V6(101) V2(110) Vre ctors in d-q pla utput Voltages sidered to de been studied ce converters i he resource u ng time issues r Verilog lang elining and lo rmance to imp and also by m ce for multiple y design tech ology. The blo the following on language ( te the design. chitecture, logi rmat. This phy t stream file is able, gate leve tions properly V1(100) ef q ane s ign using FP by a few rese is presented in usage, which s for real-time guages, synthe ogic levels, a plement a num mapping mech e applications niques, which ock diagram fo stages. (HDL), design ic design file ysical informa s created. l simulator or y. ISSN: 2 ( PGA; FPGA earchers; a no n [1]. In work h evolves red e applications. esis, map, and and floor plan mber of DSP a hanism like d s, including c h traditionally for FPGA desi n flow is used format is gen ation is existed r JTAG cable, 2088-8708 (1) integrated ovel space k of [3], an duction in d place and nning, etc. algorithms distributed ontrollers, y relies on ign flow is d for text- erated at a d at native , to ensure
  • 5. Int J Elec & Comp Eng ISSN: 2088-8708  A Survey: Space Vector PWM (SVPWM) in 3φ Voltage Source Inverter (VSI) (Shalini Vashishtha) 15 Figure 4. Xilinx flow Design 3. EXISTING RESEARCH The existing researches in the field of VSI are surveyed and discussed in this section. The survey is categorized as realization with the FPGA and without FPGA, where the researches performed in both the techniques are discussed. 3.1. Researches on SVPWM without FPGA The works of Shao et al. [13] have given a generalized concept of Discontinuous SVPWM (DSVPWM) for 3φ VSI. The methods consist of six sectors like DSVPWMP, DSVPWMPN0, DSVPWMN, DSVPWMPN1, DSVPWMPN2, and DSVPWMPN3 and are re-divided into twelve 1’s based on local over modulation and SVPWM method. The principle of DSVPWMx is developed, and the traditional discontinuous pulse width modulation (DPWM) strategies are studied on the basis of THD and switching loss. The results state DSVPWMx strategies are feasible. In Badran et al. [14] Digital Implementation of SVPWM Technique Using 8-bit Microcontroller is presented. Authors study is meant to develop a novel inverter design. In this, a 8-bit microcontroller is utilized to generate SVPWM signal needed for triggering the MOSFET bridge gates of the inverter. Here the inverter composed of a low-pass LC-filter to generate the output of sine waveform. In this microcontroller was used for implementation of SVPWM algorithm. Six pins of Port B of the microcontroller were used to send the output pulses. The software that was used for PIC microcontroller programming was MikroC compiler, while WinPIC800. The experimental outcome represents the effectiveness of the system to generate a 3φ sine wave at the better frequency. The work of Boudouda et al. [15] provided combined random SVPWM using induction motor for variable speed drive. This research work focused on implementing Random space vector modulation. The analysis of the output voltage based on the PSD of random signals clearly shows the obtained spreading of the PSD and the important reduction of the peaks, compared to other simple and dual random techniques and to the conventional deterministic technique, which is the sought EMC advantage. The author method provides the good PSD performance. Author Choudhari et al. [16] have given the SVPWM on DSP Platform for Utility Grid Synchronizable Tieline Converter between AC-bus and DC-bus of aMicrogrid. The study aims to develop Space vector pulse width modulation on DSP. In this, the PWM modules architecture based on DSP is explained. The presented inverter is simulated using existing microgrid architecture scenarios are discussed. The design and implementation of SVPWM inverter based on cost effective microcontroller were presented in Gaballah [17]. The study was intended to develop a modulation technique with less THD, wider linear modulation range, and fewer switching losses. The practical outcomes give that the better performance at faster computation time along with less complexity in software implementation is achieved with presented SVPWM than traditional SVPWM. The combined work of Kassas and Ahmed [18] states the simulation and implementation of SVPWM using the look-up table.This work is meant to use Loop up the table for designing SVPWM. From this SVPWM a Simulink model was introduced to verify the lookup table scheme (LTS) viability and its practical assumptions. The performance was compared among practical and simulated LTS results. The LTS shows the nearest THD to simulation results. The combined work was performed by Kumar and Singh [19] states the DSP Based IFO Control of HEV fed through Impedance Source Inverter. The intention of the work is to achieve the good performances
  • 6.  ISSN: 2088-8708 Int J Elec & Comp Eng, Vol. 8, No. 1, February 2018 : 11 – 18 16 of speed control of the electric vehicle (induction motor) fed Z-source inverter using DSP controller. This method employs 3φ six sinusoidal reference signals, and one triangular wave of high frequency as carrier signals. In this project, impedance source-inverter with IFOC system will be designed with a single DSP controller using the TMS320F28335, a new kind of DSP chip of Texas Instrument (TI). The reason to use this one is that the integrated and flexible features in the device meet the requirements we need for a control system. The hybrid indirect field oriented controlled induction motor drives speed control with is verified with simulation. The speed control on induction motor is controlled even input DC source voltage changes. Author Kumar et al. [20] presented the digital control of SVPWM based on shunt active filter. The THD measured a show that using the proposed topology provides better compensation of harmonics and the implementation can be done by TMS320F28027 processor. Mirazimi et al. [21] presented the SVPWM for Two-Phase Three-Leg Inverters. The study meant to develop a novel SVPWM. This proposed control scheme allows independent control of the magnitude and quadrature phase angle for two output phases. Thus, the presented two-phase inverter and its modulation scheme make the two-phase inverter commensurate with both balanced and unbalanced two-phase loads. Simulation results by using MATLAB/SIMULINK reconfirm the feasibility of the structure based on SVPWM method for the inverter. Piao and Hung [22] presented a control strategy for balancing dc-link capacitor voltage in multi- level diode clamped VSI based on discontinuous SVPWM. The theoretical analysis and simulation results suggest that the proposed strategy is feasible. Promkhun and Kinnares [23] have given Speed Control of an Asymmetrical Type Two-Phase Induction Motor Using DiscontinuousSpace Vector Pulse Width Modulation. The proposed DSVPWM can reduce switching losses of the motor side inverter. Single-phase full bridge switched-mode converter is used to improve power quality and allow regenerative power to grid. This system is simulated by MATLAB/Simulink. The results of the motor side show quick response and good performance for the two- phase induction motor control in both steady and dynamic responses. Sun et al. [24] have presented the 3φ dual Buck Inverter based on unified PWMs. The work aims to design three-phase four leg inverter based on dual-buck power cell. The Efficiency measurement of PWMs is conducted, and the inverter achieves 98.8% of peak efficiency. 3.2. Research on VSI with FPGA Author Castro et al. [25] have given the variable-clock-phase shifting based high-resolution FPGA Digital PWM. The current FPGA exhibit above feature thus allows small and introduces programmable delays between input and output clocks. The experimental outcome gives a 19.5ps time resolution using Virtex-5 FPGA. The work of Orithi and Julian [26] have expressed the 3φ VSI with FPGA-based multi-sampled SVPWM. The modulator and the inverter controller are used using an FPGA platform, and bandwidth is increased with respect to a digital signal processor (DSP) or with the microprocessor controller. This bandwidth results from low output voltage THD. The experimental results are represented by state space model of a VSI with an output LC filter. Pan et al. [27] illustrated a shifted SVPWM mechanism for controlling the DC-Link Resonant Inverters FPGA Realization. The mechanism exhibit same effective vectors. A shifted SVPWM mechanism for dc-link inverters results show that the method is feasible for shifted SVPWM mechanism. A concept to attain FPGA realization was performed by Rajendran et al. [28] using FPGA. In this FPGA is employed to realize PWM strategies and meets the high-switching-frequency and reconfigurable- structure issues for various applications. The realization and analysis of SVPWM were performed under variable-speed-control of ac motor drives by using Xilinx. The complete execution time of SVPWM direct torque controller achieved was 3.5μs. Rohit et al. [29] an FPGA Implementation of SVPWM mechanism for 3φ Induction Motor using a Fixed Point Realization. The design a high performance and low powered VHDL based SVPWM controller for 3φ Induction Motor drive on FPGA. The SVPWM technique is an important PWM generation mechanism for 3φ VSI to generate PWM signals to control different AC Motors. In this work the software part is implemented with proposed fixed point realization which increases the accuracy; also since there are no subroutines, it reduces the total area on FPGA board. The density of the code is less, which reduces execution time and power consumption. The effectiveness of the method was analyzed with integer realization. Rashidi and Sabahi [30] have expressed the high-Performance FPGA-Based Digital SVPWM (DSVPWM) 3φ VSI. The study aims to design a high performance based low power DSVPWM controller using FPGA for 3φ VSI. This method is proposed to accurate and high performance based DSVPWM technique of FPGA with fewer resources and minimum execution time. The authors DSVPWM algorithm
  • 7. Int J Elec & Comp Eng ISSN: 2088-8708  A Survey: Space Vector PWM (SVPWM) in 3φ Voltage Source Inverter (VSI) (Shalini Vashishtha) 17 was synthesized to implement over FPGA. In this controller’s total power consumption is minimized at the clock frequency of 100MHz. The work performed by Renukadevi and Rajambal [31] gives FPGA implementation of SVPWM technique for five-phase VSI. The SVPWM algorithm was presented as the high speed circuit for hardware coding and used over XILINX FPGA processor. The relationship of SVPWM with large, medium, and the combinations of both space vectors for five-phase VSI is analyzed. The experiment is performed over 1-hp 5φ induction motor under different SVPWM mechanisms. Later, the prominent SVPWM is identified with THD and output voltage. Guzman et al. [32] have expressed the mechanism of load sharing in AC Micro-grids by using FPGA. This is based on frequency-locked-loop (FLL) and adaptive-linear-neuron (ADALINE). The experimental outcome mentions that the each VSI-control is used by implementing FPGA in micro-grid for proposition validity. 4. RESEARCH GAP The analysis outcome of the existing and recent researches idealizes that the realization mechanisms for VSI using various PWM mechanisms are more but failed to provide better performance and low hardware compatibility. The technique called SVPWM mechanisms offers better performance over different methods regarding torque ripple, better DC link utilization, lower THD, switching loss and easier digital system implementation. The SVPWM systems have been rapidly used, as it allows reducing commutation losses and output voltage harmonics, and obtaining higher amplitude MIs if compared with Sinusoidal PWM techniques. Currently, the digital control mechanisms have got more attention than the analog counterparts, as the increased performance and reliability of microprocessors. Most of the SVPWM mechanisms are performed by using the analog or digital circuits like microcontrollers and DSP. The studies which performed using digital mechanisms are rare and need a futuristic research towards the SVPWM using digital methods. 5. CONCLUSION In this paper, the various aspects of the SVPWM in VSI are discussed. The SVPWM based mechanism offers the enhanced amplitude modulation indexes (MI) than sinusoidal PWM along with harmonics reduction and reduced communication losses. The existing SVPWM mechanisms are performed by the analog or digital circuits and FPGA. The FPGA SVPWM can offer more efficient and faster solution to tackle inverter related issues by functioning as analog and digital circuit and through which better realization can be achieved. This paper gives a prominent research survey in the SVPWM for 3φ voltage source inverter (VSI) that includes the concept of VSI, SVPWM. The research survey represents the most recent researches in SVPWM and highlights the existing unresolved/research gap. Also, the future line of researches for better realization of FPGA is described along with the order of future research. The future research can be followed with the following steps:- a. Perform the survey of existing researches for VSI, FPGA realization, and SVPWM techniques. b. Formulate the existing issues in the existing researches c. Design an FPGA-based system for realization of SVPWM in VSI. d. Perform the performance analysis of the system and compare with the other techniques REFERENCES [1] N. Mohan, T. M. Undeland, W.P. Robbins, “Power Electronics: Converters, Applications, and Design”, John Wiley & Sons, Inc, 1989 [2] P. Milan & T. Green, “Control and filter design of three phase inverter for high power quality grid connection”, IEEE transactions on Power Electronics, vol.18. pp.1- 8, 2003 [3] M. Dogan, M. Dursun, “Reduction of Asynchronous Motor Loss by Heuristic Methods (PSO-GA)”, Elektronika ir Elektrotechnika, vol.117 (1), pp. 53-58, 2012 [4] J. Sun, “Small-signal modeling of variable-frequency pulse-width modulators”, IEEE Trans.Aerosp. Electron. Syst, vol. 38(3), pp. 1104–1108, 2002 [5] S. Araujo & F. Luiz, “LCL fiter design for grid connected NPC inveters in offshore wind turbins”, 7th International conference on Power Electronics, pp. 1133-1138, 2007 [6] S.R Nandurkar, M. Rajeev, “Design and Simulation of three phase Inverter for grid connected Photovoltaic systems”, Proceedings of Third Biennial National Conference, NCNTE, pp.80-83, 2012 [7] M. Pradanovic & T. Green, “Control and filter design of three phase inverter for high power quality grid connection”, IEEE transactions on Power Electronics, vol.18. pp.1- 8, 2003 [8] J. Holtz, “Pulse Width Modulation – A Survey”, IEEE Transaction on Industrial Electronics, vol. 39, no. 5, pp. 410-420, 1992 [9] J. Granado, R.G. Harley, G. Giana, “Understanding and Designing a Space Vector Pulse-Width-Modulator to Control a Three Phase Inverter”, Transaction of the SAIEEE, vol. 80, pp. 29-37, 1989
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She comple er areas of inte pursuing Phd un obtained ME fr nt of Electronic hD from Dr M FPGA implem MISTE and IE ary 2018 : 11 – tronic Power C Space Vector 32, no. 5, pp. 11 d discontinuou nformatics, vol( s, “Digital Imp rld Applied Scie ector modulatio 2016 dulation (SVPW of a microgrid tation of Spac ce and Engineer nd Implementa g, vol.39 (6), pp control of HEV sekaran, B. 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Sh B Institute of Te Her research r and Embedde ISSN: 2 he IEEE, vol.82 d PWM Schem hree-phase volt r Pulse Width M -28, 2013 e using inducti ty grid synchro nd Energy (TA Based on a 0, 2013 Using Look-U ce inverter”, An rol of Space V 3, pp.115, 2014 hase three-leg ltage for multi- on Industrial se induction m CEMS), 18th In E Transactions ock phase shift vector modulati nt inverters and 2 odulator based e for three phas Information T WM Three Pha 5(1), pp.62, 20 space-vector p .7 (2), pp.376-3 AC Microgrid n, vol.29 (3), pp lege Kota (Un of technology ronics, Power , Belagavi. She he isworking as echnology, Ban interests inclu ed system desig 2088-8708 2, no.8, pp. mes”, IEEE age source Modulation on motor”, onizable tie- AP Energy), Low Cost Up Table”, nnual IEEE ector Pulse inverters”, -level diode Electronics motor using nternational on Power ing”, IEEE ion”, IEEE d its FPGA on Voltage se induction Technology ase Voltage 13 pulse-width 389, 2014. s Based on p. 663-672, niversity of Bangalore, Electronics. e is member a professor ngalore. She de wireless gn. She is a