-Study of the functionality of 2MB mother board, providing E1 data interfaces -CMS LAB,TEST EQUIPMENT, QUALITY CONTROL. - ABOUT BEL,ROTATIONAL PROGRAM.-FPGA,ADSP,DSO,VHDL. -E1 EUROPEAN DATA FORMAT , LINK, SPECIFICATION ENCODING TECHNIQUES- HDB3, AMI

1. SUMMER TRAINING REPORT
On
Study of the functionality of 2MB mother board, providing E1 data interfaces
A Report submitted in partial fulfilment of the requirement for the award of degree of
B.TECH
in
ELECTRONICS AND COMMUNICATION
Submitted By
NAME: HIMANSHI
ENROLL No.: 02215002817
DEPTT. OF ELECTRONICS & COMMUNICATION
MAHARAJA SURAJMAL INSTITUTE OF TECHNOLOGY,
C-4, Janakpuri, New Delhi-58
Affiliated to Guru Gobind Singh Indraprastha University, Delhi
August, 2019

2. PROJECT OVERVIEW
Major Components used:
In this, the motherboard is used in PTP (Precision Time Protocol) encryption devices up to 2048 KBPS. It can work at 75
Ohm as well as 120 Ohm E1 data rate. This card consists of two hardware blocks:
Processor Unit - which controls the peripheral and also generate session keys.
FPGA - which is used for address decoding. The cipher stream generation, encryption and decryption of the data is also
done by FPGA.
FPGA: XILINX XC2V1000-FG256AT1219
ADSP:ADSP-2181 KSZ-160
BUFFERS: INTEL LXT360PE AZ L527UN48
TRANSFORMER: TG48-1205N1
MEMORY: SRAM-64KB

3. ABOUT BEL
 Established in 1954 in Bangalore Bharat Electronics Limited (BEL) is a Government of India undertaking set up under the Ministry of
Defense .
 Established primarily to meet strategic defense electronics needs of the country.
 With nine manufacturing units located in Bangalore, Ghaziabad, Panchkula, Kotdwara, Pune, Taloja, Hyderabad, Chennai &
Machilipatnam, Bharat Electronics commands a strong presence in practically every vital area of professional electronics in the country.
 BEL has won a number of national and international awards for Import Substitution, Productivity, Quality, Safety Standardization etc.
ROTATIONAL PROGRAM
Under this the students are introduced to the company by putting them under a rotation program to various departments.
The several departments where I had gone under my rotational program is as follows:
1. CMS LAB 2. TEST EQUIPMENT & AUTOMATION 3. QUALITY CONTROL 4. WORKS ASSEMBLY
During the rotation period, I had to go to various departments, listed above to get some introduction about the work that is being done in
that particular department. The co-operative staff at various department made the learning process very interesting, who allowed me to
know more about the company in a very short time.

4. CMS LAB
CMS stands for Combat Management System. It is the computer system that connects a
ship's sensors, weapons, data links and support measures to the staff performing the
combat tasks. Some of the functions include sensor control, sensor data fusion, threat
evaluation and weapons control. It has to perform the following key functions:
• Situational awareness, Intelligence , Planning and decision making ,
• Weapon systems command and control
FEATURES:
 Continuous Identification & Classification of air, surface & subsurface targets, carry
out threat assessment & automatically advise the command on their engagement.
 Acquire, store, process, integrate, correlate & display tactical data (both raw &
processed) from various sensors in real time.
 Facility for off-line map preparation and loading of charts.

5. E1 (EUROPEAN FORMAT)
E1 is the European format for digital transmission. E1 links are similar to T1 links (T1 refers to the primary digital telephone
carrier system used in North America) except that the E1 carry signals at 2.048Mbps whereas T1 carries signals at 1.544 Mbps.
Each signal has 32 channels, and each channel transmits at 64kbps. It can work at 75 Ohm as well as 120 Ohm E1 data rate. E1
links have higher bandwidth than T1 links because it does not reserve one-bit for overhead, whereas T1 links use one -bit in
each channel for overhead.
The E1 standard is defined under the specification or standard G.703
which is defined by the ITU-T - International telecommunications
Union, Telecommunication Standardization Sector.
SIGNAL NAME RJ-48C CONNECTOR BNC
Transmit Tip 5 TX BNC center pin
Transmit Ring 4 TX BNC outer
Receive Tip 2 RX BNC center pin
Receive Ring 1 RX BNC outer
Receive Shield 3
Transmit Shield 6
Not assigned 7
Not assigned 8

6. The E1 interface uses a differential format using different transmit and receive pairs. The most common physical formats for
the data transmission are two coaxial cables terminated in BNC (Bayonet Neill–Concelman) connectors, or twisted pairs
terminated with RJ-48C connectors. The RJ-48C connector has a total of eight connections.
AMI ( Alternate Mark Inversion)
It is a line encoding scheme used in telecommunications systems where binary 0
is represented using no charge, binary 1 is represented by either a positive, or negative
electrical charge; each successive one uses the opposite charge used for the previous binary 1.
HDB3
In cse of bipolar NRZ or AMI signal, the absence of transmitted signal can cause
problems in synchronization at the receiver, if long sequence of binary 0’s are being
transmitted. This problem can be solved by adding pulses when long strings of 0’s
exceeding a number n are being transmitted. This type of coding is called as High
Density Bipolar Coding. For the HDB3 Coding are:
‘000V’ – For odd number of 1’s and ‘B00V’- For even number of 1’s
where V – Violation Bit B—Bipolar Bit

7. Brief Description
FPGA
ADSP
Encryption & Decryption : Encryption is the process of translating
plain text data (plaintext) into something that appears to be random
and meaningless (cipher text). Decryption is the process of converting
cipher text back to plaintext. To encrypt more than a small amount of data, symmetric encryption is used.
FPGA is a Field Programmable Gate Array. It was developed for high performance from
low-density to high-density designs that are based on IP cores & customized modules. It
provides complete solutions for telecommunication, wireless, networking, video. It is
optimized for high speed with low power consumption.
This particular ADSP is a single-chip microcomputer optimized for digital signal processing (DSP) and other high
speed numeric processing applications. It combines the ADSP-2100 family base architecture with 2 serial ports, a 16-
bit internal DMA (Direct Memory Access) port, a byte DMA port, a programmable timer, a Flag I/O, along with
extensive interrupt capabilities and, an on-chip program and data memory. It even integrates 80K of on-chip memory.

8. Memory
DSO
SRAM stands for Static Read Access Memory is a type of semiconductor random-access memory (RAM)
that uses bistable latching circuitry (flip-flop) to store each bit. SRAM exhibits data remanence, but it is
still volatile in the conventional sense that data is eventually lost when the memory is not powered.
DSO stands for Digital Storage Oscilloscope. It is an oscilloscope which stores and analyses the signal digitally
rather than using analog techniques. It is now the most common type of oscilloscope in use because of the
advanced trigger, storage, display and measurement features which it typically provides.
2 Mbps Link Encryptor: It is a Bulk Encryption Unit (BEU) to support secure communication in point to point
configuration at E1 interface as per ITU-T standard G.703 and V.35 interface. The selection of a particular interface is done
through front panel key pad entry. It supports full duplex mode of operation.
Features:
• Built in test for easy diagnostics and maintenance.
• Emergency erasure of keys and algorithm.
• User authentication through passwords.
• Simple user interface through keypad and 2x16 character display.
• Fully automatic operation with audio and visual alarms for easy maintenance.

9. Power Supply
Digital multi meter
A power supply is an electrical device that supplies electric power to an electrical load. The primary
function of a power supply is to convert electric current from a source to the correct voltage, current, and
frequency to power the load. Power supplies are sometimes referred to as electric power converters.
A digital multi meter is a test tool used to measure two or more electrical values—principally voltage
(volts), current (amps) and resistance (ohms). It is a standard diagnostic tool for technicians in the
electrical/electronic industries.
RJ-48C Connector
The E1 interface uses a differential format using different transmit and receive pairs. The
most common physical formats for the data transmission are two coaxial cables terminated in
BNC (Bayonet Neill–Concelman) connectors,
or twisted pairs terminated with RJ-48C
connectors.
The RJ-48C connector has a total of eight
connections.

10. Block Diagram

11. VHDL
VHDL is an acronym for VHSIC Hardware Description Language (VHSIC is an acronym for Very High Speed Integrated
Circuits). It is a hardware description language that can be used to model a digital system at many levels of abstraction,
ranging from the algorithmic level to the gate level. It supports both synchronous and asynchronous timing models.
The language supports three basic different description styles:
1. Structural VHDL 2. Dataflow VHDL 3. Behavioral VHDL
STRUCTURAL Style of Modeling In the structural style of modeling,
an entity is described as a set of interconnected components.
DATAFLOW Style of Modeling: In this modeling style, the flow of data
through the entity is expressed primarily using concurrent signal assignment
statements.
BEHAVIORAL Style of Modeling: In contrast to the styles of modeling
described earlier, the Behavioral style of modeling specifies the behavior of an
entity as a set of statements that are executed sequentially in the specified
order.
Certain Reserved Words in VHDL:
and, or, nor, nand, xor, xnor, not, access,
array, attribute, constant, else, if, exit,
function, null, return, select, signal,
subtype, type, wait, with.

12. VHDL Code for testing a data path that can be implemented in the 2MB Data Card:
library ieee;
use ieee.std_logic_1164.all;
entity data_enc_dec is
port (rst: 1; clk_in_c, clk_in_e, clk_out_c, clk_out_e: 10,11,12,13;
data_in_c, data_in_e, data_out_c, data_out_e: 6, 7 8, 9; buff: inout bit);
end data_enc_dec;
architecture Behavioral of data_enc_dec is
process (enc)
begin
if (clk_in_c = ‘0’) then
buff <= data_out_c;
end;
begin
if (clk_in_e = ‘0’) then
buff <= data_out_e;
end;

13. process(dec)
begin
if (clk_out_c = ‘1’) then
buff <= data_in_c;
end ;
begin
if (clk_out_e = ‘1’) then
buff <= data_in_e;
end;
end process;
end Behavioral;

14. APPLICATIONS AND USES:
 Predominantly used in Data Communication– Can make changes to the data that is input using the programmed
FPGA (Field Programmable Gate Array) and the ADSP (Digital Signal Processing ).
 Has an HMI (Human-Machine Interface) – An attached keyboard allows for data to be input directly into the data
card, along with other input modes and interfaces.

15. Thank You
Submitted By:
Himanshi
ECE-2
(Enrollment No.: 02215002817)