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Distributed Computing
EG 3113 CT Diploma in Computer Engineering
5th Semester
Unit 2.3 Flynn’s Taxonomy
Lecture by : Er. Ashish K.C(Khatri)
Flynn’s Taxonomy:
• Flynn’s classification scheme is based on the notion of a stream of information.
• Two types of information flow into a processor: instructions and data.
• The instruction stream is defined as the sequence of instructions performed by the
processing unit.
• The data stream is defined as the data traffic exchanged between the memory and
the processing unit.
8/16/2022 Distributed Computing Notes © Er. Ashish K.C(Khatri) 2
• According to Flynn’s classification, either of the instruction or data streams can be
single or multiple.
• Computer architecture can be classified into the following four distinct categories:
• single-instruction single-data streams (SISD);
• single-instruction multiple-data streams (SIMD);
• multiple-instruction single-data streams (MISD); and
• multiple-instruction multiple-data streams (MIMD).
8/16/2022 Distributed Computing Notes © Er. Ashish K.C(Khatri) 3
8/16/2022 Distributed Computing Notes © Er. Ashish K.C(Khatri) 4
Single-Instruction Single-Data (SISD):
• An SISD computing system is a uniprocessor machine which is
capable of executing a single instruction, operating on a single
data stream.
• In SISD, machine instructions are processed in a sequential
manner and computers adopting this model are popularly called
sequential computers.
• Most conventional computers have SISD architecture.
• All the instructions and data to be processed have to be stored in
primary memory.
• The speed of the processing element in the SISD model is
limited(dependent) by the rate at which the computer can transfer
information internally.
• Dominant representative SISD systems are IBM PC,
workstations.
8/16/2022 Distributed Computing Notes © Er. Ashish K.C(Khatri) 5
8/16/2022 Distributed Computing Notes © Er. Ashish K.C(Khatri) 6
Single-Instruction Multiple-Data (SIMD):
• An SIMD system is a multiprocessor machine
capable of executing the same instruction on all the
CPUs but operating on different data streams.
• Machines based on an SIMD model are well suited to
scientific computing since they involve lots of vector
and matrix operations.
• So that the information can be passed to all the
processing elements (PEs) organized data elements of
vectors can be divided into multiple sets(N-sets for N
PE systems) and each PE can process one data set.
8/16/2022 Distributed Computing Notes © Er. Ashish K.C(Khatri) 7
8/16/2022 Distributed Computing Notes © Er. Ashish K.C(Khatri) 8
8/16/2022 Distributed Computing Notes © Er. Ashish K.C(Khatri) 9
Multiple-Instruction Single-Data (MISD):
• An MISD computing system is a multiprocessor machine
capable of executing different instructions on different
PEs but all of them operating on the same dataset .
• Example Z = sin(x)+cos(x)+tan(x)
• The system performs different operations on the same
data set.
• Machines built using the MISD model are not useful in
most of the application, a few machines are built, but
none of them are available commercially.
8/16/2022 Distributed Computing Notes © Er. Ashish K.C(Khatri) 10
8/16/2022 Distributed Computing Notes © Er. Ashish K.C(Khatri) 11
Multiple-Instruction Multiple-Data(MIMD):
• An MIMD system is a multiprocessor
machine which is capable of executing
multiple instructions on multiple data
sets.
• Each PE in the MIMD model has
separate instruction and data streams;
therefore machines built using this
model are capable to any kind of
application.
• Unlike SIMD and MISD machines, PEs
in MIMD machines work
asynchronously.
8/16/2022 Distributed Computing Notes © Er. Ashish K.C(Khatri) 12
8/16/2022 Distributed Computing Notes © Er. Ashish K.C(Khatri) 13
Feng’s Classification:
• Tse-yun Feng suggested the use of degree of parallelism to classify various
computer architectures.
• The maximum number of binary digits that can be processed within a unit time by
a computer system is called the maximum parallelism degree P.
• Word length is a number of bits in a word(n)
• A bit slice is a string of bits one from each of the words at the same vertical
position.(m)
• The maximum degree of parallelism P is given by the product of number of bits in
a word (n) and number of words in parallel (m) i.e P = n.m
8/16/2022 Distributed Computing Notes © Er. Ashish K.C(Khatri) 14
• The classification based on sequential and parallel operation on bits are:
1. Word-Serial and Bit-Serial (WSBS): also called bit serial processing because 1
bit is processed at a time; m=n=1; Slow
2. Word-Parallel and Bit-Serial (WPBS): also called bit slice processing because
m-bit slice are processed at a time; m>1, n=1
3. Word-Serial and Bit-Parallel (WSBP): also called word slice processing because
one word of n-bit are processed at a time; m=1, n>1
4. Word-Parallel and Bit-Parallel (WPBP): also known as fully parallel processing;
fastest; m>1, n>1
8/16/2022 Distributed Computing Notes © Er. Ashish K.C(Khatri) 15
8/16/2022 Distributed Computing Notes © Er. Ashish K.C(Khatri) 16
8/16/2022 Distributed Computing Notes © Er. Ashish K.C(Khatri) 17
Shared Memory System:
• A shared memory model is one in which processors communicate by reading and
writing locations in a shared memory that is equally accessible by all processors.
• Each processor may have registers, buffers, caches, and local memory banks as
additional memory resources.
• A number of basic issues in the design of shared memory systems have to be taken
into consideration.
• These include access control, synchronization, protection, and security.
8/16/2022 Distributed Computing Notes © Er. Ashish K.C(Khatri) 18
8/16/2022 Distributed Computing Notes © Er. Ashish K.C(Khatri) 19
Shared Memory System:
• The simplest shared memory system consists of one memory module that can be
accessed from two processors.
• Requests arrive at the memory module through its two ports.
• An arbitration unit within the memory module passes requests through to a
memory controller.
• If the memory module is not busy and a single request arrives, then the arbitration
unit passes that request to the memory controller and the request is granted.
• The module is placed in the busy state while a request is being serviced.
• If a new request arrives while the memory is busy servicing a previous request, the
requesting processor may hold its request on the line until the memory becomes
free or it may repeat its request sometime later
8/16/2022 Distributed Computing Notes © Er. Ashish K.C(Khatri) 20
Shared Memory System:
• A shared memory system typically accomplishes inter-processor coordination
through a global memory shared by all processors.
• These are typically server systems that communicate through a bus and cache
memory controller.
• The bus/ cache architecture alleviates the need for expensive multi-ported memories
and interface circuitry as well as the need to adopt a message-passing paradigm
when developing application software.
• Because access to shared memory is balanced, these systems are also called SMP
(symmetric multiprocessor) systems.
• Each processor has equal opportunity to read/write to memory, including equal
access speed.
8/16/2022 Distributed Computing Notes © Er. Ashish K.C(Khatri) 21
Message Passing System:
• A message passing system (also referred to as
distributed memory) typically combines the local
memory and processor at each node of the
interconnection network.
• There is no global memory, so it is necessary to
move data from one local memory to another by
means of message passing.
• This is typically done by a Send/Receive pair of
commands, which must be written into the
application software by a programmer.
• Thus, programmers must learn the message-
passing paradigm, which involves data copying
and dealing with consistency issues.
8/16/2022 Distributed Computing Notes © Er. Ashish K.C(Khatri) 22
End of Unit
8/16/2022 Distributed Computing Notes © Er. Ashish K.C(Khatri) 23

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Flynn's Taxonomy

  • 1. Distributed Computing EG 3113 CT Diploma in Computer Engineering 5th Semester Unit 2.3 Flynn’s Taxonomy Lecture by : Er. Ashish K.C(Khatri)
  • 2. Flynn’s Taxonomy: • Flynn’s classification scheme is based on the notion of a stream of information. • Two types of information flow into a processor: instructions and data. • The instruction stream is defined as the sequence of instructions performed by the processing unit. • The data stream is defined as the data traffic exchanged between the memory and the processing unit. 8/16/2022 Distributed Computing Notes © Er. Ashish K.C(Khatri) 2
  • 3. • According to Flynn’s classification, either of the instruction or data streams can be single or multiple. • Computer architecture can be classified into the following four distinct categories: • single-instruction single-data streams (SISD); • single-instruction multiple-data streams (SIMD); • multiple-instruction single-data streams (MISD); and • multiple-instruction multiple-data streams (MIMD). 8/16/2022 Distributed Computing Notes © Er. Ashish K.C(Khatri) 3
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  • 5. Single-Instruction Single-Data (SISD): • An SISD computing system is a uniprocessor machine which is capable of executing a single instruction, operating on a single data stream. • In SISD, machine instructions are processed in a sequential manner and computers adopting this model are popularly called sequential computers. • Most conventional computers have SISD architecture. • All the instructions and data to be processed have to be stored in primary memory. • The speed of the processing element in the SISD model is limited(dependent) by the rate at which the computer can transfer information internally. • Dominant representative SISD systems are IBM PC, workstations. 8/16/2022 Distributed Computing Notes © Er. Ashish K.C(Khatri) 5
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  • 7. Single-Instruction Multiple-Data (SIMD): • An SIMD system is a multiprocessor machine capable of executing the same instruction on all the CPUs but operating on different data streams. • Machines based on an SIMD model are well suited to scientific computing since they involve lots of vector and matrix operations. • So that the information can be passed to all the processing elements (PEs) organized data elements of vectors can be divided into multiple sets(N-sets for N PE systems) and each PE can process one data set. 8/16/2022 Distributed Computing Notes © Er. Ashish K.C(Khatri) 7
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  • 10. Multiple-Instruction Single-Data (MISD): • An MISD computing system is a multiprocessor machine capable of executing different instructions on different PEs but all of them operating on the same dataset . • Example Z = sin(x)+cos(x)+tan(x) • The system performs different operations on the same data set. • Machines built using the MISD model are not useful in most of the application, a few machines are built, but none of them are available commercially. 8/16/2022 Distributed Computing Notes © Er. Ashish K.C(Khatri) 10
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  • 12. Multiple-Instruction Multiple-Data(MIMD): • An MIMD system is a multiprocessor machine which is capable of executing multiple instructions on multiple data sets. • Each PE in the MIMD model has separate instruction and data streams; therefore machines built using this model are capable to any kind of application. • Unlike SIMD and MISD machines, PEs in MIMD machines work asynchronously. 8/16/2022 Distributed Computing Notes © Er. Ashish K.C(Khatri) 12
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  • 14. Feng’s Classification: • Tse-yun Feng suggested the use of degree of parallelism to classify various computer architectures. • The maximum number of binary digits that can be processed within a unit time by a computer system is called the maximum parallelism degree P. • Word length is a number of bits in a word(n) • A bit slice is a string of bits one from each of the words at the same vertical position.(m) • The maximum degree of parallelism P is given by the product of number of bits in a word (n) and number of words in parallel (m) i.e P = n.m 8/16/2022 Distributed Computing Notes © Er. Ashish K.C(Khatri) 14
  • 15. • The classification based on sequential and parallel operation on bits are: 1. Word-Serial and Bit-Serial (WSBS): also called bit serial processing because 1 bit is processed at a time; m=n=1; Slow 2. Word-Parallel and Bit-Serial (WPBS): also called bit slice processing because m-bit slice are processed at a time; m>1, n=1 3. Word-Serial and Bit-Parallel (WSBP): also called word slice processing because one word of n-bit are processed at a time; m=1, n>1 4. Word-Parallel and Bit-Parallel (WPBP): also known as fully parallel processing; fastest; m>1, n>1 8/16/2022 Distributed Computing Notes © Er. Ashish K.C(Khatri) 15
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  • 18. Shared Memory System: • A shared memory model is one in which processors communicate by reading and writing locations in a shared memory that is equally accessible by all processors. • Each processor may have registers, buffers, caches, and local memory banks as additional memory resources. • A number of basic issues in the design of shared memory systems have to be taken into consideration. • These include access control, synchronization, protection, and security. 8/16/2022 Distributed Computing Notes © Er. Ashish K.C(Khatri) 18
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  • 20. Shared Memory System: • The simplest shared memory system consists of one memory module that can be accessed from two processors. • Requests arrive at the memory module through its two ports. • An arbitration unit within the memory module passes requests through to a memory controller. • If the memory module is not busy and a single request arrives, then the arbitration unit passes that request to the memory controller and the request is granted. • The module is placed in the busy state while a request is being serviced. • If a new request arrives while the memory is busy servicing a previous request, the requesting processor may hold its request on the line until the memory becomes free or it may repeat its request sometime later 8/16/2022 Distributed Computing Notes © Er. Ashish K.C(Khatri) 20
  • 21. Shared Memory System: • A shared memory system typically accomplishes inter-processor coordination through a global memory shared by all processors. • These are typically server systems that communicate through a bus and cache memory controller. • The bus/ cache architecture alleviates the need for expensive multi-ported memories and interface circuitry as well as the need to adopt a message-passing paradigm when developing application software. • Because access to shared memory is balanced, these systems are also called SMP (symmetric multiprocessor) systems. • Each processor has equal opportunity to read/write to memory, including equal access speed. 8/16/2022 Distributed Computing Notes © Er. Ashish K.C(Khatri) 21
  • 22. Message Passing System: • A message passing system (also referred to as distributed memory) typically combines the local memory and processor at each node of the interconnection network. • There is no global memory, so it is necessary to move data from one local memory to another by means of message passing. • This is typically done by a Send/Receive pair of commands, which must be written into the application software by a programmer. • Thus, programmers must learn the message- passing paradigm, which involves data copying and dealing with consistency issues. 8/16/2022 Distributed Computing Notes © Er. Ashish K.C(Khatri) 22
  • 23. End of Unit 8/16/2022 Distributed Computing Notes © Er. Ashish K.C(Khatri) 23