1. Reducing the environmental and economic
impact of energy consumption by
low-power Integrated Circuit Design
Yudo Seputro
Nim 11917210
Universitas Islam Indonesia
Sumber Oleh Peiyi Zhao, Ph.D.
Department of Mathematics, Computer Science, and Physics
Chapman University

2. Tinjauan
 Sirkuit Terpadu
 Konsumsi Daya
 hijau Computing
 Memahami tingkat Komputer
 Mana daya pergi?
 Bagaimana kita bisa mengurangi
daya?
Apr. 01, 2008 2

3. Sirkuit Terpadu
 Transistor pertama dibangun
pada tahun 1947. ?
 Sirkuit terpadu pertama kali
ditemukan pada tahun 1959. ?
Pasar didorong oleh militer,
 komputer, komunikasi, dan
kebutuhan konsumen. ?
 Peralatan pernah digunakan oleh
militer sekarang tersedia pada
sejumlah produk konsumen
Apr. 01, 2008 3

4. Sirkuit Terpadu Bekerja mana-mana
Climate Control Lighting
Dashboard Display
Door Modules
Engine Control Fuel Injection Entertainment
Chassis Electronics
Safety Control
Apr. 01, 2008 4

5. Sirkuit Terpadu Pasar
 Enam miliar unit mikrokontroler yang dikirimkan pada
tahun 2004, diprediksi akan meningkat 10% setiap tahun
dari 2004-2009 (instate riset pasar Inc)?
 Semikonduktor pendapatan tahunan tahun 2004
diperkirakan sebesar US $ 211.400.000.000.
Apr. 01, 2008 5

6. Power Consumption
 Konsumsi Desktop telah
mencapai 100 watt?
 Jumlah Personal Komputer
(400 juta) penggunaan energi
pada tahun 2000 = 26
pembangkit listrik tenaga
nuklir?
 Listrik merupakan kendala
untuk meningkatkan kinerja
sistem?
 Konsumsi daya yang
Water Cooled Computer
menyebabkan masalah (www.water-cooling.com)
serius karena panas yang
berlebihan
 .
Apr. 01, 2008 6

7. Power Consumption of
Processor
1000
Power Density (W/cm
)
2
Nuclear
100 Reactor
Pentium 4
Hot Pentium 3
Plate
10 Pentium 2
Pentium Pro
Pentium
1 386 486
1980 1990 2000 2010
Apr. 01, 2008 7

8. Power Consumption
 Seiring dengan peningkatan kecepatan
sirkuit, konsumsi daya tumbuh?
 Merancang sirkuit daya rendah telah
menjadi isu yang paling penting?
 Aplikasi mobile menuntut baterai yang
tahan lama?
 Konsumsi daya rendah terdaftar sebagai
tantangan terbesar kedua untuk industri
Apr. 01, 2008 8

9. The Current Situation
 Penyediaan energi ini bisa dibilang bisnis yang
paling penting, geo-politik, dan sosial masalah
waktu kita?
 Pemanasan global mempengaruhi kebijakan
dan hukum yang memerlukan penggunaan
energi dan emisi rumah kaca yang akan diukur
dan dikendalikan?
 Biaya energi dan peningkatan kebutuhan daya
TI menyajikan biaya yang signifikan, pasokan, CTO, IBM
•“Intelligent Energy” Dr. Bernard S. Meyerson, IBM Fellow, VP Strategic Alliances and
dan tantangan Group, on ASE – Great Energy Efficiency Day, February 14, 2007 -
Systems & Technology untuk menangani pusat data
Washington, DC
Apr. 01, 2008 9

10. Power Consumption & Data
Centers
Internet
 Where are the web
pages you browse? Client
 Pusat Data
 Satu ruangan tunggal
dalam Datacenter berisi
100 Racks?
 1 Rack = 5 sampai 20
kW?
 Kontribusi terhadap
Krisis 2000/2001 Energi
California?
Racks Data Center
•"Cerdas Energi" Dr Bernard S. Meyerson, IBM Fellow, Aliansi Strategis VP dan CTO, IBM Systems &
Technology Group, pada ASE - Energi Efisiensi Hari Besar 14 Februari 2007 - Washington, DC
Apr. 01, 2008 10

11.  200 M tons of CO2= CO2 produced by 40 million cars
Apr. 01, 2008 11

12. Atmospheric CO2
concentrations measured at
Mauna Loa Observatory.
Apr. 01, 2008 12

13. Cooling the Data Center
Flickr.com
 Current coolants: CFCs and
HCFCs = Ozone Depletion
 The other alternative coolant:
HFC = increase in green
house emission 1300 times Siberia
(http://www.cs.virginia.edu/kim/cours
es/cs771/lectures/CS771-22.ppt) umw.edu
 Moving Datacenters to exotic
locations(Microsoft -> Cold
Siberia, Sun -> underground)
Underground Japan
Apr. 01, 2008 13

14. Apr. 01, 2008 14

15. Energy Usage of Data Centers
 2006: $ 15 Miliar untuk penggunaan energi http://www.westportnow.com
 Dampak Pengurangan 10% dari Konsumsi
Daya dari Pusat Data
 $ 15b x 10% = $ 1,5 miliar pada tabungan?
200 x 10% = 20 juta ton CO2?
 4 juta mobil? (Jumlah mobil yang harus
diambil dari
jalan untuk mengurangi jumlah yang sama
emisi CO2.)
Apr. 01, 2008 15

16. Reducing Power
Consumption
 Pusat Data = energi tagihan
besar menghasilkan CO2 + +
hijau + rumah emisi polusi
udara ...?
 Hukum Moore: kepadatan
transistor dua kali lipat setiap
18 bulan. ?
 "Kami harus mengurangi
penggunaan daya. Computing
adalah bagian dari solusi,
bagian dari masalah "-?"
 Computing Berkelanjutan, Source: University of Delaware
"David Douglas, VP,
Tanggung Jawab Ekologi,
Sun Microsystems
Apr. 01, 2008 16

17. Green Computing
 Untuk mencapai komputasi berkelanjutan, kita perlu
memikirkan kembali dari perspektif "Green
Computing". ?
Green Computing:?
 Memaksimalkan efisiensi energi
Mengurangi penggunaan bahan berbahaya seperti
timbal
 Memaksimalkan daur ulang dari kedua produk mati dan
dari limbah pabrik.
 "Green Computing" mengingat efisiensi energi pada
skala nanometer - sirkuit desain konsumsi daya rendah
terintegrasi pada 180nm dan di bawah.?
Apr. 01, 2008 17

18. A Perfect “Green Computing”
Example
 A super low-power “processor”:
 800x faster
 1000x more memory
 3000x less power
Apr. 01, 2008 18

19. A super low power
“Processor”
Modern Processor made Human Brain
by hundreds of PH.D. ( containing 100 billion
researchers (The MOS neurons, each linked to
transistor was built from as many as 10,000
Silicon, the pre-dominant other neurons.)
atom in rock and sand, after
processed in a high
temperature.)
Speed 2.0 GHz Equivalent to 1,700
GHz processor
Memory 100 GB 100,000 GB
(Source: Oracle Corporation:
http://library.thinkquest.org/C001501/the_saga/compare.htm
, computer vs. brain)
Power 45 mW/cm3 15 mW/cm3
(Source: UC Berkeley, EE241
class)
Apr. 01, 2008 19

20. What can we do about
power?
 Understand all levels of the computer
 Understand where power is dissipated
 Think about ways to reduce power
usage at all levels
Apr. 01, 2008 20

21. The 6 Levels of a Computer
5 High Level Programming
4 Assembly Language Software
3 Operating System
2 Instruction Set Architecture
1 Digital Logic Hardware
0 Integrated Circuit
Apr. 01, 2008 21

22. The Need for Both Sides
“The performance of software systems is dramatically
affected by how well software designers understand the
basic hardware technologies at work in a system. Similarly,
hardware designers must understand the far-reaching effects
their design decisions have on software applications.”
- John Hennessy, President of Stanford University
& David Patterson, UC Berkeley, President of ACM
“[Students] should know the device, layout, circuit, architecture,
algorithm, and system-6 levels.”
- Dr. Mehdi Hatamian, V.P, Broadcom, Nov.2006
Apr. 01, 2008 22

23. The Chapman Approach
High Level Programming
5 CPSC 230/231, 350, 353, 354, 402, 408
Assembly Language
4 CPSC 250
Operating System
3 CPSC 380
Instruction Set Architecture
2 CPSC 252
Digital Logic
1 CPSC 330
Integrated Circuit
0 CPSC 465
Apr. 01, 2008 23

24. Where does power go?
Apr. 01, 2008 Power Breakdown of an Itanium 2 Processor 24

25. Processor Clock
 Power consumption is proportional to clock frequency.
 Clock frequency: how often the clock changes every second; of course,
every change of the clock consumes power.
 Analogous to how many times the motor spins per second in your car.
 Traditionally only one edge of the clock is used to process information, and
the other edge is ignored.
- F ig u re sh o w s th e C lo c k s ig n a l
- R isin g e d g e is u s e d w h ile fa llin g c lo c k e d g e (d o t lin e ) is n o t u s e d fo r d a ta
in fo rm a tio n p ro c e ss in g
Apr. 01, 2008 25

26. Using Double Edge Clocking
 Menggunakan double edge clocking, frekuensi clock dapat dikurangi
menjadi setengahnya.
 "Power cabang jam Rendah berbagi Double-Ujung Flip-Flop," P. Zhao,
Jason McNeely, Pradeep Golconda, agdy A. Bayoumi, Kuang WD, dan
Robert Barcenas,? Transaksi? IEEE pada Integrasi Skala Sangat Besar
(VLSI) Sistem, Vol.15, No.3, hal 338-345, Maret 2007.
Conventional
Single edge Design: F a llin g c lo c k e d g e (d o t lin e ) is n o t u s e d fo r d a ta
in fo rm a tio n p r o c e s s in g
Proposed B o th ris in g a n d fa llin g c lo c k e d g e s a re u s e d fo r d a ta
in fo r m a tio n p ro c e s s in g , th e c lo c k fre q u e n c y is re d u c e d to h a lf(c lo c k p e rio d is d o u lb e d )
Design:
Apr. 01, 2008 26

27. Potential Savings
33% x 0.5 = 15%
Clock Power Usage Savings from Power Savings
Double Edge
Usage by using
half of the
frequency
$15b x 15% = $2.25b
Annual Energy Savings Annual Savings
Cost of Data
Centers
Apr. 01, 2008 27

28. Peer Reviewed Journal Publications,
Patent for Low Power Consumption
Peer Reviewed Journal Publications (all as first author)
 P. Zhao, T. Darwish, M. Bayoumi, “High Performance and Low Power
Conditional Discharge Flip-Flop,” in Institute of Electrical and Electronics
Engineers (IEEE) Transactions on Very Large Scale Integration (VLSI)
Systems, Vol 12., No. 5, pp. 477-484, May 2004.

P. Zhao, Jason McNeely, Pradeep Golconda, Magdy A. Bayoumi, Kuang
W.D, and Robert Barcenas, “Low Power Clock Branch Sharing Double-
Edge Triggered Flip-Flop,” IEEE Transactions on Very Large Scale
Integration (VLSI) Systems,Vol.15, No.3, pp. 338-345, March 2007.
 Journal Paper under Revision:
P. Zhao, Jason McNeely, G. P. Kumar, Nan Wang, M. Bayoumi, and Robert
Barcenas, “Low Power Clocked-pseudo-NMOS Flip-flops for Level
Conversion in Dual Supply Systems,” submitted to IEEE Transactions on
Very Large Scale Integration (VLSI) Systems under 1st revision.
Patent
 Single transistor clocked flip flop, by P.Zhao, T.Darwish, M.Bayoumi
Apr. 01, 2008 28

29. Student Research
Assistance
 Chapman mahasiswa sarjana Robert
Barcenas adalah terlibat dalam
penelitian dan merupakan salah satu co-
penulis makalah jurnal?
 Dua siswa sebelumnya yang bekerja
dengan saya di proyek saya
dipekerjakan oleh Intel
Apr. 01, 2008 29

30. Low Power Research
Recognition
 Our research results are comparable to the results from other more well-
funded research groups:
Competing with:
Academy Industry
First journal paper (May 2004) University of California, Davis, Intel
Cited 6 times in Web of Science,
Cited 11 times in Google Scholar [accessed Mar.,2008]
Citations: three are from peer reviewed journals( IEEE
TRANSACTIONS ON VLSI SYSTEMS,, ACM Computing Surveys
(CSUR)) and one is from industry (published on the IEEE
Transactions).
Second journal paper (Mar. 2007) University of California, Davis, Intel
Third journal paper under 1st revision University of California, Berkeley, Toshiba
 Our designs outperformed those of Intel and UC Davis
 Our designs have attracted industry attention from Toshiba
Apr. 01, 2008 30

31. Terima Kasih
Sumber Oleh Peiyi Zhao, Ph.D.
Department of Mathematics, Computer Science, and Physics
Chapman University
31