Final Draft of IT 402 Presentation
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Final Draft of IT 402 Presentation Final Draft of IT 402 Presentation Presentation Transcript

  • IT 402 – Integrative Capstone Design
    Colonel Goda -> Colonel (retired) Monaco*: “Hopefully you can relate your design experiences and lessons learned to the cadets who are working on their senior design project”
    (* a little bit of history thrown in)
  • Integrative Capstone Design
    the high point : crowning achievement
    forming, coordinating, or blending into a functioning or unified whole : uniting
    to create, fashion, execute, or construct according to plan : devise, contrive
  • Cadet Frank Monaco USMA 1970
    Senior “Design” Project
    USMA/Department of Earth, Space and Graphic Sciences, April, 1970
  • My Senior Design Project – write a “limited assembler” for the GE-235
    • The GE-200 series was a family of small mainframe computers of the 1960s, built by General Electric.
    • The main machine in the line was the GE-225. It used a 20-bit word, of which 13 bits could be used for an address. Along with the basic CPU the system could also include a floating-point unit, or interestingly, a fixed-point decimal option with three 6-bit decimals per word. It had 11 I/O channel controllers, and GE sold a variety of add-ons including disks, printers and other devices. The machines were built using discrete transistors, with a typical machine including about 10,000 transistors and 20,000 diodes. They used core memory, and a standard 8k-word system held 186,000 magnetic cores.
    • The GE-215 was a scaled-down version of the GE-225, including only 6 I/O channels and only 4K or 8K of core.
    • The GE-235 was a re-implementation of the GE-225 with three times faster memory than the original. The GE-235 consisted of several major components and options:
    • Central processor
    • 400 CPM or 1000 CPM card reader
    • 100 CPM card punch or 300 CPM card punch
    • Perforated tape subsystem
    • Magnetic tape subsystem
    • 12 Pocket high-speed document handler
    • On-line high speed printer or Off/on-line speed printer
    • Disc storage unit
    • Auxiliary Arithmetic Logic Unit (ALU)
    • DATANET data communications equipment
  • My Background
    Took “EF105” Programming in Basic/CADETRAN as a plebe 1966
    Took EF 382 Computing for the General User with FORTRAN - Major Farrell Patrick – was hooked
    Took EF 4XX (Can’t remember) – “Mini” Assembler for GE235 as my Senior Design Project (IBM Punch Cards) – Translate simple Addition/Subtraction from Assembler to Machine Code and get it to run…
    Commissioned June 1970; married 38+ years; 4 sons, three Military, 10 Grandkids
    Airborne, Ranger, 82nd Airborne, Korea, back to (Master Blaster) 82nd
    Grad School @Georgia Tech for “Information and Computer Science” (built a $5000 PC in 1978 64Kbytes RAM, 2x8” 256KByte FDD (pix/specs to follow), then to teach Cadet Goda early 1980s
    Early Days of the Internet (from ARPA-NET)
    highlight was teaching the first ever course at USMA on a “Microcomputer” Terak LSI-11 1982-1983 (UCSD Fortran as a section of EF 105)
    IBM and Apple PCs 1982-1983
    Beginning of the Computer Science program at USMA; was Systems Manager for VAX/VMS 11/780
    Single Tracked “53” – “Automatic Data Processing” (ADP)
    Served as the Land South East (NATO) Automation Officer, Izmir, Turkey (300 baud was fast)
    Helped built Fort Drum IT as Division Automation Management, 10thMtn Div and DOIM Fort Drum late 80s – early 90s
    Associate Dean and DOIM/CIO at USMA 1992-1997
    Military Retirement (1997)
    CIO positions in Higher Ed
    current role as a business owner –
    and Manager of Educational Technology for a local School District.
  • System I Built in 1978 (Grad School)Heathkit HT-11A
    • Cost, with Terminal, about $5K
    • 64Kbytes RAM = $512
    • Two 8 inch Floppy Dish Drives – 256KBytes each
    • 5MB Disk Drive was an option for about $5K!
    • Ran RT-11, UCSD Pascal
    • Wrote “FMT” on it
  • Terak 8510/A
    First Microcomputer Ever Used in Instruction at West Point, 1982
    Taught two sections of EF105 using UCSD “Fortran”
  • System Cadet Goda Used, c. 1982 - VAX/VMS 11/780
    • “Time Sharing” – 30-40 users max
    • Had 2-28 MB Winchester Disk Drives
    • Also ran “IGDS”, next Slide
  • Interactive Graphics Design System IGDS
    • In 1980, Intergraph released the first computer graphics terminal to use raster technology.
    • The debut of dual 1280 x 1024 pixel displays established the industry standard for high-resolution displays - the same standard as today.
    • This system was used to give birth to the Space Shuttle design
    • The Department at the time was known as “Geography and Computer Science”
    • We worked with the Defense Mapping Agency and the Engineer Topographic Labs and had cadets spend summers there in exchange for equipment for our labs.
  • Moore’s Law* and Effect on Design
    • Moore's law describes a long-term trend in the history of computing hardware, in which the number of transistors that can be placed inexpensively on an integrated circuit has doubled approximately every two years.
    • The capabilities of many digital electronic devices are strongly linked to Moore's law: processing speed, memory capacity, sensors and even the number and size of pixels in digital cameras. All of these are improving at (roughly) exponential rates as well. This has dramatically increased the usefulness of digital electronics in nearly every segment of the world economy. Moore's law precisely describes a driving force of technological and social change in the late 20th and early 21st centuries. The trend has continued for more than half a century and is not expected to stop until 2015 or later.
    • The law is named after Intel co-founder Gordon E. Moore, who described the trend in his 1965 paper. The paper noted that number of components in integrated circuits had doubled every year from the invention of the integrated circuit in 1958 until 1965 and predicted that the trend would continue "for at least ten years”. His prediction has proved to be uncannily accurate, in part because the law is now used in the semiconductor industry to guide long-term planning and to set targets for research and development.
  • Moore’s Law*
  • 1970 – 2010 – Moore’s Law
    Now, my son takes his new iPad to help him fly C-17 Missions!
    I used to sit here and wait for my “job” to finish – sometimes, it ran overnight!
  • The Five Phases of the Gartner “Hype Cycle” for New Technology include:
    Technology Trigger (event that causes users to decide to change from legacy (i.e., “old”) technology no longer maintainable to new (supposedly better!) technology for competitive edge
    Peak of Inflated Expectations (how great this new system will be!)
    Trough of Disillusionment (what happened to the good old way of doing it?)
    Slope of Enlightenment (now I understand why they wanted me to learn this new system!)
    Plateau of Productivity (this is a much better system with seemingly limitless potential!)
  • Gartner “Hype Cycle” for New Systems
    How good our old systems were at start
  • Practical Approaches to Good Design
    If you build it, they will come
    Detailed requirements analysis
    Incremental Approach
    Quick and Early Wins
  • Monaco Design Rules – I.
    “Version 0.0” – “The Enemy of the Good is the Best”, and its corollary, “The Enemy of the Best is the Good”. Strike a balance, but keep “Version 0.0” simple!
    Get input from the folks who do the work “the old way” - but thoroughly understand the “big picture” before too far along in the design.
    Understand how Moore’s Law will change/impact the design and the art of the possible.
    Prepare all constituencies who will be impacted by the system for the Gartner Hype Cycle – and be prepared to lead them out of the “trough of disillusionment” and up the “slope of enlightenment”.
    Do not design “too much” into Version 0.0; instead, incorporate scalability and infrastructure to to get to Version 0.X.
  • Monaco Design Rules – II.
    A good design, violently executed, is better than a perfect design, poorly executed.
    Project Design Leadership: getting people to do things they ordinarily would not want to do (but should).
    Goal of a “Good” Design: once implemented, users should take the new system for granted like electricity and heat/air conditioning.
    A design is only as good as the frequency that its designer is involved in the system implementation.
    Making a design decision – it is almost always better to ask for forgiveness than permission.
    Effective Design = doing the “right” things; Efficient Design = doing them with constrained resources; Innovative Design = suggesting to users before they suggest them to the Designer.
    Good Designs involve 24x7x365 non-stop reliability.
  • One last note: If You Have to Use the Manual - Probably a “Bad” Design
  • Integrative Design Considerations - I
  • Integrative Design Considerations - II
  • Integrative Design Considerations - III
  • Integrative Design Considerations - IV
  • Review – Your Design
    • Be aware of Moore’s Law
    • Be aware of the Gartner “Hype Cycle”
    • No matter how much testing and end user considerations you do, it will never be enough – systems will behave differently with “real” users and real networks.
    • Consider using online surveys to solicit feedback on end user requirements both before and after Version 0.0
    • Consider the best practices/products/services already in use for your design area and decide how yours will be unique
    • Test Test Test; give to users; fix; test test test; repeat.
    • Remember that the “Enemy of the Good is the Best” but also that the “Enemy of the Best is the Good”
  • Questions/Follow Up?(Briefing will be linked from WebPage)