This document provides a summary of the most cited articles from 2012, 2011, and 2010 in the International Journal of VLSI Design & Communication Systems (VLSICS). The articles cover topics related to reducing leakage power in sequential circuits, comparing adder topologies, Wishbone bus architecture, designing reversible logic circuits, and low power phase locked loop circuits. Many of the articles focus on designing circuits and systems for low power VLSI applications.

1. International journal of VLSI design & Communication Systems ( VLSICS )
http://airccse.org/journal/vlsi/vlsics.html
ISSN : 0976 - 1357 (Online); 0976 - 1527(print)
Most Cited Articles – 2012
Leakage Power Reduction And Analysis Of Cmos Sequential Circuits
M. Janaki Rani and S. Malarkann, VLSICS Journal, Vol.3, No.1, February 2012, PP. 13-23
DOI : 10.5121/vlsic.2012.3102
Area, Delay and Power Comparison of Adder Topologies
R.UMA,Vidya Vijayan , M. Mohanapriya and Sharon Paul, VLSICS Journal, Vol.3, No.1,
February 2012, PP. 153-168 DOI : 10.5121/vlsic.2012.3113
Wishbone bus Architecture-A Survey and Comparison Mohandeep
Sharma and Dilip Kumar, VLSICS Journal, Vol.3, No.2, April 2012, PP. 107-124
DOI : 10.5121/vlsic.2012.3210
Comparative Performance Analysis Of XOR-XNOR Function Based High Speed CMOS Full
Adder Circuits For Low Voltage VLSI Design
Subodh Wairya, Rajendra Kumar Nagaria and Sudarshan Tiwari, VLSICS Journal, Vol.3, No.2,
April 2012, PP. 221-242 DOI : 10.5121/vlsic.2012.3219
Finite State Machine based Vending Machine Controller with Auto-Billing Features
Ana Monga, and Balwinder Singh, VLSICS Journal, Vol.3, No.2, April 2012, PP. 19-28
DOI : 10.5121/vlsic.2012.3202
Low Power Dynamic Buffer Circuits
Amit Kumar Pandey1, Ram Awadh Mishra and Rajendra Kumar Nagaria, VLSICS Journal, Vol.3,
No.5, October 2012, PP. 53-65 DOI : 10.5121/vlsic.2012.3505
Design of Reversible Multipliers for linear filtering Applications in DSP
Rakshith Saligram and Rakshith T.R, VLSICS Journal, Vol.3, No.6, December 2012, PP. 67-77
DOI : 10.5121/vlsic.2012.3606
Most Cited Articles - 2011
Design And Analysis of Second And Third Order PLL At 450 Mhz
B. K. Mishra, Sandhya Save and Swapna Patil, VLSICS Journal, Vol.2, No.1, March 2011, PP. 97114 DOI : 10.5121/vlsic.2011.2109
Design of A High Frequency Low Voltage CMOS Operational Amplifier
Priyanka Kakoty, VLSICS Journal, Vol.2, No.1, March 2011, PP. 73-85
DOI : 10.5121/vlsic.2011.2107
High Speed Multiple Valued Logic Full Adder Using Carbon Nano Tube Field Effect Transistor
Ashkan Khatir , Shaghayegh Abdolahzadegan and Iman Mahmoudi, VLSICS Journal, Vol.2, No.1,
March 2011, PP. 1-9 DOI : 10.5121/vlsic.2011.2101
Design And Test Challenges In Nano-Scale Analog And Mixed CMOS Technology
Mouna Karmani, Chiraz Khedhiri and Belgacem Hamdi, VLSICS Journal, Vol.2, No.2, June 2011,
PP. 33-43 DOI : 10.5121/vlsic.2011.2203

2. A New Approach To Design Low Power Cmos Flash A/D Converter
Sudakar S. Chauhan, S. Manabala , S.C. Bose and R. Chandel, VLSICS Journal, Vol.2, No.2, June
2011, PP. 100-108 DOI : 10.5121/vlsic.2011.2208
Single Bit Full Adder Design Using 8 Transistors With Novel 3 Transistors XNOR Gate
Manoj Kumar, Sandeep K. Arya and Sujata Pandey, VLSICS Journal, Vol.2, No.4, December
2011, PP. 47-59 DOI : 10.5121/vlsic.2011.2405
Design of Reversible Sequential Circuit Using Reversible Logic Synthesis
Md. Belayet Ali , Md. Mosharof Hossin and Md. Eneyat Ullah, VLSICS Journal, Vol.2, No.4,
December 2011, PP. 37-45 DOI : 10.5121/vlsic.2011.2404
Most Cited Articles - 2010
Arithmetic Operations In Multi-Valued Logic
Vasundara Patel, K S Gurumurthy, VLSICS Journal, Vol.1,No.1,March 2010, PP. 21-32
DOI : 10.5121/vlsic.2010.1101
Design of Low Power Phase Locked Loop (Pll) Using 45nm Vlsi Technology
Ms. Ujwala A. Belorkar and S.A.Ladhake, VLSICS Journal, Vol.1, No.2, June 2010, PP. 1-11
DOI : 10.5121/vlsic.2010.1201
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