EEE 117L Network Analysis Laboratory Lab 1 1

EEE 117L Network Analysis Laboratory Lab 1
1
EEE 117L Network Analysis Laboratory
Lab 1 – Voltage/Current Division and Filters
Lab Overview
The objective of Lab 1 is to familiarize students with a variety
of basic applications of
passive R, C devices, and also how to measure the performance
of these circuits using
both Spice simulations and the Digilent Analog Discovery 2 on
the circuits constructed.
Prelab
Before coming to lab, students need to complete the following
items for each of the
circuits studied in this lab :
• Any hand calculations needed to determine the values of
components used in the
circuits such as resistors and capacitors, or specifications such
as pole frequencies.
• A Spice simulation of each circuit to get familiar with how it
works, and determine

what to expect when the circuit is built and its performance is
measured.
Making connections on a Breadboard
Breadboards are used to easily construct circuits without the
need to solder parts on a
printed circuit board. As seen in Figure 0 they have columns of
pins that are connected
together internally, so that all the wires inserted in a column are
shorted together. Note
that the columns on top and bottom are not connected together.
There are also rows of
pins at the top and bottom that are connected together. These
rows are intended for use
as the power supplies, and are typically labeled + and – and
color coded red and blue for
the positive and negative power supplies. These rows are not
connected in the middle.
Figure 0.
2
Circuits to be studied
When choosing resistor and capacitor values use standard values

available to you,
and keep all resistor values between 100 W and 100 kW.
1. Voltage and Current Dividers
One of the most commonly used circuits is a voltage divider
like the one shown in Figure 1.a. For example, if a signal is
too large to be input to a voltmeter or oscilloscope it can be
attenuated (reduced in size) using voltage division. The DC
voltage that an AC signal like a sine wave varies around can
also be reduced using this circuit.
For example, if all of the resistors in this circuit are the same
value, and the VS input source provides a DC voltage of 4V,
then the voltages in this circuit will be VA = 4V, VB = 3V,
VC = 2V, and VD = 1V. That is, voltage division will cause the
voltage at node B to be
¾ of VS , the voltage at node C to be ½ of VS , and the voltage
at node D to be ¼ of VS.
If a sine wave with an amplitude of 1V is then added so that VS
= 4 + sin(wt) Volts, then
voltage division will cause the new values of VA , VB , VC and
VD to be :
VA = 1.00*VS = 1.00*(4 + sin(wt)) = 4 + 1.00*sin(wt) Volts
VB = 0.75*VS = 0.75*(4 + sin(wt)) = 3 + 0.75*sin(wt) Volts
VC = 0.50*VS = 0.50*(4 + sin(wt)) = 2 + 0.50*sin(wt) Volts
VD = 0.25*VS = 0.25*(4 + sin(wt)) = 1 + 0.25*sin(wt) Volts
In this example both the amplitude of the sine wave and the DC
voltage that the sine
wave varies around are reduced by either 25%, 50%, or 75%,
depending on whether
the output voltage is measured at VB , VC or VD. It is also
possible to measure the

output voltage as the difference between two node voltages,
such as :
VBC = VB – VC = (3 + 0.75*sin(wt)) – (2 + 0.50*sin(wt)) = 1 +
0.25*sin(wt) Volts.
In addition there is no requirement that all the resistors be the
same value. By carefully
choosing different resistor values it is possible to adjust the
amount of signal attenuation
and the DC bias voltage that the signal varies around separately.
Design the circuit in Figure 1.a to both attenuate and level shift
the input VS
Choose the resistor values to set VBC = 0.1*VS ± 10%, and the
average DC value of VB
and VC equal to (VB + VC)/2 = 2V. Use VS = 4 + sin(wt) Volts
at a frequency of 1k Hz.
(Hint: You may want to set RD = 0 W for this.)
Figure 1.a
3
Current dividers are also commonly used to reduce the size
of a current signal, similar to how voltage dividers are used
to attenuate the size of a voltage signal. For example, if in
the circuit shown in Figure 1.b both resistors are set to the

same value, then the current flowing in each resistor will be
½ of the input current IS.
A common application of a current divider is to sense the
amount of current flowing in a load resistor by placing a
second resistor in parallel with it, and then measuring the
current flowing in that resistor instead. This is particularly
useful when a large current is flowing in the load resistor,
which makes it difficult to measure that current directly.
For example, if in Figure 1.b the resistor RB has a value of
10 W and the resistor RA has a value of 10 kW, then when
there is 1A flowing in RB there is only 1mA flowing in RA ,
which is much easier to measure. And since the ratio
between RA and RB is known to be 1000:1, we know by
current division that a current of 1mA in RA means there
must be 1A flowing in RB.
Sometimes it’s not possible to measure a current using an
ammeter (e.g., the Digilent
Analog Discovery 2 doesn’t have an ammeter), so an alternate
approach that can be
used is to measure the voltage across a known resistor, and then
use Ohm’s Law to
convert this measured voltage to a current value. For example,
in Figure 1.c an extra
resistor RAi is added in series with the RA resistor to measure
the current flowing in RA
by measuring the voltage across the known resistor RAi and
then using IA = VAi/RAi.
Design the circuit in Figure 1.c to measure the current in RB by
measuring VAi
Set RB = 100 W and choose the values of RA and RAi to be
able to measure the current
flowing in RB within ± 10% as VS is varied by measuring VAi.
Be sure to make RA >> RB

so that the current flowing in RA is much smaller than the
current flowing in RB.
2. Low-pass Filter
Another type of circuit that is often needed is a filter that
allows
only a certain range of input frequencies to pass through it and
get to the output. The first one of these we’re going to consider
is the low pass filter shown in Figure 2. This circuit uses the
fact
that the impedance of a capacitor goes down as frequency goes
up
to create a voltage divider whose gain decreases as the input
signal
frequency increases. A typical application of a low pass filter is
to be
able to adjust the amount of bass heard in audio signals like
music.
Figure 1.b
Figure 1.c
Figure 2
4

The transfer function for this low-pass filter is given by :
�" =
%&
%'
= (
)
)* +, ,-.
/ where the pole frequency is given by : �1 =
)
2' 34
which gives the magnitude and phase of the transfer function as
frequency varies to be :
|�"| = 6
)
7)* 8, ,-. 9
:
; and the phase = 0° − �� 8� �1. 9
Which shows that at frequencies << wp where the capacitor
looks like an open circuit,
the voltage gain is approximately 1 with a phase of 0°. And at
frequencies >> wp the
capacitor looks like a short circuit, so the voltage gain

approaches 0 with a phase of -90°.
Key concept: Capacitors look like short circuits at high
frequencies and open circuits at
low frequencies. So a capacitor in parallel shorts out the signal
at high frequencies, and
a capacitor in series blocks the signal at low frequencies.
To be more exact, the magnitude of the voltage gain drops off at
-20dB/decade as the
frequency increases above wp. And the phase decreases with a
slope of -45°/decade
from 1 decade below wp to 1 decade above wp , until it reaches
a maximum of -90°.
At exactly the pole frequency w = wp the magnitude of the
voltage gain is reduced by
)
√E
= 0.707 or -3dB, and the phase of the voltage gain is equal to -
45°.
Note: A decade means a factor of 10 in frequency. So 1 kHz is 1
decade below 10 kHz,
and 100 kHz is 1 decade above 10 kHz.
Design the circuit in Figure 2 to have a pole frequency of 10
kHz ± 10%.
Before constructing the circuit use an AC analysis in Spice to
create a Bode plot for
this circuit, and verify that the pole frequency is as expected
with the R and C values you
selected. Then construct the circuit and measure the actual pole
frequency you achieved.
Also measure both the magnitude and phase of the voltage gain
at several frequencies

much lower than the pole frequency (at least 10 to 100 times
smaller), and at several
frequencies much higher than the pole frequency (at least 10 to
100 times larger).
Tip: To measure the magnitude of the voltage gain, input a sine
wave to the circuit at
the desired frequency, and compare the peak-to-peak amplitudes
of the input and output
signals. To measure the phase of the voltage gain, measure the
phase shift between the
input and output signals. At the pole frequency the phase shift
is -45°. Also note that the
Analog Discovery 2 can measure a Bode plot using the Network
Analyzer feature.
5
Another way to measure the pole frequency of this filter is to
input a square wave and
measure either the time constant for the circuit, or the 10% -
90% rise/fall times. This
uses the fact that for a single pole low-pass filter the time
response to a step is given by:
�G(�) = �G(��) + ∆�G 81 −�P
Q R. 9 where the time constant t is : � = �U �W

Here VO(initial) is the voltage just before the step is taken, and
DVO is the size of the step
taken = VO(final) - VO(initial). The value of the time constant
can be found by measuring
how long it takes the output voltage to take 63.2% of the step,
since at t = t the output
voltage is :
�G(� = �) = �G(��) + ∆�G(1 − �P)) =
�G(��) + ∆�G(0.632)
Once t is known, then the pole frequency can be found using :
�1 =1 �.
We can also use the pole frequency to find how long it takes for
the output voltage to go
from 10% of the step to 90% of the step, which is called the
“10% to 90% rise time”.
(This is also the same time it takes for the step to fall from 90%
back down to 10%,
which is called the “10% to 90% fall time”.) This 10% - 90%
rise/fall time is given by :
�]^_ = � abb = 0.35 �1.
where fp is the pole frequency in Hertz : �1 =
�1
2�.
Measure the pole frequency from the step response to a square
wave.
Input a 1 Vpeak-to-peak square wave to your low-pass filter,
and find the pole frequency
both by measuring the time constant, and also by measuring the
10% to 90% rise time.

Compare the values you get to your previous value found when
the phase shift = -45°.
Interview question: If the resistors used to construct the low -
pass filter in Figure 2 have
a tolerance of ± 5% , and the capacitors have a tolerance of ±
10% , then how much
variation will there be in the pole frequency when millions of
these are manufactured?
3. High-pass Filter
The second filter that we’re going to consider is the high pass
filter shown in Figure 3. This is similar to the low pass filter
just examined, but with the resistor and capacitor swapped.
This circuit uses the fact that the impedance of a capacitor
goes down as frequency goes up to create a voltage divider
whose gain increases as the input signal frequency increases.
A typical application of a high pass filter is to be able to adjust
the amount of treble heard in audio signals like music.
Figure 3
6
The transfer function for this high-pass filter is given by :
�" =

%&
%f
= (
+,
,-.
)* +, ,-.
/ where the pole frequency is given by : �1 =
)
24 3'
which gives the magnitude and phase of the transfer function as
frequency varies to be :
|�"| = 6
, ,-.
7)* 8, ,-. 9
:
; and the phase = 90° − �� 8� �1. 9
Which shows that at frequencies >> wp where the capacitor
looks like a short circuit,
the voltage gain is approximately 1 with a phase of 0°. And at
frequencies << wp the
capacitor looks like an open circuit so the voltage gain
approaches 0 with a phase of 90°.
Key concept: Capacitors look like short circuits at high
frequencies and open circuits at
low frequencies. So a capacitor in parallel shorts out the signal
at high frequencies, and
a capacitor in series blocks the signal at low frequencies.

To be more exact, the magnitude of the voltage gain increases at
+20dB/decade as the
frequency increases from << wp up to wp. And the phase
decreases from +90° at low
frequencies with a slope of -45°/decade from 1 decade below wp
to 1 decade above wp ,
until it reaches a minimum of 0°. At exactly the pole frequency
w = wp the magnitude of
the voltage gain is reduced by
)
√E
= 0.707 or -3dB, and the phase of the voltage gain is
equal to +45°.
Note: A decade means a factor of 10 in frequency. So 1 kHz is 1
decade below 10 kHz,
and 100 kHz is 1 decade above 10 kHz.
Design the circuit in Figure 3 to have a pole frequency of 100
Hz ± 10%.
create a Bode plot for
this circuit, and verify the pole frequency is as expected with
the R and C values you
selected. Then construct the circuit and measure the actual pole
frequency you achieved.
Also measure both the magnitude and phase of the voltage gain
at several frequencies
much lower than the pole frequency (at least 10 to 100 times
smaller), and at several
frequencies much higher than the pole frequency (at least 10 to
100 times larger).

is 45°. Also note that the
Analyzer feature.
7
Another way to measure the pole frequency of this filter is to
input a square wave and
measure either the time constant for the circuit, or the 10% -
90% rise/fall times. This
uses the fact that for a single pole high-pass filter the time
response to a step is :
�G(�) = �G(��) + ∆�G 8�P
Q R. 9 where the time constant t is : � = �W �U
Here VO(initial) is the voltage just before the step is taken and
DVO is the size of the step.
The value of the time constant can be found by measuring how
long it takes for 63.2%
of the step to decay (how long until only 36.8% of the step is

still seen at the output),
since at t = t the output voltage is :
�G(� = �) = �G(��) + ∆�G(�P)) =
�G(��) + ∆�G(0.368)
Once t is known, then the pole frequency can be found using :
�1 =1 �.
We can also use the pole frequency to find how long it takes for
the output voltage to go
from 10% of the step to 90% of the step, which is called the
“10% to 90% rise time”.
(This is also the same time it takes for the step to fall from 90%
back down to 10%,
which is called the “10% to 90% fall time”.) This 10% - 90%
rise/fall time is given by :
�]^_ = � abb = 0.35 �1.
where fp is the pole frequency in Hertz : �1 =
�1
2�.
Measure the pole frequency from the step response to a square
wave.
Input a 1 Vpp (peak-to-peak) square wave to your high-pass
filter, and find the pole
frequency both by measuring the time constant, and also by
measuring the 10% to 90%
fall time. Compare the values you get to your previous value
found when the phase shift
= 45°.
Interview question: An ideal high-pass filter has a non-zero

voltage gain at high
frequencies all the way up to w = ¥ . Is that true for an actual
high-pass filter built
using a real resistors and capacitors? Why?
4. Band-pass filter
The low-pass and high-pass filters just considered
can be combined to create a band-pass filter, which
only allows signals in a limited range of frequencies
to pass from the input to the output. A typical
application of a bandpass pass filter is to be able to
adjust the amount of midrange frequencies heard
in audio signals like music.
Figure 4
8
Combine the low-pass and high-pass filters previously designed
as shown in
Figure 4 to create a band-pass filter.
create a Bode plot for this
circuit, and verify that both the lower and upper pole
frequencies are as expected from
your previous designs for the low-pass and high-pass filters.
Then construct the circuit

and measure the actual low and high frequency poles that you
achieved. Also measure
both the magnitude and phase of the voltage gain in the
midband frequency range
between the two poles, as well as at several frequencies much
lower than the low
frequency pole (at least 10 to 100 times smaller), and at several
frequencies much
higher than the high frequency pole (at least 10 to 100 times
larger).
is 45°. Also note that the
Analyzer feature.
Interview question: How could the outputs from a low -pass
filter and a high-pass filter
be combined to create a filter that attenuates signals in a narrow
range of frequencies?
This is called a band-reject or “notch” filter.
Resistor Color Code

Appendix 1: Breadboarding
A1.1 Background
In the laboratory, electronic circuits are often connected in a
temporary fashion in order to facilitate
testing. This type of construction is called breadboarding.
Circuits built using a breadboard technique
often do not perform as well as those constructed in a more
compact and permanent form (e.g., on a printed
circuit board). In breadboard construction, however, it is easier
to alter the circuit for experimentation.
This section will describe potential problems with breadboard
construction and suggest ways to mitigate
them.
A popular device for breadboarding with integrated circuits is
called a solderless breadboard, and a
typical one is shown in Figure A1. The breadboard has a grid
pattern of holes into which wires, component
leads, or integrated circuit (IC) pins may be inserted. Each hole
is an electrical connection point, and the
holes are electrically connected according to a pattern. A
typical connection pattern is shown in the figure.
The vertical rows of 5 connected holes do not connect across
the center gap. Two or more wires or
component leads inserted into the same connecting row are
electrically connected together. For example,
the figure shows an 8-pin IC inserted in the breadboard.
Anything inserted into the same vertical row as
pin 8 of the IC will be electrically connected to that pin. Long
rows at the top and bottom can be used to
make many connections to the same node from different

locations on the breadboard (e.g., to a power
supply or ground bus). On many breadboards, the long rows are
connected all the way across, but some of
them break the long rows in the center.
A1.2 Practical Circuits
A practical circuit (i.e., a circuit constructed with real
components) contains parasitic elements.
These elements are not deliberately put into the circuit, but are
present because of the physical properties of
the materials used to construct the circuit and its components.
Parasitic capacitances exist between two
conductors separated by an insulator, parasitic resistances are
present due to finite conductance of wires
and contacts, and wires have self and mutual inductance.
In solderless breadboards, parasitic capacitances are present
between adjacent rows, and from each
row to ground if the breadboard is mounted on a metal surface.
These capacitances are on the order of a
few picofarads. Parasitic series resistances on the order of one
ohm occur at each connection point. Wires
used to make connections have a series inductance of about
15nH per centimeter (about 40nH per inch),
and mutual inductances exist between wires.
Breadboarded circuits in general have especially high parasitic
element values, and these can cause
problems during testing. Some of the more common problems
are described below.
Parasitic elements often create low-pass filters, which degrade
the high-frequency performance of
amplifiers. It is often possible to ignore such high-frequency
loss and do useful testing at lower

Connected Rows
May or may not be
connected here (see text)
Four empty holes connect to IC pin 8
Center gap
Figure A1. A Solderless Breadboard.
frequencies. If a parasitic low-pass filter occurs within a
feedback loop, however, the added phase shift
may make the loop unstable. Instability implies that the circuit
will oscillate (i.e., it will produce signals
even if there is no input). The circuit must be stabilized before
any useful testing can be done.
Schematic diagrams typically show numerous connections to
ground. Ideally, all of these connections
are at ground potential. Between each connection to ground,
however, parasitic series inductances and
resistances exist. Therefore as signal currents flow from one
ground connection to another, small voltages
are developed between the connection points. The same is true
for connections to power supply nodes.
When imperfect connections to ground or power supplies are
shared, unintentional signal paths are created.
In other words, parts of the circuit that are supposed to be
isolated from each other will interact. The
unwanted signal paths can be another cause of circuit
instability.

A1.3 Standard Practices
Carrying out a complete circuit analysis including all parasitic
elements is often not practical for hand
calculations. Indeed, integrated circuit (IC) designers use
specialized computer programs to determine
parasitic element values from the IC layout, and then include
the parasitics in SPICE simulations. For
breadboarded circuitry, it is preferable to follow certain
standard practices that minimize the effects of
parasitic elements.
The following are principles of good breadboarding technique:
• Avoid using wires that are unnecessarily long. (It is not
necessary to force wires to follow right-
angle paths as in drawn schematic diagrams.)
• Avoid using more connection points (tie points) than
necessary.
• Try to make all ground connections to a single, low -resistance
bus (e.g., only one row of a solderless
breadboard).
• To the extent possible, keep amplifier outputs physically
separated from amplifier inputs.
• Do not use solderless breadboards for high frequency (e.g.,
radio frequency) circuits. If a high-
frequency circuit must be breadboarded, construct the circuit
using point-to-point soldering above a
ground plane. A piece of new (i.e., not etched) printed circuit
board material will provide a good
ground plane.
• Always use power supply bypass capacitors (see below).

A1.4 Power Supply Bypass Capacitors
The creation of undesirable signal voltages on the power supply
busses can be greatly reduced by the
use of power supply bypass capacitors. These are placed
physically near sensitive circuitry. In many
cases, bypass capacitors are not optional, but necessary. Bypass
capacitors are not just for breadboards;
they are used on printed circuit boards (e.g., at each IC package
on a printed circuit board). IC designs
sometimes include bypass capacitors on the silicon chip itself.
Figure A2 shows the basic principle of power supply bypass
capacitors. The power supply voltage is
connected to the load through long wires that each have
resistance R and an inductance L. The load current
may have constant part, but here we are concerned with the
time-varying (ac) part called ( )i t . When the
bypass capacitor BC is not used, the ac load current must flow
through the large loop. In this case, voltage
drops will develop across the parasitic resistances and
inductances, and the load voltage will contain a
significant time-varying part. This situation can cause
problems, especially if more than one load shares
VSUPPLY CB i t( )
R
R L
L
Small

Loop
(with
CB)
Large
Loop
(without CB)
VLOAD
Figure A2. Circuit with long power supply leads.
the same long wires to the supply voltage. In that case, the
current of one load will affect the voltage across
the other and vice versa. The addition of BC will help by
reducing the size of the ac current loop and the
number of elements it contains.
A good rule for breadboarding is to always use at least one 0.1
Fµ bypass capacitor between each
power supply and ground on the breadboard. It may be
necessary to use one capacitor for each supply at
each block of circuitry or at each chip. Bypass capacitors
should be good high-frequency capacitors such
as disk ceramic or monolithic ceramic.
A1.5 Examples
Figure A3 shows a simple operational amplifier (op-amp) circuit
that is to be breadboarded. This
schematic shows the pin numbers of the integrated circuit, and
includes the power supply pins and their
bypass capacitors. Normally, the pin numbers are not shown
because they can be found in the data sheet

for the type of op-amp used. The power supply connections and
bypass capacitors are normally not shown
in order to keep the schematic neat.
Figure A4 shows an example of breadboard construction (of the
circuit of Figure A3) with a poor
construction technique. The figure has the following numbered
notes:
1) Extra connection points are used for the feedback resistor fR
.
2) An extra-long wire is used to connect the inverting input of
the op-amp to fR .
3) An extra-long wire is used to connect the non-inverting input
of the op-amp to ground.
4) An extra connection point is used for 1BC .
5) Input and output connections are physically close. As a
general rule, input connections should
be separated from output connections. If this is a unity-gain
stable op-amp, then it's probably
OK for the inverting input to be near the output.
In some situations, it may not be necessary (or even possible) to
avoid every flaw described above.
For example, the technique shown in Figure A4 might be
acceptable for low-frequency testing with a 741
op-amp. It should be noted, however, that problems due to poor
technique tend to have a cumulative effect
in larger circuits. The best construction technique should be
used wherever possible.
2
3

6
7
4
INV
OUTV
10V+
10V−
R f
Ri
CB1
CB2
Figure A3. Example Circuit.
IC
+10V bus
-10V bus
GND bus
1
2
3

4
OUTV
INV
5
Figure A4. Poor technique.
An example of the same circuit with better breadboarding
technique is shown in Figure A5. The notes for
the figure are as follows:
6) The feedback resistor fR is connected directly from pin 2 to
pin 6 with no extra connection
points. The resistor can be physically placed above the IC
package.
7) A short wire is used to connect the non-inverting input to
ground.
8) The bypass capacitors go to ground via the shortest, most
direct path. This is not always
possible.
9) The input is separated from the output.
IC
+10V bus

-10V bus
GND bus
INV
OUTV
6
7
8
9
Figure A5. Good technique.

EEE 117L Network Analysis Laboratory Lab 1 1

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