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Electrical and Electronics Engineering: An International Journal (ELELIJ) Vol 3, No 3, August 2014 
INVESTIGATION OF CLOSED LOOP 
CURRENT CONTROL STRATEGIES FOR 
BRIDGELESS INTERLEAVED SEPIC 
CONVERTER 
1R.Sreemallika, 2R.Seyezhai 
1PG Scholar, SSN College of Engineering, Chennai, India 
2Associate Professor, SSN College of Engineering, Chennai, India 
Abstract. This paper presents current control strategies for a novel Bridgeless Interleaved SEPIC PFC 
Converter to regulate power factor correction. The strategies discussed in this paper are peak current 
control, Average current control and Non-Linear carrier control. Simulation work has been carried out in 
MATLAB/SIMULINK. The performance parameter of the converter is compared under open loop and 
closed loop conditions. Based on the results, the input current is observed to be close to sinusoidal 
implying a low harmonic profile and high power factor. 
1 Introduction 
Conventional switched mode power supplies comprise of a diode bridge rectifier with a filter 
capacitor. This draws highly distorted non-sinusoidal input current from the mains and thus they 
have harmonic rich distorted supply current. As per the norms of the international standards for 
power quality, it is recommended to have the power factor close to unity. To address this issue, 
power factor correction has become an integral part of switched mode power supplies. Active 
power factor correction circuits are adopted to maintain the power factor close to unity by 
controlling the current drawn by the load such that the supply current is proportional to the supply 
voltage so that a resistive behaviour is emulated. There are a number of power factor correction 
AC-DC converters available in the literature. However, SEPIC converter is one the popular 
topologies for active power factor correction as it can provide voltages higher or lower than the 
supply voltage and also a high power factor can be achieved. [1] 
In this paper, various current control strategies such as Peak current, average current and Non- 
Linear carrier current control techniques for a novel Bridgeless Interleaved SEPIC Converter 
have been studied and analysed. These techniques have been simulated in MATLAB/Simulink. In 
section 2, the operation of Bridgeless Interleaved SEPIC PFC Converter is discussed. The 
working of the current control strategies is presented in section 3. Simulation results of the 
models are discussed in Section 4. A comparative analysis based on the performance parameters 
is carried out and the results show the effect of control strategies on the converter. The results are 
verified. 
2 Bridgeless Interleaved SEPIC converter 
Bridgeless Interleaved SEPIC Converter topology is shown in Fig.1. Construction wise, two more 
diodes and MOSFET switches are added to the input diode bridge rectifier. This topology 
exploits the benefits of bridgeless and interleaved topologies. As the Bridgeless topology 
eliminates the diode bridge, the heat management is resolved and thus conduction losses are 
DOI : 10.14810/elelij.2014.3306 63
Electrical and Electronics Engineering: An International Journal (ELELIJ) Vol 3, No 3, August 2014 
minimized. The interleaving topology divides the current stress in the semiconductor devices and 
the ripple in the supply current is also greatly minimized. [2] 
64 
Fig. 1.Bridgeless Interleaved SEPIC Converter 
With reference to Fig.1, when the supply voltage is positive, Q1/Q3 is switched on and current 
flows through L1-Q1-Q3-L3. During this period, energy is stored in L1 and L3. When Q1/Q3 is 
switched off, L1 and L3 releases its stored energy through C1 /C3, load and returns through the 
body diode of Q3 back to the input mains. The inductors connected to the Q1/Q3 leg on load side 
L5/L7 takes energy from the SEPIC capacitor C1 and C3 and the output capacitor supplies the 
load. During the negative half cycle, Q4/Q2 is turned on and current flows through L4 -Q4-Q2- 
L2, returning to the line; during this period, energy is stored in L4 and L2. When Q4/Q2 are 
turned off, L4 and L2 releases its stored energy and thus current flows through C2 /C4, load and 
returns through the body diode of Q2 back to the input mains. The inductors connected to the 
Q4/Q2 leg on load side takes energy from the SEPIC capacitor C2 and C4, and the output 
capacitor supplies the load. [3] 
3 Current control strategies for Bridgeless Interleaved SEPIC Converter 
The power factor obtained in the open loop configuration of the converter can be enhanced by 
adopting current control techniques. By introducing the feedback and feed forward loops, lower 
harmonic profile can be maintained[4].The general control principle of the controller is that the 
supply current is forced to track a generated sinusoidal reference so that the converter draws a 
sinusoidal current; thereby power factor is improved. Generally two loops are implemented in the 
controller; to control the instantaneous input current to follow the same wave shape as the 
instantaneous input voltage, current feedback loop is implemented. The other loop is a voltage 
feedback loop which adjusts the input current so as to maintain a constant output voltage [5]. 
Many current control strategies have been reported in the literature. The following section 
highlights the implementation of peak current, average current and Non-Linear carrier control 
strategies for Bridgeless Interleaved SEPIC Converter. To operate the converter as a power factor 
corrector, we consider continuous conduction mode as the current stress and current ripple are 
minimum in this mode.
Electrical and Electronics Engineering: An International Journal (ELELIJ) Vol 3, No 3, August 2014 
65 
3.1 Peak Current control 
Fig. 2.Peak Current control of Bridgeless Interleaved SEPIC Converter 
The working of peak current mode control (refer Fig.2) is as follows. In the outer voltage loop, 
Verror is generated by comparing the output voltage of the converter with a reference voltage. The 
voltage error and the input sinusoidal reference current are multiplied to generate a reference 
current in such a way such that it traces the peak of the inductor current. The upslope of inductor 
current is compared with this reference current .Whenever the inductor current crosses zero, 
switch is turned on and as it reaches the reference current, the flip-flop is reset and the switch is 
turned off. [5-8] 
3.2 Average Current Control 
This technique allows a better input current waveform than the peak current control method as a 
Current error amplifier (CEA) is introduced in this technique. Average Current control technique 
(refer Fig.3) is a two loop control method; it has as an inner current control loop and an outer 
voltage control loop. This CEA output which is the difference between the average inductor 
current and the voltage error provided by the outer loop is then compared with a large amplitude 
ramp waveform with the converter switching frequency using Pulse Width Modulation (PWM) 
comparator. Thus, the average of inductor current is taken as the reference and the inductor 
current is forced to follow it. The switch is turned on whenever the inductor current reaches zero 
and switch is turned off when the inductor current falls below the reference. The voltage Error 
Amplifier forces the converter output voltage to track the voltage reference by controlling the 
average inductor current. [5-9].
Electrical and Electronics Engineering: An International Journal (ELELIJ) Vol 3, No 3, August 2014 
66 
Fig 3.Average Current controlled Bridgeless Interleaved SEPIC Converter 
3.3 Non-Linear Carrier Control 
In this technique, a negative ramp carrier waveform is generated .There are two ways of 
controlling the duty cycle through this method. One is by inductor current sensing and the other 
method is switch current sensing. The controller generates the pulses from the comparison of the 
negative ramp carrier waveform and the sensed inductor current signal as shown in Fig 4a or 
sensed switch current signal as shown in Fig 4b. 
(a) 
(b) 
Fig.4. Non-Linear Carrier Current control of Bridgeless Interleaved SEPIC Converter.(a)Inductor current 
sensing (b) Switch current sensing
Electrical and Electronics Engineering: An International Journal (ELELIJ) Vol 3, No 3, August 2014 
The sinusoidal switch current/Inductor current is sensed to compare with the nonlinear carrier 
waveform in each switching period to achieve the sinusoidal input current wave shape or high 
power factor condition. The distinguishing feature of this technique is that it eliminates 
multiplier, voltage sensor and current error amplifier circuits in the controller loop [9-10]. Thus 
this controller offers improved performance over the other schemes. 
67 
4 Simulation Results 
The simulation results of the current control strategies for Bridgeless Interleaved SEPIC converter 
are discussed in this section. In this work, the converter is designed with the simulation 
parameters as follows; =24V, 50Hz, Vo =48V, fsw=25 KHz Duty Cycle=59%, L1 L2 L3 L4 = 
2.8mH, L5 L6 L7 L8=4.03mH, C1 C2 C3 C4=6.7μF and =3200μF. The performance of the 
converter is analyzed by computing parameters such as Total Harmonic Distortion (THD), 
Distortion factor Kd, Displacement factor K and power factor. 
The simulation results of the peak current control mode are shown in Fig.5.It is found that the 
THD in this mode is 5.38%.Thus the power factor is higher than the open loop configuration of 
the converter. 
40 
30 
20 
10 
0 
-10 
-20 
-30 
-40 
0.02 0.03 0.04 0.05 0.06 0.07 0.08 0.09 0.1 
Time(sec) 
Supply Voltage(V) , Supply Current(A) 
(a) 
100 
90 
80 
70 
60 
50 
40 
30 
20 
10 
0 
0 0.01 0.02 0.03 0.04 0.05 0.06 0.07 0.08 0.09 0.1 
Time(sec) 
Outp ut Vo ltage(V) 
(b) (c) 
Fig.5. Simulation results of Peak current control of Bridgeless Interleaved SEPIC converter. (a) Supply 
voltage and supply current (b) Output voltage (c) FFT Analysis of supply current 
The simulation results of the average current control mode are shown in Fig.6. From Fig.6b, it is 
observed that the THD is 4.20% and is lower than the peak current control. 
40 
30 
20 
10 
0 
-10 
-20 
-30 
-40 
0.02 0.03 0.04 0.05 0.06 0.07 0.08 0.09 0.1 
Time(sec) 
Supply Voltage(V) , Supply Current(A) 
(a)
Electrical and Electronics Engineering: An International Journal (ELELIJ) Vol 3, No 3, August 2014 
68 
0.02 0.03 0.04 0.05 0.06 0.07 0.08 0.09 0.1 
100 
90 
80 
70 
60 
50 
40 
30 
20 
10 
0 
Time(sec) 
O u tp u t V o lta ge (V ) 
(b) (c) 
Fig.6. Simulation results of Average current controlled Bridgeless Interleaved SEPIC Converter. (a) Supply 
voltage and supply current (b) Output voltage (c) FFT Analysis of supply current 
Fig.7 and Fig.8 shows the simulated results of the non-linear current mode by inductor current 
sensing and switch current sensing respectively. It is observed that the THD is very much 
improved than the previously discussed control techniques. 
40 
30 
20 
10 
0 
-10 
-20 
-30 
-40 
0.02 0.03 0.04 0.05 0.06 0.07 0.08 0.09 0.1 
Time(sec) 
Supply Voltage(V) , Supply Current(A) 
(a) 
100 
90 
80 
70 
60 
50 
40 
30 
20 
10 
0 
0 0.01 0.02 0.03 0.04 0.05 0.06 0.07 0.08 0.09 0.1 
Time(sec) 
O u t p u t V o lt a g e (V ) 
(b) (c) 
Fig.7.Simulation results of Non-Linear Carrier current control by Inductor current Sensing. (a) Supply 
voltage and supply current (b) Output voltage(c) FFT Analysis of supply current 
40 
30 
20 
10 
0 
-10 
-20 
-30 
-40 
0.02 0.03 0.04 0.05 0.06 0.07 0.08 0.09 0.1 
Time(sec) 
Supply Voltage(V) , Supply Current(A) 
(a)
Electrical and Electronics Engineering: An International Journal (ELELIJ) Vol 3, No 3, August 2014 
69 
100 
90 
80 
70 
60 
50 
40 
30 
20 
10 
0 
0 0.01 0.02 0.03 0.04 0.05 0.06 0.07 0.08 0.09 0.1 
Time(sec) 
O u t p u t V o l t a g e ( V o l t s ) 
(b) (c) 
Fig.8. Simulation results of Non-Linear Carrier current control by Switch current sensing. (a) 
Supply voltage and supply current (b) Output voltage(c) FFT Analysis of supply current 
Table.1 shows the comparison between the performance parameters of open loop and closed loop 
configuration of Bridgeless Interleaved SEPIC Converter. 
Table 1.Comparison of performance parameters of Bridgeless Interleaved SEPIC Converter 
Bridgeless Interleaved SEPIC Converter 
Topology 
THD 
(%) 
Kd K 
Power 
Factor 
Open Loop 6.26 0.9980 0.9903 0.9883 
Peak Current 5.38 0.9986 0.9944 0.9929 
Average Current 4.20 0.9991 0.9945 0.9936 
Non-Linear carrier Current, Inductor current 
3.90 0.9992 0.9956 0.9950 
sensing 
Non-Linear carrier Current, Switch current 
sensing 
3.42 0.9994 0.9963 
0.9955 
From Table 1, it is evident that the closed loop strategies enhance the power quality. Among the 
current control strategies, we find that the Non-Linear carrier control has power factor close to 
unity and thus considered more effective. 
5 Conclusion 
In this paper, a novel Bridgeless Interleaved SEPIC Converter for power factor correction has 
been discussed and it is found that it has a better harmonic profile compared to other active PFC 
topologies. To improvise the supply current quality, the current control techniques like peak 
current, average current and Non-Linear carrier control techniques have been incorporated. The 
validity of the designed control strategies have been verified by MATLAB simulation. Simulation 
results shows that the closed loop strategies significantly increase the power quality and the 
supply current follows the supply voltage very closely. From the results, it is obvious that the 
Non-Linear carrier control has lower THD and high power factor and thus proves to be more 
suitable control strategy for power factor correction. 
Acknowledgement 
The authors wish to thank the SSN management for funding the proposed work. 
REFERENCES 
[1] Ye, Zhongming, Fred Greenfeld, and Zhixiang Liang. Single-stage offline SEPIC converter with 
power factor correction to drive high brightness LEDs. In Applied Power Electronics Conference 
and Exposition, 2009. APEC 2009. Twenty-Fourth Annual IEEE, pp. 546-553. IEEE, 2009.
Electrical and Electronics Engineering: An International Journal (ELELIJ) Vol 3, No 3, August 2014 
[2] de Seixas, Falcondes JM, and Priscila da S. Oliveira. Experimental evaluation of the bridgeless 
interleaved boost PFC converter. Industry Applications (INDUSCON), 2012 10th IEEE/IAS 
International Conference on. IEEE, 2012. 
[3] Musavi, Fariborz, Wilson Eberle, and William G. Dunford. A high-performance single-phase 
bridgeless interleaved PFC converter for plug-in hybrid electric vehicle battery chargers. Industry 
Applications, IEEE Transactions on 47.4 (2011): 1833-1843. 
[4] Seyezhai, R., Abhinaya Venkatesan, M. Ishwarya, and K. Gayathri. Analysis of Current Control 
Techniques on Bridgeless Interleaved Boost DC-DC Converter to Improve Power Quality. 
International Journal of Scientific Research in Computer Science and Engineering 1, no. 04 (2013): 
44-49. 
[5] Lenine, D., Ch Sai Babu, and D. Jamal Reddy. Design and Analysis of Robust Current Control of 
70 
PFC Boost Rectifier. International Journal of Engineering 1, no. 6 (2012). 
[6] Rossetto. L., Spiazzi G., Tenti P., “Control techniques for power factor correction converters”, Power 
Electronics and Motion Control (PEMC), September, pp.1310-1318, 1994. 
[7] Karaarslan, A., and I. Iskender. The analysis of AC-DC boost PFC converter based on peak and 
hysteresis current control techniques. International Journal on Technical and Physical Problems of 
Engineering (IJTPE) 7: 100-105. 
[8] Purton, K. D., and R. P. Lisner. average current mode control in power electronic converters–analog 
versus digital. Electrical and Computer System Engineering, Monash University, Australia (2002). 
[9] Robert W. Erickson  Dragon Maksimovic” Fundamentals of Power Electronics” Second Edition, 
2001 Springer science and Business media 
[10] Tanitteerapan, T., and E. Thanpo. Negative Slope Ramp Carrier Control for High Power Factor 
Boost Converters in CCM Operation. World Academy of Science, Engineering and Technology 53 
(2009): 1084-1089. 
[11] Kurkute, Sanjay L., Pradeep M. Patil, and Vinod H. Patil. A Comparative Study and Analysis of 
Power Factor Control Techniques. International Journal of Computer Science  Emerging 
Technologies (E-ISSN: 2044-6004) Volume 1.

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Closed Loop Current Control Strategies for Bridgeless Interleaved SEPIC Converter

  • 1. Electrical and Electronics Engineering: An International Journal (ELELIJ) Vol 3, No 3, August 2014 INVESTIGATION OF CLOSED LOOP CURRENT CONTROL STRATEGIES FOR BRIDGELESS INTERLEAVED SEPIC CONVERTER 1R.Sreemallika, 2R.Seyezhai 1PG Scholar, SSN College of Engineering, Chennai, India 2Associate Professor, SSN College of Engineering, Chennai, India Abstract. This paper presents current control strategies for a novel Bridgeless Interleaved SEPIC PFC Converter to regulate power factor correction. The strategies discussed in this paper are peak current control, Average current control and Non-Linear carrier control. Simulation work has been carried out in MATLAB/SIMULINK. The performance parameter of the converter is compared under open loop and closed loop conditions. Based on the results, the input current is observed to be close to sinusoidal implying a low harmonic profile and high power factor. 1 Introduction Conventional switched mode power supplies comprise of a diode bridge rectifier with a filter capacitor. This draws highly distorted non-sinusoidal input current from the mains and thus they have harmonic rich distorted supply current. As per the norms of the international standards for power quality, it is recommended to have the power factor close to unity. To address this issue, power factor correction has become an integral part of switched mode power supplies. Active power factor correction circuits are adopted to maintain the power factor close to unity by controlling the current drawn by the load such that the supply current is proportional to the supply voltage so that a resistive behaviour is emulated. There are a number of power factor correction AC-DC converters available in the literature. However, SEPIC converter is one the popular topologies for active power factor correction as it can provide voltages higher or lower than the supply voltage and also a high power factor can be achieved. [1] In this paper, various current control strategies such as Peak current, average current and Non- Linear carrier current control techniques for a novel Bridgeless Interleaved SEPIC Converter have been studied and analysed. These techniques have been simulated in MATLAB/Simulink. In section 2, the operation of Bridgeless Interleaved SEPIC PFC Converter is discussed. The working of the current control strategies is presented in section 3. Simulation results of the models are discussed in Section 4. A comparative analysis based on the performance parameters is carried out and the results show the effect of control strategies on the converter. The results are verified. 2 Bridgeless Interleaved SEPIC converter Bridgeless Interleaved SEPIC Converter topology is shown in Fig.1. Construction wise, two more diodes and MOSFET switches are added to the input diode bridge rectifier. This topology exploits the benefits of bridgeless and interleaved topologies. As the Bridgeless topology eliminates the diode bridge, the heat management is resolved and thus conduction losses are DOI : 10.14810/elelij.2014.3306 63
  • 2. Electrical and Electronics Engineering: An International Journal (ELELIJ) Vol 3, No 3, August 2014 minimized. The interleaving topology divides the current stress in the semiconductor devices and the ripple in the supply current is also greatly minimized. [2] 64 Fig. 1.Bridgeless Interleaved SEPIC Converter With reference to Fig.1, when the supply voltage is positive, Q1/Q3 is switched on and current flows through L1-Q1-Q3-L3. During this period, energy is stored in L1 and L3. When Q1/Q3 is switched off, L1 and L3 releases its stored energy through C1 /C3, load and returns through the body diode of Q3 back to the input mains. The inductors connected to the Q1/Q3 leg on load side L5/L7 takes energy from the SEPIC capacitor C1 and C3 and the output capacitor supplies the load. During the negative half cycle, Q4/Q2 is turned on and current flows through L4 -Q4-Q2- L2, returning to the line; during this period, energy is stored in L4 and L2. When Q4/Q2 are turned off, L4 and L2 releases its stored energy and thus current flows through C2 /C4, load and returns through the body diode of Q2 back to the input mains. The inductors connected to the Q4/Q2 leg on load side takes energy from the SEPIC capacitor C2 and C4, and the output capacitor supplies the load. [3] 3 Current control strategies for Bridgeless Interleaved SEPIC Converter The power factor obtained in the open loop configuration of the converter can be enhanced by adopting current control techniques. By introducing the feedback and feed forward loops, lower harmonic profile can be maintained[4].The general control principle of the controller is that the supply current is forced to track a generated sinusoidal reference so that the converter draws a sinusoidal current; thereby power factor is improved. Generally two loops are implemented in the controller; to control the instantaneous input current to follow the same wave shape as the instantaneous input voltage, current feedback loop is implemented. The other loop is a voltage feedback loop which adjusts the input current so as to maintain a constant output voltage [5]. Many current control strategies have been reported in the literature. The following section highlights the implementation of peak current, average current and Non-Linear carrier control strategies for Bridgeless Interleaved SEPIC Converter. To operate the converter as a power factor corrector, we consider continuous conduction mode as the current stress and current ripple are minimum in this mode.
  • 3. Electrical and Electronics Engineering: An International Journal (ELELIJ) Vol 3, No 3, August 2014 65 3.1 Peak Current control Fig. 2.Peak Current control of Bridgeless Interleaved SEPIC Converter The working of peak current mode control (refer Fig.2) is as follows. In the outer voltage loop, Verror is generated by comparing the output voltage of the converter with a reference voltage. The voltage error and the input sinusoidal reference current are multiplied to generate a reference current in such a way such that it traces the peak of the inductor current. The upslope of inductor current is compared with this reference current .Whenever the inductor current crosses zero, switch is turned on and as it reaches the reference current, the flip-flop is reset and the switch is turned off. [5-8] 3.2 Average Current Control This technique allows a better input current waveform than the peak current control method as a Current error amplifier (CEA) is introduced in this technique. Average Current control technique (refer Fig.3) is a two loop control method; it has as an inner current control loop and an outer voltage control loop. This CEA output which is the difference between the average inductor current and the voltage error provided by the outer loop is then compared with a large amplitude ramp waveform with the converter switching frequency using Pulse Width Modulation (PWM) comparator. Thus, the average of inductor current is taken as the reference and the inductor current is forced to follow it. The switch is turned on whenever the inductor current reaches zero and switch is turned off when the inductor current falls below the reference. The voltage Error Amplifier forces the converter output voltage to track the voltage reference by controlling the average inductor current. [5-9].
  • 4. Electrical and Electronics Engineering: An International Journal (ELELIJ) Vol 3, No 3, August 2014 66 Fig 3.Average Current controlled Bridgeless Interleaved SEPIC Converter 3.3 Non-Linear Carrier Control In this technique, a negative ramp carrier waveform is generated .There are two ways of controlling the duty cycle through this method. One is by inductor current sensing and the other method is switch current sensing. The controller generates the pulses from the comparison of the negative ramp carrier waveform and the sensed inductor current signal as shown in Fig 4a or sensed switch current signal as shown in Fig 4b. (a) (b) Fig.4. Non-Linear Carrier Current control of Bridgeless Interleaved SEPIC Converter.(a)Inductor current sensing (b) Switch current sensing
  • 5. Electrical and Electronics Engineering: An International Journal (ELELIJ) Vol 3, No 3, August 2014 The sinusoidal switch current/Inductor current is sensed to compare with the nonlinear carrier waveform in each switching period to achieve the sinusoidal input current wave shape or high power factor condition. The distinguishing feature of this technique is that it eliminates multiplier, voltage sensor and current error amplifier circuits in the controller loop [9-10]. Thus this controller offers improved performance over the other schemes. 67 4 Simulation Results The simulation results of the current control strategies for Bridgeless Interleaved SEPIC converter are discussed in this section. In this work, the converter is designed with the simulation parameters as follows; =24V, 50Hz, Vo =48V, fsw=25 KHz Duty Cycle=59%, L1 L2 L3 L4 = 2.8mH, L5 L6 L7 L8=4.03mH, C1 C2 C3 C4=6.7μF and =3200μF. The performance of the converter is analyzed by computing parameters such as Total Harmonic Distortion (THD), Distortion factor Kd, Displacement factor K and power factor. The simulation results of the peak current control mode are shown in Fig.5.It is found that the THD in this mode is 5.38%.Thus the power factor is higher than the open loop configuration of the converter. 40 30 20 10 0 -10 -20 -30 -40 0.02 0.03 0.04 0.05 0.06 0.07 0.08 0.09 0.1 Time(sec) Supply Voltage(V) , Supply Current(A) (a) 100 90 80 70 60 50 40 30 20 10 0 0 0.01 0.02 0.03 0.04 0.05 0.06 0.07 0.08 0.09 0.1 Time(sec) Outp ut Vo ltage(V) (b) (c) Fig.5. Simulation results of Peak current control of Bridgeless Interleaved SEPIC converter. (a) Supply voltage and supply current (b) Output voltage (c) FFT Analysis of supply current The simulation results of the average current control mode are shown in Fig.6. From Fig.6b, it is observed that the THD is 4.20% and is lower than the peak current control. 40 30 20 10 0 -10 -20 -30 -40 0.02 0.03 0.04 0.05 0.06 0.07 0.08 0.09 0.1 Time(sec) Supply Voltage(V) , Supply Current(A) (a)
  • 6. Electrical and Electronics Engineering: An International Journal (ELELIJ) Vol 3, No 3, August 2014 68 0.02 0.03 0.04 0.05 0.06 0.07 0.08 0.09 0.1 100 90 80 70 60 50 40 30 20 10 0 Time(sec) O u tp u t V o lta ge (V ) (b) (c) Fig.6. Simulation results of Average current controlled Bridgeless Interleaved SEPIC Converter. (a) Supply voltage and supply current (b) Output voltage (c) FFT Analysis of supply current Fig.7 and Fig.8 shows the simulated results of the non-linear current mode by inductor current sensing and switch current sensing respectively. It is observed that the THD is very much improved than the previously discussed control techniques. 40 30 20 10 0 -10 -20 -30 -40 0.02 0.03 0.04 0.05 0.06 0.07 0.08 0.09 0.1 Time(sec) Supply Voltage(V) , Supply Current(A) (a) 100 90 80 70 60 50 40 30 20 10 0 0 0.01 0.02 0.03 0.04 0.05 0.06 0.07 0.08 0.09 0.1 Time(sec) O u t p u t V o lt a g e (V ) (b) (c) Fig.7.Simulation results of Non-Linear Carrier current control by Inductor current Sensing. (a) Supply voltage and supply current (b) Output voltage(c) FFT Analysis of supply current 40 30 20 10 0 -10 -20 -30 -40 0.02 0.03 0.04 0.05 0.06 0.07 0.08 0.09 0.1 Time(sec) Supply Voltage(V) , Supply Current(A) (a)
  • 7. Electrical and Electronics Engineering: An International Journal (ELELIJ) Vol 3, No 3, August 2014 69 100 90 80 70 60 50 40 30 20 10 0 0 0.01 0.02 0.03 0.04 0.05 0.06 0.07 0.08 0.09 0.1 Time(sec) O u t p u t V o l t a g e ( V o l t s ) (b) (c) Fig.8. Simulation results of Non-Linear Carrier current control by Switch current sensing. (a) Supply voltage and supply current (b) Output voltage(c) FFT Analysis of supply current Table.1 shows the comparison between the performance parameters of open loop and closed loop configuration of Bridgeless Interleaved SEPIC Converter. Table 1.Comparison of performance parameters of Bridgeless Interleaved SEPIC Converter Bridgeless Interleaved SEPIC Converter Topology THD (%) Kd K Power Factor Open Loop 6.26 0.9980 0.9903 0.9883 Peak Current 5.38 0.9986 0.9944 0.9929 Average Current 4.20 0.9991 0.9945 0.9936 Non-Linear carrier Current, Inductor current 3.90 0.9992 0.9956 0.9950 sensing Non-Linear carrier Current, Switch current sensing 3.42 0.9994 0.9963 0.9955 From Table 1, it is evident that the closed loop strategies enhance the power quality. Among the current control strategies, we find that the Non-Linear carrier control has power factor close to unity and thus considered more effective. 5 Conclusion In this paper, a novel Bridgeless Interleaved SEPIC Converter for power factor correction has been discussed and it is found that it has a better harmonic profile compared to other active PFC topologies. To improvise the supply current quality, the current control techniques like peak current, average current and Non-Linear carrier control techniques have been incorporated. The validity of the designed control strategies have been verified by MATLAB simulation. Simulation results shows that the closed loop strategies significantly increase the power quality and the supply current follows the supply voltage very closely. From the results, it is obvious that the Non-Linear carrier control has lower THD and high power factor and thus proves to be more suitable control strategy for power factor correction. Acknowledgement The authors wish to thank the SSN management for funding the proposed work. REFERENCES [1] Ye, Zhongming, Fred Greenfeld, and Zhixiang Liang. Single-stage offline SEPIC converter with power factor correction to drive high brightness LEDs. In Applied Power Electronics Conference and Exposition, 2009. APEC 2009. Twenty-Fourth Annual IEEE, pp. 546-553. IEEE, 2009.
  • 8. Electrical and Electronics Engineering: An International Journal (ELELIJ) Vol 3, No 3, August 2014 [2] de Seixas, Falcondes JM, and Priscila da S. Oliveira. Experimental evaluation of the bridgeless interleaved boost PFC converter. Industry Applications (INDUSCON), 2012 10th IEEE/IAS International Conference on. IEEE, 2012. [3] Musavi, Fariborz, Wilson Eberle, and William G. Dunford. A high-performance single-phase bridgeless interleaved PFC converter for plug-in hybrid electric vehicle battery chargers. Industry Applications, IEEE Transactions on 47.4 (2011): 1833-1843. [4] Seyezhai, R., Abhinaya Venkatesan, M. Ishwarya, and K. Gayathri. Analysis of Current Control Techniques on Bridgeless Interleaved Boost DC-DC Converter to Improve Power Quality. International Journal of Scientific Research in Computer Science and Engineering 1, no. 04 (2013): 44-49. [5] Lenine, D., Ch Sai Babu, and D. Jamal Reddy. Design and Analysis of Robust Current Control of 70 PFC Boost Rectifier. International Journal of Engineering 1, no. 6 (2012). [6] Rossetto. L., Spiazzi G., Tenti P., “Control techniques for power factor correction converters”, Power Electronics and Motion Control (PEMC), September, pp.1310-1318, 1994. [7] Karaarslan, A., and I. Iskender. The analysis of AC-DC boost PFC converter based on peak and hysteresis current control techniques. International Journal on Technical and Physical Problems of Engineering (IJTPE) 7: 100-105. [8] Purton, K. D., and R. P. Lisner. average current mode control in power electronic converters–analog versus digital. Electrical and Computer System Engineering, Monash University, Australia (2002). [9] Robert W. Erickson Dragon Maksimovic” Fundamentals of Power Electronics” Second Edition, 2001 Springer science and Business media [10] Tanitteerapan, T., and E. Thanpo. Negative Slope Ramp Carrier Control for High Power Factor Boost Converters in CCM Operation. World Academy of Science, Engineering and Technology 53 (2009): 1084-1089. [11] Kurkute, Sanjay L., Pradeep M. Patil, and Vinod H. Patil. A Comparative Study and Analysis of Power Factor Control Techniques. International Journal of Computer Science Emerging Technologies (E-ISSN: 2044-6004) Volume 1.