The document presents an overview of Linux-powered System-on-Chip (SoC) devices, detailing the architecture of Altera Cyclone V and the booting process of Linux on these devices. It highlights the development of NIC features, benchmarks, and various practical examples, including issues and challenges faced. Key advantages of using SoCs are discussed, alongside potential drawbacks such as limited driver support and thermal concerns.

1. STC Metrotek 2015 Pavel Kurochkin, Denis Gabidullin
SoC-powered Linux
Benefits of Linux-powered SoC-devices

2. STC Metrotek 2015 Pavel Kurochkin, Denis Gabidullin
Presentation plan
● Company profile
● SoC Altera Cyclone V Architecture
● Booting Linux: SPL, U-boot, kernel
● Developing NIC
● Benchmarks
● Troubles
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3. STC Metrotek 2015 Pavel Kurochkin, Denis Gabidullin
● 12 years of RnD experience
● Russia, Saint-Petersburg
● Development and production of measurement equipment
● Telecommunication channels verification: E1, Datacom, Ethernet
(10/100/GbE/10G/100G), fiber optics
● Network packet analysis and processing at line rate
● From idea to complete to “out of the box” solution
● Linux inside!
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STC Metrotek
STC Metrotek

4. STC Metrotek 2015 Pavel Kurochkin, Denis Gabidullin
System On Chip
one chip integrates many components
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5. STC Metrotek 2015 Pavel Kurochkin, Denis Gabidullin
SoC block diagram
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6. STC Metrotek 2015 Pavel Kurochkin, Denis Gabidullin
Altera SoC = HPS(CPU) + FPGA
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7. STC Metrotek 2015 Pavel Kurochkin, Denis Gabidullin
FPGA - Field Programmable Gate Array
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8. STC Metrotek 2015 Pavel Kurochkin, Denis Gabidullin
Why use SoC?
Old school Modern design
CPU FPGAI/F
bottleneck or
complex PCB
CPU FPGA
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9. STC Metrotek 2015 Pavel Kurochkin, Denis Gabidullin
SoC data flows
● Direct memory access
● Interconnect
● Dedicated HPS-FPGA interfaces
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10. STC Metrotek 2015 Pavel Kurochkin, Denis Gabidullin
CPU address space
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11. STC Metrotek 2015 Pavel Kurochkin, Denis Gabidullin
● Independent HPS and FPGA
● Boot sources: SD, QSPI, etc...
● Independent flexible configuration
(HPS or FPGA initiated)
● Dedicated memory for FPGA
registers
● High-speed interfaces
SoC architecture
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12. STC Metrotek 2015 Pavel Kurochkin, Denis Gabidullin
CPU boots first
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13. STC Metrotek 2015 Pavel Kurochkin, Denis Gabidullin
FPGA boots first
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14. STC Metrotek 2015 Pavel Kurochkin, Denis Gabidullin
HPS and FPGA boots independently
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15. STC Metrotek 2015 Pavel Kurochkin, Denis Gabidullin
Booting Linux
● preloader
● U-boot + environment
● device tree
● Linux kernel
● rootfs
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16. STC Metrotek 2015 Pavel Kurochkin, Denis Gabidullin
HPS Boot flow
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17. STC Metrotek 2015 Pavel Kurochkin, Denis Gabidullin
Preloader + U-boot
Preloader
● DDR initialization
● memtest
● basic synchronization clock
setup
U-boot
● access to peripheral
(SD/USB/Ethernet/i2c/etc..)
● filesystem support (fat/ext2)
● flexible boot configuration (boot
from TFTP, RAM, etc...)
● scripting, flexibility
● direct memory access
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18. STC Metrotek 2015 Pavel Kurochkin, Denis Gabidullin
Linux kernel
● github:altera-opensource/linux-socfpga
● v 3.18.0
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19. STC Metrotek 2015 Pavel Kurochkin, Denis Gabidullin
Device tree
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20. STC Metrotek 2015 Pavel Kurochkin, Denis Gabidullin
Booting FPGA
● Load fpga manager module
● Ensure that FPGA has been detected -- file /dev/fpga0 should exist
● Get proper FPGA firmware file -- firmware.rbf
● Load it to FPGA -- cat firmware.rbf > /dev/fpga0
● Ensure that it has been loaded -- cat /sys/class/fpga/fpga0/status
HPS and FPGA ready for data exchange!
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21. STC Metrotek 2015 Pavel Kurochkin, Denis Gabidullin
Moving to practical examples
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22. STC Metrotek 2015 Pavel Kurochkin, Denis Gabidullin
EthOnd development board
Features:
● SoC with 2 ARMv7 Cores and FPGA
● RAM 1GB
● SD-card slot
● 2 x GbE ports
● Shield interface
● USB OTG
● UART console
● Optional PoE
● RTC
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23. STC Metrotek 2015 Pavel Kurochkin, Denis Gabidullin
EthOnd block diagram
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24. STC Metrotek 2015 Pavel Kurochkin, Denis Gabidullin
NIC block diagram
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25. STC Metrotek 2015 Pavel Kurochkin, Denis Gabidullin
NIC Features
● 2 ports
● NAPI support
● frame sizes 64-1518
● DMA support
● 10/100/1000 Mbps, full duplex
● ethtool support (link speed, link
status)
● MDIO support
● low-level timestamping
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26. STC Metrotek 2015 Pavel Kurochkin, Denis Gabidullin
Packet timestamping
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27. STC Metrotek 2015 Pavel Kurochkin, Denis Gabidullin
NIC Benchmarks
● TCP iperf on 1500 bytes, TCP window size 85K -- 370 Mbit/s
● UDP for different frame sizes: 16 - 377 Mbit/s
● Delay via office switch - 3 us
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28. STC Metrotek 2015 Pavel Kurochkin, Denis Gabidullin
Troubles…
● Hardware MAC (stmmac) did not communicate with
FPGA
● Sometimes Qsys generates invalid interconnect
● DDR3: 66 MHz instead of 333 MHz
● i2c controller hangs up
● Linux v3.18 has issue with i2c interrupts
● U-boot does not support ULPI
● Linux 3.12 hangs up with pre-loaded FPGA
● fpga2sdram interface should be configured in U-
boot
● UART generates thousands of interrupts in 3.18
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29. STC Metrotek 2015 Pavel Kurochkin, Denis Gabidullin
● Single chip
● High-speed interconnect
● Linux kernel
● Flexibility
Pros and cons
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● CPU frequency cannot be changed
at run-time
● High chip temperature
● Drivers are still crude yet ;)

30. STC Metrotek 2015 Pavel Kurochkin, Denis Gabidullin
Thank you!
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