REPORT IBM (1)

Integrated Building Management
System (IBMS)
Project Report
Hamza Khan
7/23/2014
Ghulam Ishaq Khan Institute of Engineering Sciences and Technology
Integrating thediverse systemswithin yourbuilding is a vital element of energy efficiency and increased
productivity.

[Project IBMS] July23, 2014
2
Contents
Acknowledgement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Executive Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Abstract . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Project Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Project Goals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Benefits and Impacts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Objective . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Tools and Software Used . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Risks of control systems . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Microcontrollers UsedSummary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
JTAG . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
PLC Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Technical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
ADC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
DAC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Serial DB9 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
LAN RJ45 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
SPI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
FirmwareCodes Methodology . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Flow diagram/chart Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Optimized firmwarealgorithms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
ADC using SSI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
DAC using SSI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Ethernet HTTP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
UART . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

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Codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
ADC SSI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
DAC SSI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
UART SSI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Handy miscellaneous codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Timer interrupt with LED blinking CODE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .26
ADC (Analog to Digital Conversion) CODE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
SSI (SolidStateInterlocking) CODE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Suggestion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
References & Data Sheets . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31-32

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Acknowledgement
Firstly, I would like to thank Data Communication and Control, for providing me the opportunity
to carry out an internship. For me it was a unique experience to be involved in a professional
surrounding and to learn and study about Integrated Building Management Systems. The
knowledge and training will benefit me not only in my Final Year Project, but it will also prove to
be an asset for my future career.
Simply put, I could not have done this work without the lots of help I received cheerfully from
whole staff of DCC. The work culture in DCC is highly motivating, everybody is such a friendly
and cheerful companion here that work stress never comes in the way.
Furthermore, I want to thank all the office staff and interns, with whom I worked with. We
experienced great things and shared and gained a lot of knowledge and experience.
I would like to express immense gratification for the cooperation and guidance from Ms.
Yasmin, Mr. Rahul and Mr. Kamran as a result of which I was able to achieve my goals.

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Executive Summary
Modern buildings are becoming increasingly complex in response to pressures for improved
environmental, economic and social performance. In the push to deliver high-performance
buildings, Integrated Building management Systems are designed.
Integrated Building management Systems offer the following features:
• Create and maintain a functional and comfortable indoor environment, maintaining good
thermal comfort and indoor air quality.
• Minimize human manual intervention in daily operations.
• Automated monitoring and control through a single, manageable platform
• Allow systems and buildings to operate with discrete functional zones.
• Ensure that systems only operate when required.
• Ensure that systems operate safely and efficiently.
• Ensure that systems are integrated with the building and with each other.
• Provide feedback data for monitoring performance, benchmarking
• Lower life cycle costs
• Maximized energy and operational efficiency

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Abstract
The report presents the four tasks completed during summer internship at DCC
which are listed below:
1 . Learning the Basics of Stellaris and AVR microcontrollers, understanding their architectures
and working principles of the programming of their firmware.
2. Understanding the schematics of the IBMS PLC card.
3. Writing Firmware codes and testing them for the validity of outputs.
4. Debugging the PLC card for design and electronic issues.
Most these tasks have been completed successfully and results were according to
expectations. The card was divided into separate modules to make the task more object
oriented.
Each module was focused individually, thereby coding it first and then testing it for the correct
outputs.
Testing of the codes were done first on the LM3S6965 evaluation kit and later burned on the
PLC card’s respective microcontroller via JTAG for troubleshooting of the PLC card and validity
of output.

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Project Description
This project seeks to develop an open integration framework that allows multivendor systems to
interoperate seamlessly using internet protocols. The applicant will create an integrated control
platform for implementing new integrated control strategies and to enable additional enterprise
control applications, such as demand response. The project team seeks to develop several
strategies that take advantage of the sensors and functionality of heating, ventilation, and air
conditioning (HVAC); security; and information and communication technologies (ICT)
subsystems; and develop a platform and interfaceof rule-based, fault detection and diagnostic
(FDD) algorithms. A library of advanced ICT strategies with the highest energy savings potential
and greatest applicability will be developed. AutomatedFDD (Fault Detection and Diagnostics)
algorithms will be used to identify, monetize, and prioritize faults to help facility staff minimize
energy and maintenance costs.
Project Goals
The goals of this project include applying open integration middlewareto provide a significantly
greater level of integration and data transfer across building subsystems. The project attempts
to create a key enabling technology for achieving net-zero energy, high-performance buildings
over the next decade by enabling energy reducing control applications. At the completion of the
project, this system will be ready to be deployed commercially to an existing market channel,
ensuring job creation and preservation within the building controls industry.
Benefits and Impacts
Developing an IBMS that will transform traditional building control systems by intelligently
integrating disparate building systems could achieve a 10% – 30% increase in building energy
efficiency through integration and automated fault detection, enabling higher penetration of
renewable energy sources, and providing for more comfortable and productive buildings.

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Introduction
To build a complete stand-alone PLC (Programmable logic controller) card for building
automation, which will provide automatic control for various building components eliminating
the needs for independent hardware components.
The PLC card features the remote control ability for IPv4 (Internet Protocol version 4) enabled
devices (devices which communicate using Ethernet protocol) and also simpler appliances such
as elevator, pressure, temperature and parking control sensors.
Objective
To implement Ethernet control,Universal asynchronous receiver/transmitter capability, Analog to
Digital Conversion, Digital to Analogconversion,Joint Test Action Group (JTAG) testing capability
and Auto coupling, interfacing them via Stellar (LM3s6965) and AVR (ATXMEGA 128)
microcontrollers.
In addition, Real time simulation using Proteus (circuit simulation software) and debugging
using LM3s6965 evaluation kit is also mandatory.
Furthermore, the firmware codes must then be burned on the PLC card embedded
microcontrollers and should be thoroughly tested for performing basic functionality and valid
outputs.
Software and Tools Used:
IAR EmbeddedWorkbench : is the world-leading C/C++ compiler and debugger toolchain for
applications based on 8-, 16-, and 32-bit MCUs (microcontrolers). Outstanding speed
optimizations make IAR Embedded Workbench more powerful than ever and are ideal for
professional and learning issues.
The Stellaris® LM3S6965 Evaluation Board: is a compact and versatile evaluation platform for
the Stellaris LM3S6965 ARM® Cortex™-M3-based microcontroller. The evaluation kit uses the
LM3S6965 microcontroller’s fully integrated 10/100 Ethernet controller to demonstrate an
embedded web server. You can use the board either as an evaluation platform or as a low-cost
in-circuit debug interface (ICDI). In debug interface mode, the on-board microcontroller is
bypassed, allowing programming or debugging of an external target. The kit is also compatible
with high-performance external JTAGdebuggers.
Proteus (design software): is software for microprocessor simulation, schematiccapture, and
printed circuit board (PCB) design. It is developed by Labcenter Electronics

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Risks of Control Systems
There are also potential risks associated with implementing and operating building control
systems. If these risks can be identified early in the design/ procurement process many can be
mitigated.
Risk of improper scope – It is important to consider the consequences and impacts of early
design decisions. For instance, specifying very tight tolerances for indoor environmental
conditions may result in an unnecessarily complex or expensive control system that may not
have been required for more realistic temperature tolerances.
Risks of no or improper control – Just having a control system does not automatically mean that
the desired control is achieved. Controls must be functional and appropriate. The design and
intent of control systems can fail to transfer successfully through the installation phase.
Successfully implemented systems can fail due to improper operating or maintenance due to
lack of training. Control systems need to be regularly assessed for functionality and
performance.
Risk of inadequate commissioning – Commissioning is essential for control systems. The
potential for installation and start up errors for complex control systems is high. Systems that
are not fully and competently commissioned will not deliver the functionality that they were
designed to deliver. Commissioning addresses many of the risks associated with implementing
control systems, including design and installation defects which are detected early in the
delivery process. Commissioning also facilitates training and good system documentation and
knowledge transfer.
Controls systems and their components are also subject to drift over time. Systems need to be
recommissioned periodically and a formal recommissioning plan should be in place.
Risk of scale and complexity – Controls can be as simple as a switch or as complex as a fully
integrated building management and control system.
It is important that systems are kept as simple as possible to achieve the required goal. The scale
and complexity of the control system should be appropriateto the building and its operation.
Given the enormous range of capabilities of control systems, there is a possibility that systems
are designed to be more complex than their functionality requires. Complex systems are more
susceptible to errors and those errors tend to be more difficult to diagnose. Complex controls
may be difficult to operate and maintain and designers should aim to keep systems as simple as
possible.
Complex goals may not necessarily require complex systems. The simplest control system
availablethat meets the needs of the owner, operator, and occupant should generally be used.
Simple systems can be reliable and low cost.

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Microcontrollers Summary
Stellaris® LM3S6432 Microcontroller
The Stellaris® family of microcontrollers—the first ARM® Cortex™-M3 based controllers—
brings High-performance 32-bit computing to cost-sensitive embedded microcontroller
applications. These Pioneering parts deliver customers 32-bit performance at a cost equivalent
to legacy 8- and 16-bit Devices, all in a package with a small footprint.
The Stellaris family offers efficient performance and extensive integration, favorably positioning
the Device into cost-conscious applications requiring significant control-processing and
connectivitycapabilities. The Stellaris LM3S6000 series combines both a 10/100 Ethernet Media
Access Control(MAC) and Physical (PHY) layer, marking the first time that integrated connectivity
is availablewithan ARM Cortex-M3 MCU and the only integrated 10/100 Ethernet MAC and PHY
availablein anARM architecture MCU.
The LM3S6432 microcontroller is targeted for industrial applications, including remote
monitoring,electronicpoint-of-salemachines, test and measurement equipment, network
appliances andswitches, factory automation, HVAC and building control, gaming equipment,
motion control, medical instrumentation, and fire and security.
The ATmega128
The Atmel® AVR® core combines a rich instruction set with 32 general purpose working
registers.
All the 32 registers are directly connected to the Arithmetic Logic Unit (ALU), allowing two
independent registers to be accessed in one single instruction executed in one clock cycle.
Theresulting architecture is more code efficient while achieving throughputs up to ten times
fasterthan conventional CISC microcontrollers. The ATmega128provides the following features:
128Kbytes of In-System ProgrammableFlashwith Read-While-Write capabilities, 4Kbytes
EEPROM, 4Kbytes SRAM, 53 general purpose I/O lines, 32 general purpose working registers,
Real Time Counter (RTC), four flexible Timer/Counters with compare modes and PWM, 2
USARTs, a byte oriented Two-wire Serial Interface, an 8- channel, 10-bit ADC with optional
differential input stage with programmable gain, programmableWatchdog Timer with Internal
Oscillator, an SPI serial port, IEEE std. 1149.1 compliant JTAG test interface, also used for
accessing the On-chip Debug system and programming and six software selectable power
saving modes.

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Join Action Test Group (JTAG)
Joint Test Action Group (JTAG) is the common name for the IEEE 1149.1 StandardTest Access
Port and Boundary-Scan Architecture. It was initially devised by electronic engineers for testing
printed circuit boards using boundary scan and is still widely used for this application.
Today, JTAG is also widely used for IC debug ports. In the embedded processor market,
essentially all modern processors implement JTAG when they have enough pins. Embedded
systems development relies on debuggers communicating with chips with JTAG to perform
operations like single stepping and break pointing.
The connector pins are
1. TDI (Test Data In)
2. TDO (Test Data Out)
3. TCK (Test Clock)
4. TMS (Test Mode Select)
5. TRST (Test Reset) optional.

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PLC Card Block Diagram

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Technical Specification of PLC card
Technical specifications are broken into modules and each of the module is described in detail.
Following are the modules:
Analog to digitalconverter (ADC)
An analog-to-digital converter (ADC, A/D, or A to D) is a device that converts a continuous
physical quantity (usually voltage) to a digital number that represents the quantity's amplitude.
The conversion involves quantization of the input, so it necessarily introduces a small amount of
error. Instead of doing a single conversion, an ADC often performs the conversions ("samples"
the input) periodically. The result is a sequence of digital values that have been converted from
a continuous-time and continuous-amplitude analog signal to a discrete-time and discrete-
amplitude digital signal.
An ADC is defined by its bandwidth (the range of frequencies it can measure) and its signal to
noise ratio (how accurately it can measure a signal relative to the noise it introduces). The actual
bandwidth of an ADC is characterized primarily by its sampling rate, and to a lesser extent by
how it handles errors such as aliasing. The dynamic range of an ADC is influenced by many
factors, including the resolution (the number of output levels it can quantize a signal to),
linearity and accuracy (how well the quantization levels match the true analog signal) and jitter
(small timing errors that introduce additional noise). The dynamic range of an ADC is often
summarized in terms of its effective number of bits (ENOB), the number of bits of each measure
it returns that are on average not noise. An ideal ADC has an ENOB equal to its resolution. ADCs
are chosen to match the bandwidth and required signal to noise ratio of the signal to be
quantized. If an ADC operates at a sampling rate greater than twice the bandwidth of the signal,
then perfect reconstruction is possible given an ideal ADC and neglecting quantization error.
The presence of quantization error limits the dynamic range of even an ideal ADC, however, if
the dynamic range of the ADC exceeds that of the input signal, its effects may be neglected
resulting in an essentially perfect digital representation of the input signal.
An ADC may also provide an isolated measurement such as an electronic device that converts an
input analog voltage or current to a digital number proportional to the magnitude of the
voltage or current. However, some non-electronic or only partially electronicdevices, such as
rotary encoders, can also be considered ADCs. The digital output may use different coding
schemes. Typically the digital output will be a two's complement binary number that is
proportional to the input, but there are other possibilities. An encoder, for example, might
output a Gray code.

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Digitalto Analog Converter (DAC)
A digital-to-analogconverter (DAC, D/A, D2A or D-to-A) is a function that converts digital data
(usually binary) into an analog signal (current, voltage, or electric charge). An analog-to-digital
converter (ADC) performs the reverse function. Unlike analog signals, digital data can be
transmitted, manipulated, and stored without degradation, albeit with more complex
equipment. But a DAC is needed to convert the digital signal to analog to drive an earphone or
loudspeaker amplifier in order to produce sound (analog air pressure waves).
DACs and their inverse, ADCs, are part of an enabling technology that has contributed greatly to
the digital revolution. To illustrate, consider a typical long-distance telephone call. The caller's
voice is converted into an analog electrical signal by a microphone, then the analog signal is
converted to a digital stream by an ADC. The digital stream is then divided into packets where it
may be mixed with other digital data, not necessarily audio. The digital packets are then sent to
the destination, but each packet may take a completely different route and may not even arrive
at the destination in the correct time order. The digital voice data is then extracted from the
packets and assembled into a digital data stream. A DAC converts this into an analog electrical
signal, which drives an audio amplifier, which in turn drives a loudspeaker, which finally
produces sound.
There are several DAC architectures; the suitability of a DAC for a particular application is
determined by six main parameters: physical size, power consumption, resolution, speed,
accuracy, cost. Due to the complexity and the need for precisely matched components, all but
the most specialist DACs are implementedas integrated circuits (ICs). Digital-to-analog
conversion can degrade a signal, so a DAC should be specified that that has insignificant errors
in terms of the application.
DACs are commonly used in music players to convert digital data streams into analogaudio
signals. They are also used in televisions and mobile phones to convert digital video data into
analog video signals which connect to the screen drivers to display monochrome or color
images. These two applications use DACs at opposite ends of the speed/resolution trade-off.
The audio DAC is a low speed high resolution type while the video DAC is a high speed low to
medium resolution type. Discrete DACs would typically be extremely high speed low resolution
power hungry types, as used in military radar systems. Very high speed test equipment,
especially sampling oscilloscopes, may also use discrete DACS.

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SerialPort (DB9)
In computing, a serial port is a serial communication physical interfacethrough which
information transfers in or out one bit at a time (in contrast to a parallel port).Throughout most
of the history of personal computers, data was transferred through serial ports to devices such
as modems, terminals and various peripherals.
The term "DB9" refers to a common connector type, one of the D-Subminiature or D-Sub types
of connectors. DB9 has the smallest "footprint" of the D-Subminiature connectors, and houses 9
pins (for the male connector) or 9 holes (for the female connector).
DB9 connectors were once very common on PCs and servers. DB9 connectors are designed to
work with the EIA/TIA 232 serial interface standard, which determined the function of all nine
pins as a standard, so that multiple companies could design them into their products. DB9
connectors were commonly used for serial peripheral devices like keyboards, mice, joysticks, etc.
Also they are used on DB9 cable assemblies for data connectivity.
Today, the DB9 has mostly been replaced by more modern interfaces such as USB, PS/2,
Firewire, and others. However, there are still many legacy devices that use the DB9 interface for
serial communication.

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LAN RJ45
A local area network (LAN) is a computer network that interconnects computers within a limited
area such as a home, school, computer laboratory, or office building, using network media.[1]
The
defining characteristics of LANs, in contrast to wide area networks (WANs), include their smaller
geographic area, and non-inclusion of leased telecommunication line.
The RJ45 physical connector is standardised as the IEC 60603-7 8P8C modular connector with
different "categories" of performance, with all eight conductors present. A similar standard jack
once used for modem/data connections, the RJ45S, used a "keyed" variety of the 8P8C body
with an extra tab that prevents it mating with other connectors; the visual difference compared
to the more common 8P8C is subtle, but it is a different connector. The original RJ45S [6][7]
keyed
8P2C modular connector had pins 5 and 4 wired for tip and ring of a single telephone line and
pins 7 and 8 shorting a programming resistor, but is obsolete today.
Electronics catalogs commonly advertise 8P8C modular connectors as RJ45.[citation needed]
An
installer may wire the jack to any pin-out or use it as part of a generic structured cabling system
such as ISO/IEC 15018 or ISO/IEC 11801 using 8P8C patch panels for both phone and data.

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SPI
The Serial Peripheral Interface or SPI bus is a synchronous serial data link, a de facto standard,
named by Motorola, that operates in full duplex mode. It is used for short distance, single
master communication, for examplein embedded systems, sensors, and SD cards.
Devices communicate in master/slave mode where the master device initiates the data frame.
Multiple slave devices are allowedwith individual slave select lines. Sometimes SPI is called a
four-wire serial bus, contrasting with three-, two-, and one-wire serial buses. SPI is often referred
to as SSI (Synchronous Serial Interface).
The SPI bus specifies four logic signals:
 SCLK : Serial Clock (output from master).
 MOSI : Master Output, Slave Input
(output from master).
 MISO : Master Input, Slave Output
(output from slave).
 SS : Slave Select (active low, output from
master).
Alternative naming conventions are also widely
used, and SPI port pin names for particular IC
products may differ from those depicted in
these illustrations:
 SCLK : SCK, CLK.
 MOSI : SIMO, SDO, DO, DOUT, SI, MTSR.
 MISO : SOMI, SDI, DI, DIN, SO, MRST.
 SS :nCS, CS, CSB, CSN, nSS, STE, SYNC.
The MOSI/MISO convention requires that, on devices using the alternate names, SDI on the
master be connected to SDO on the slave, and vice versa. Chip select polarity is rarely active
high, although some notations (such as SS or CS instead of nSS or nCS) suggest otherwise. Slave
select is used instead of an addressing concept.

18
Firmware Codes Methodology
A structured approach is used to prepare the firmware code where algorithms are devised first
and flow diagrams are prepared to illustrate the procedures hence ,making sure to follow
correct logical order while coding and making troubleshooting easier in the case of unexpected
results and errors.
Furthermore the codes are well commented for the ease of troubleshooting, addition and
further development of the project.
Flow diagram/chart Introduction
The flow chart is a means to visually present the flow of data through an information processing
systems, the operations performed within the system and the sequence in which they are
performed. Flow diagrams decide what operations (and in what sequence) are required to solve
a given problem. The program flow chart can be likened to the blueprint of a building. As we
know a designer draws a blueprint before starting construction on a building. Similarly, a
programmer prefers to draw a flow chart prior to writing a computer program. As in the case of
the drawing of a blueprint, the flow chart is drawn according to defined rules and using
standard flowchart symbols prescribed by the American National Standard Institute, Inc
Optimizedfirmware algorithms
Algorithms are designed such that they use minimum instructions to perform a specific task,
maximizing performanceand reducing system load and lowering power consumption and
therefore helping in achieving lower operational temperature of the PLC card.

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Flow Diagrams for individual modules
ADC using SSI

20
DAC using SSI

21
EthernetHTTP

22
UART

23
CODES
ADC SSI
#include "inc/lm3s6965.h"
#include "inc/hw_ints.h"
#include "inc/hw_memmap.h"
#include "inc/hw_types.h"
#include "driverlib/adc.h"
#include "driverlib/gpio.h"
#include "driverlib/sysctl.h"
#include "inc/hw_nvic.h"
#include "driverlib/interrupt.h"
unsigned long ulADC0_Value;
voidADCIntHandler(void){
ADCIntClear(ADC0_BASE, 3);
ADCSequenceDataGet(ADC0_BASE, 3, &ulADC0_Value);
ADCProcessorTrigger(ADC0_BASE, 3);
}
void main()
{
unsigned long ulADC;
SysCtlClockSet(SYSCTL_SYSDIV_4 | SYSCTL_USE_PLL | SYSCTL_OSC_MAIN | SYSCTL_XTAL_8MHZ);
SysCtlPeripheralEnable(SYSCTL_PERIPH_ADC);
SysCtlADCSpeedSet(SYSCTL_ADCSPEED_250KSPS);
SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOE);
GPIOPinTypeADC(GPIO_PORTE_BASE, GPIO_PIN_7);
ADCSequenceConfigure(ADC0_BASE, 3, ADC_TRIGGER_PROCESSOR, 0);
ADCSequenceStepConfigure(ADC0_BASE, 3, 0, ADC_CTL_CH0| ADC_CTL_IE | ADC_CTL_END);
ADCSequenceEnable(ADC0_BASE, 3);
ADCIntClear(ADC0_BASE, 3);
ADCIntRegister(ADC0_BASE,3,ADCIntHandler);
ADCIntEnable(ADC0_BASE, 3);
IntEnable(INT_ADC0SS0);
IntMasterEnable();
ADCProcessorTrigger(ADC0_BASE, 3);
while(1){
ulADC = ulADC0_Value;
}}

24
DAC SSI
#include"inc/hw_memmap.h"
#include"inc/hw_ssi.h"
#include"inc/hw_types.h"
#include"driverlib/ssi.h"
#include"driverlib/gpio.h"
#include"driverlib/sysctl.h"
#define GPIO_PA2_SSI0CLK 0x00000802
#define GPIO_PA7_I2C1SDA 0x00001C02
#define GPIO_PA5_SSI0TX 0x00001402
#define NUM_SSI_DATA 2
voidSetup_SSI();
int main(void)
{
unsignedlongulDataTx[NUM_SSI_DATA];
unsignedlongulDataRx[NUM_SSI_DATA];
unsignedlongulindex;
Setup_SSI() {
while(1) {
ulDataTx[0] = 0x0000|ulDataRx[0]; // ControlRegistersetupfor the ADS1118
for(ulindex = 0; ulindex<NUM_SSI_DATA; ulindex++)
{SSIDataPut(SSI0_BASE, ulDataTx[ulindex]);
while(SSIBusy(SSI0_BASE)) {} }
while(SSIBusy(SSI0_BASE)) {}
{SSIDataGet(SSI0_BASE, &ulDataRx[ulindex])
while(SSIBusy(SSI0_BASE)){} }
SysCtlDelay(800000/1);
}}
voidSetup_SSI()
{
// Configures the systemclock,the LM3S6965 has a 8MHz crystal onboard
SysCtlClockSet(SYSCTL_SYSDIV_1 | SYSCTL_USE_OSC | SYSCTL_OSC_MAIN |
SYSCTL_XTAL_8MHZ);
SysCtlPeripheralEnable(SYSCTL_PERIPH_SSI0);
SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOA); GPIOPinConfigure(GPIO_PA2_SSI0CLK);
GPIOPinConfigure(GPIO_PA7_I2C1SDA);
GPIOPinConfigure(GPIO_PA5_SSI0TX);
GPIOPinTypeSSI(GPIO_PORTA_BASE,GPIO_PIN_5 | GPIO_PIN_4 | GPIO_PIN_0 |
GPIO_PIN_2);
SSIConfigSetExpClk(SSI0_BASE,SysCtlClockGet(), SSI_FRF_MOTO_MODE_1,
SSI_MODE_SLAVE, SysCtlClockGet()/8, 16);
SSIEnable(SSI0_BASE);
}

25
UART
*libraries excluded*
void
UARTIntHandler(void)
{
UARTIntDisable(UART0_BASE,UART_INT_RX);
unsignedlongulStatus;
ulStatus = UARTIntStatus(UART0_BASE,true);
UARTIntClear(UART0_BASE, ulStatus);
while(UARTCharsAvail(UART0_BASE) {
UARTCharPutNonBlocking(UART0_BASE,UARTCharGetNonBlocking(UART0_BASE)); }
UARTIntEnable(UART0_BASE,UART_INT_RX);
void UART2IntHandler(void)
{UARTIntDisable(UART2_BASE,UART_INT_RX);
unsignedlongulStatus2;
ulStatus2= UARTIntStatus(UART2_BASE,UART_INT_RX);
UARTIntClear(UART2_BASE, ulStatus2);
while(UARTCharsAvail(UART2_BASE))
{UARTCharPutNonBlocking(UART2_BASE,UARTCharGetNonBlocking(UART2_BASE));}
UARTIntEnable(UART2_BASE,UART_INT_RX);}
void
UARTSend(constunsigned char *pucBuffer, unsignedlongulCount)
{ while(ulCount--) {
UARTCharPutNonBlocking(UART0_BASE,*pucBuffer++); }}
void
UARTSend2(const unsignedchar*pucBuffer,unsignedlongulCount)
{ while(ulCount--) { }}
Intmain(void)
{SysCtlClockSet(SYSCTL_SYSDIV_1| SYSCTL_USE_OSC | SYSCTL_OSC_MAIN |
SYSCTL_XTAL_8MHZ);
SysCtlPeripheralEnable(SYSCTL_PERIPH_UART0);
SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOA);
SysCtlPeripheralEnable(SYSCTL_PERIPH_UART2);
SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOG);
IntMasterEnable();
GPIOPinTypeUART(GPIO_PORTG_BASE, GPIO_PIN_0 | GPIO_PIN_1);
GPIOPinTypeUART(GPIO_PORTG_BASE, GPIO_PIN_0 | GPIO_PIN_1);
UARTConfigSetExpClk(UART0_BASE,SysCtlClockGet(), 11520,(UART_CONFIG_WLEN_8 | UART_CONFIG_STOP_ONE
|UART_CONFIG_PAR_NONE));
UARTConfigSetExpClk(UART2_BASE,SysCtlClockGet(), 115200,(UART_CONFIG_WLEN_8 | UART_CONFIG_STOP_ONE|
UART_CONFIG_PAR_NONE));
IntEnable(INT_UART0);
UARTIntEnable(UART0_BASE,UART_INT_RX| UART_INT_RT);
IntEnable(INT_UART2);
UARTIntEnable(UART2_BASE,UART_INT_RX| UART_INT_RT);
UARTSend((unsigned char *)"Enter text: ", 12);
UARTSend2((unsignedchar*)"Entertext:", 12);
while(1)
{
}}

26
Handy Miscellaneous Firmware Codes
Timer interrupt with LED blinking CODE
#include"inc/hw_ints.h"
#include"driverlib/debug.h"
#include"driverlib/interrupt.h"
#include"driverlib/timer.h"
#include"lm3s6965.h"
int a;
void Timer0IntHandler(void)
{ if (a == 0) {
a = 1;
GPIO_PORTF_DATA_R= 1;
}
else{
a = 0;
GPIO_PORTF_DATA_R= 0;
} TimerIntClear(TIMER0_BASE,TIMER_TIMA_TIMEOUT); }
int main(void) { a = 0;
SYSCTL_XTAL_8MHZ);
SYSCTL_RCGC2_R= SYSCTL_RCGC2_GPIOF;
volatile unsignedlongulLoop;
//
// Turn on theLED.
//
ulLoop= SYSCTL_RCGC2_R;
GPIO_PORTF_DIR_R= 0x01;
GPIO_PORTF_DEN_R = 0x01;
SysCtlPeripheralEnable(SYSCTL_PERIPH_TIMER0);
TimerConfigure(TIMER0_BASE, TIMER_CFG_A_PERIODIC);
TimerLoadSet(TIMER0_BASE,TIMER_A,SysCtlClockGet()*2);
TimerIntRegister(TIMER0_BASE,TIMER_A,&Timer0IntHandler);
IntEnable(INT_TIMER0A);
TimerIntEnable(TIMER0_BASE,TIMER_TIMA_TIMEOUT);
TimerEnable(TIMER0_BASE, TIMER_A);
while(1){
}}

27
ADC (Analogto DigitalConversion) CODE
#include"inc/lm3s6965.h"
#include"inc/hw_ints.h"
#include"driverlib/adc.h"
#include"inc/hw_nvic.h"
#include"driverlib/interrupt.h"
unsignedlongulADC0_Value;
voidADCIntHandler(void){
ADCIntClear(ADC0_BASE,3);
ADCSequenceDataGet(ADC0_BASE,3, &ulADC0_Value);
ADCProcessorTrigger(ADC0_BASE,3);
}void main(){
unsignedlongulADC;
SysCtlClockSet(SYSCTL_SYSDIV_4 | SYSCTL_USE_PLL | SYSCTL_OSC_MAIN | SYSCTL_XTAL_8MHZ);
SysCtlPeripheralEnable(SYSCTL_PERIPH_ADC);
GPIOPinTypeADC(GPIO_PORTA_BASE,GPIO_PIN_0);
ADCSequenceConfigure(ADC0_BASE,3, ADC_TRIGGER_PROCESSOR,0);
ADCSequenceStepConfigure(ADC0_BASE,3, 0, ADC_CTL_CH0 | ADC_CTL_IE | ADC_CTL_END); ADCSequenceEnable(ADC0_BASE,3);
ADCIntClear(ADC0_BASE,3);
ADCIntRegister(ADC0_BASE,3,&ADCIntHandler);
ADCIntEnable(ADC0_BASE, 3);
IntEnable(INT_ADC0);
IntMasterEnable();
ADCProcessorTrigger(ADC0_BASE,3);
while(1){
ulADC = ulADC0_Value;
}
}

28
SSI (SolidState Interlocking) CODE
#include"inc/hw_ssi.h"
#include"driverlib/ssi.h"
intspi_master(void)
{
unsignedlongulDataTx[NUM_SSI_DATA];
unsignedlongulDataRx[NUM_SSI_DATA];
unsignedlongulindex;
SYSCTL_XTAL_16MHZ);
GPIOPinConfigure(GPIO_PA2_SSI0CLK);
GPIOPinConfigure(GPIO_PA3_SSI0FSS);
GPIOPinConfigure(GPIO_PA4_SSI0RX);
GPIOPinConfigure(GPIO_PA5_SSI0TX);
GPIOPinTypeSSI(GPIO_PORTA_BASE,GPIO_PIN_5 | GPIO_PIN_4 | GPIO_PIN_3 |
GPIO_PIN_2);
SSIConfigSetExpClk(SSI0_BASE,SysCtlClockGet(), SSI_FRF_MOTO_MODE_0,
SSI_MODE_MASTER, 1000000,8);
SSIEnable(SSI0_BASE);
while(SSIDataGetNonBlocking(SSI0_BASE, &ulDataRx[0]))
{
}
ulDataTx[0] = 's';
ulDataTx[1] = 'p';
ulDataTx[2] = 'i';
{
SSIDataPut(SSI0_BASE, ulDataTx[ulindex]);
}
while(SSIBusy(SSI0_BASE))
{
}
{
ulDataRx[ulindex] &= 0x00FF; }
return(0);}

29
Sugesstions
AD5726 can be implemented more efficiently using I2C bus reducing the load on SSI bus.
DAC I2C code for consideration of suggestion
#include"inc/lm3s6965.h"
#include"driverlib/debug.h"
#include"driverlib/systick.h"
#include"utils/ustdlib.h"
#include"driverlib/i2c.h"
#include"inc/hw_i2c.h"
void Setup_i2c_HW()
{
SysCtlPeripheralEnable(SYSCTL_PERIPH_SSI0);
GPIOPinTypeSSI(GPIO_PORTA_BASE,GPIO_PIN_5 | GPIO_PIN_7 | GPIO_PIN_2);
}
void i2c_write(void)
{
I2CMasterSlaveAddrSet(I2C0_MASTER_BASE,0x4C,false);
I2CMasterDataPut(I2C_MASTER_BASE,0x05);
I2CMasterControl(I2C0_MASTER_BASE, I2C_MASTER_CMD_BURST_SEND_START);
while (I2CMasterBusy(I2C0_MASTER_BASE));
I2CMasterDataPut(I2C_MASTER_BASE,0xFC);
I2CMasterControl(I2C0_MASTER_BASE, I2C_MASTER_CMD_BURST_SEND_CONT);
I2CMasterControl(I2C0_MASTER_BASE, I2C_MASTER_CMD_BURST_SEND_STOP);
}intmain(void) {
SysCtlClockSet(SYSCTL_SYSDIV_1 | SYSCTL_USE_OSC | SYSCTL_OSC_MAIN | SYSCTL_XTAL_8MHZ);
Setup_i2c_HW();
I2CMasterInitExpClk(I2C0_MASTER_BASE, SysCtlClockGet(), false);
while (1)
{
i2c_write();
for (ulLoop= 0; ulLoop< 50000; ulLoop++)
{}
}
}

30
Conclusion
The whole experience of working at DCC was great. This organization has a superb work culture,
great minds and very high quality of work. I learned a lot of about microcontrollers ,electronics
and building management systems. The work I could complete here was very satisfactory. I have
given my best efforts and I hope the work I have done will be used for further development of
the project. The results of my work are very encouraging and iam sure it would play a significant
role in finally upgrading the prototype card to the main final design.
I hope I have met the expectations of the project and fulfilledmy responsibility as the part of
this organization.

31
Data Sheets & References
LM3S6965Documents
 Datasheet :
http://www.ti.com/general/docs/lit/getliterature.tsp?genericPartNumber=lm3s6965&file
Type=pdf
 User’s Manual Guide:
http://www.ti.com/general/docs/lit/getliterature.tsp?literatureNumber=spmu029a&fileTy
pe=pdf
 Quick Start Guide:
http://www.ti.com/general/docs/lit/getliterature.tsp?literatureNumber=spmu057e&fileTy
pe=pdf
 Standalone Stellaris Driver Library Guide : http://www.ti.com/litv/pdf/spmu019n.pdf
ATXMEGA 128 Documents
 Atmel AVR XMEGA A Manual Preliminary Manual :
http://www.atmel.com/Images/doc8077.pdf
AD7327
 www.analog.com/static/imported-files/data_sheets/AD7327.pdf
AD5726
 www.analog.com/static/imported-files/data_sheets/AD5726.pdf
MAX 233
 ecee.colorado.edu/~mcclurel/max232ds.pdf
PC365N
 media.digikey.com/pdf/Data%20Sheets/.../PC365N%20Series.pdf
JLINK
 www.segger.com/jlink-debug-probes.html

32
 en.wikipedia.org/
 www.ti.com › Semiconductors › Microcontrollers (MCU)
 www.atmel.com/products/microcontrollers/
 www.iar.com/Products/IAR-Embedded-Workbench/
 www.atmel.com/microsite/atmel_studio6/
 forum.stellarisiti.com › Stellaris ARM Technical Forums
 simplearmprojects.wordpress.com/2013/08/18/02-uart-communication/
 dicks.home.xs4all.nl/avr/
 www.projectsbykec.com/projects/programming/atmel-avr
 coder-tronics.com/categories/stellaris/
 e2e.ti.com/support/microcontrollers/stellaris_arm/f/471/t/108101.aspx

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