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Reconfigurable Embedded Systems Applications
for Versatile Biomedical Measurements
NECST Group Conference @ Samsung Research America
09/06/2017
Luca Cerina <luca.cerina@polimi.it>
Marco D. Santambrogio <marco.santambrogio@polimi.it>
Politecnico di Milano
Progetto Cariplo MORPHONE 2016-1010: A Challenges
Driven Design for Effective and efficient Autonomic Mobile
Computing Architecture
2
Outline 2
•Context
•Proposed approach
•Related works
•Results
•Case studies
•Conclusions
3
A bit of history 3
4
A technological issue 4

Modular

Fault Tolerant

Powerful analysis

Connection oriented

Bulky

Energy hungry

High cost per device

Portable

Point-of-Care /
patient oriented

Low cost per device

Limited
analysis

Limited sources

Battery constrained

Limited connectivity
5
A planning issue 5
“The number of mobile clinical assets
is skyrocketing, along with associated
service costs, while utilization remains
below 50%. […] While 100% utilization
is impossible, we believe 70 to 80% is
a realistic, achievable target .” [1]
[1] Out of control - how clinical assets proliferation and low utilization are draining healthcare budgets,”
General Electric Healthcare, Tech. Rep., 2012.
6
Main contribution 6
The development of a device which is:

Low-power

Modular / upgradable

Versatile both on sensor sources and computational capabilities

Open to software defined networking

Power source agnostic
Exploiting FPGA-based, multi-processor System-On-Chip (MPSoC)
technologies
7
MPSoC technology 7
ARM Cortex core

OS and software
execution

High-level I/O
connectivity

High-level programming
(C++/Java/Python)
Xilinx Zynq-7 FPGA

Sensor low-level I/O

Reconfigurable efficient
hardware

High parallelismXilinx Zynq-7 Series MPSoC system
8
Related works 8
Reconfigurable EKG analog front-end [1]
Real-time EEG controlled stimulator [2]
1024 channel ultrasound beamformer [3]
[1] D. Morales, A. Garca, E. Castillo, M. Carvajal, J. Banqueri, and A. Palma, “Flexible ECG acquisition system based on
analog and digital reconfigurable devices,” Sensors and Actuators A: Physical, vol. 165, no. 2, 2011.
[2] A. Chemparathy, H. Kassiri, M. T. Salam, R. Boyce, F. Bekmambetova, A. Adamantidis, and R. Genov, “Wearable low-
latency sleep stage classifier,” in 2014 IEEE Biomedical Circuits and Systems Conference (BioCAS) Proceedings, Oct 2014
[3] F. Angiolini et al., "1024-Channel 3D ultrasound digital beamformer in a single 5W FPGA," Design, Automation & Test
in Europe Conference & Exhibition (DATE), 2017, Lausanne, 2017, pp. 1225-1228.
9
Proposed architecture 9
Xilinx MPSoC Pynq-Z1
Board (~220$)
Power supply
Management
Programming model
Software running
on ARM core
Soft-processors code
or hardware solutions
Sensors / Actuators
Different case studies are presented to represent the versatility of the system
10
Case study A: Remote EKG 10
ECG
Amplifier
HW filter
WiFi
data logging
Signal characteristics

Medium bandwidth (~250Hz for diagnostic
use)

1 to 12 acquisition channels

Complex analysis → information extracted

from morphology, interbeat intervals, and
electrodes’ location
11
Case study B: Pupil dilation 11
OpenCV
Videocapture
Histogram
equalizer
HW filter
OpenCV
Pupil contour
Python on ARM Core
FPGA
Characteristics

Ease of use with Python and
OpenCV

Application specific acceleration

Parallelism and low power

Fast implementation → 33 fps after
a 3 weeks development by bachelor
students
12
Case study C: Heterogenous signals 12
ECG
Amplifier
HW filter
GSR
Amplifier
Downsample
+
HW filter
Soft-core 2 (Running @ 8 MHz)
Soft-core 1 (Running @ 100 MHz)
Software running
on ARM core (@ 650 MHz)
Different hardware clock
regions enable soft parallelism
without increasing complexity
at software level
Galvanic Skin Response (GSR) tonic components are limited to 3-5Hz,
with lower requirements on the processing core
13
Case study D: Fog infrastructure 13
Humans become a fundamental piece in the sensor-actuation loop:
● Low latency Observe – Decide – Act systems → safety & emergency
● Collaborative environmental control → human thermal comfort
● Secure-by-design indoor localization → better building management
● Human-in-the-loop control → low cost retrofitting towards smart ambients
All enhanced by reconfigurable, low-power, multi-task Fog nodes
Conclusions 14
This work proposed a device prototype for versatile biomedical
measurements, demonstrating that FPGA-based systems are valid
for applications that require:

Low power consumption, comparable with existing commercial
devices

Multi-purpose capabilities (useful for Point-of-Care devices)

Extended connectivity

High performance and efficient HW parallelism

Modularity and low costs
QUESTIONS?
Reconfigurable Embedded Systems Applications
for Versatile Biomedical Measurements
Luca Cerina <luca.cerina@polimi.it>
Marco D. Santambrogio <marco.santambrogio@polimi.it>
Politecnico di Milano

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Reconfigurable Embedded Systems Applications for Versatile Biomedical Measurements

  • 1. Reconfigurable Embedded Systems Applications for Versatile Biomedical Measurements NECST Group Conference @ Samsung Research America 09/06/2017 Luca Cerina <luca.cerina@polimi.it> Marco D. Santambrogio <marco.santambrogio@polimi.it> Politecnico di Milano Progetto Cariplo MORPHONE 2016-1010: A Challenges Driven Design for Effective and efficient Autonomic Mobile Computing Architecture
  • 2. 2 Outline 2 •Context •Proposed approach •Related works •Results •Case studies •Conclusions
  • 3. 3 A bit of history 3
  • 4. 4 A technological issue 4  Modular  Fault Tolerant  Powerful analysis  Connection oriented  Bulky  Energy hungry  High cost per device  Portable  Point-of-Care / patient oriented  Low cost per device  Limited analysis  Limited sources  Battery constrained  Limited connectivity
  • 5. 5 A planning issue 5 “The number of mobile clinical assets is skyrocketing, along with associated service costs, while utilization remains below 50%. […] While 100% utilization is impossible, we believe 70 to 80% is a realistic, achievable target .” [1] [1] Out of control - how clinical assets proliferation and low utilization are draining healthcare budgets,” General Electric Healthcare, Tech. Rep., 2012.
  • 6. 6 Main contribution 6 The development of a device which is:  Low-power  Modular / upgradable  Versatile both on sensor sources and computational capabilities  Open to software defined networking  Power source agnostic Exploiting FPGA-based, multi-processor System-On-Chip (MPSoC) technologies
  • 7. 7 MPSoC technology 7 ARM Cortex core  OS and software execution  High-level I/O connectivity  High-level programming (C++/Java/Python) Xilinx Zynq-7 FPGA  Sensor low-level I/O  Reconfigurable efficient hardware  High parallelismXilinx Zynq-7 Series MPSoC system
  • 8. 8 Related works 8 Reconfigurable EKG analog front-end [1] Real-time EEG controlled stimulator [2] 1024 channel ultrasound beamformer [3] [1] D. Morales, A. Garca, E. Castillo, M. Carvajal, J. Banqueri, and A. Palma, “Flexible ECG acquisition system based on analog and digital reconfigurable devices,” Sensors and Actuators A: Physical, vol. 165, no. 2, 2011. [2] A. Chemparathy, H. Kassiri, M. T. Salam, R. Boyce, F. Bekmambetova, A. Adamantidis, and R. Genov, “Wearable low- latency sleep stage classifier,” in 2014 IEEE Biomedical Circuits and Systems Conference (BioCAS) Proceedings, Oct 2014 [3] F. Angiolini et al., "1024-Channel 3D ultrasound digital beamformer in a single 5W FPGA," Design, Automation & Test in Europe Conference & Exhibition (DATE), 2017, Lausanne, 2017, pp. 1225-1228.
  • 9. 9 Proposed architecture 9 Xilinx MPSoC Pynq-Z1 Board (~220$) Power supply Management Programming model Software running on ARM core Soft-processors code or hardware solutions Sensors / Actuators Different case studies are presented to represent the versatility of the system
  • 10. 10 Case study A: Remote EKG 10 ECG Amplifier HW filter WiFi data logging Signal characteristics  Medium bandwidth (~250Hz for diagnostic use)  1 to 12 acquisition channels  Complex analysis → information extracted  from morphology, interbeat intervals, and electrodes’ location
  • 11. 11 Case study B: Pupil dilation 11 OpenCV Videocapture Histogram equalizer HW filter OpenCV Pupil contour Python on ARM Core FPGA Characteristics  Ease of use with Python and OpenCV  Application specific acceleration  Parallelism and low power  Fast implementation → 33 fps after a 3 weeks development by bachelor students
  • 12. 12 Case study C: Heterogenous signals 12 ECG Amplifier HW filter GSR Amplifier Downsample + HW filter Soft-core 2 (Running @ 8 MHz) Soft-core 1 (Running @ 100 MHz) Software running on ARM core (@ 650 MHz) Different hardware clock regions enable soft parallelism without increasing complexity at software level Galvanic Skin Response (GSR) tonic components are limited to 3-5Hz, with lower requirements on the processing core
  • 13. 13 Case study D: Fog infrastructure 13 Humans become a fundamental piece in the sensor-actuation loop: ● Low latency Observe – Decide – Act systems → safety & emergency ● Collaborative environmental control → human thermal comfort ● Secure-by-design indoor localization → better building management ● Human-in-the-loop control → low cost retrofitting towards smart ambients All enhanced by reconfigurable, low-power, multi-task Fog nodes
  • 14. Conclusions 14 This work proposed a device prototype for versatile biomedical measurements, demonstrating that FPGA-based systems are valid for applications that require:  Low power consumption, comparable with existing commercial devices  Multi-purpose capabilities (useful for Point-of-Care devices)  Extended connectivity  High performance and efficient HW parallelism  Modularity and low costs
  • 15. QUESTIONS? Reconfigurable Embedded Systems Applications for Versatile Biomedical Measurements Luca Cerina <luca.cerina@polimi.it> Marco D. Santambrogio <marco.santambrogio@polimi.it> Politecnico di Milano