The document presents a detailed explanation of half and full adders in digital logic design. A half adder adds two input bits and produces sum and carry outputs, while a full adder adds three inputs, accounting for a carry input from a previous addition. Both digital circuits use specific logic gates, with designs including truth tables, K-maps, and Boolean expressions.

1. PRESENTATION FOR
DIGITAL AND LOGIC
DESIGN
PRESENTED BY:
HAFEEZA MUSTAFA

2. TOPPIC :
HALF ADDER
PRESENT
ED BY:
HAFEEZA
MUSTAFA

3. DEFINITION:
 It is a combinational logic circuit . It is also called two bits adder .

4. EXPLANATION:
We can design it by connecting one AND gate and one XOR gate . A half adder
circuit consist of two input terminal namely A and B both of these add two input
digits and generate the output . IN form of carry and other output sum .Thus
there are two outputs . The output that obtains from the XOR gate is sum of the
both bits numbers . The output obtained from AND gate is called carry .

6. Half adder designing:
 We can design half adder by using following steps .

8. TRUTH TABLE :

9. 2 VARIABLE K-MAP FOR SUM AND
CARRY:

10. BOLEAN EXPRESSION:

11. HALF ADDER DIAGRAM:
 BY using XOR expression.

12. TOPPIC :
FULL ADDER
PRESENT
ED BY:
HAFEEZA
MUSTAFA

13. Definition:
Full Adder is the adder which adds three inputs and produces two outputs. The
first two inputs are A and B and the third input is an input carry as C-IN. The
output carry is designated as C-OUT and the normal output is designated as S
which is SUM.

14. EXPLANATION:
 A full adder is a circuit that has two AND gates , two EX_OR gates , and one
OR gate. The full adder adds three binary digits. Among all the three , one is
the carry that we obtain from the previous addition as C_IN , and the two are
inputs A and B .

15. Full Adder Block:

16. K-Map For Sum:

17. K-Map For Carry:

19. Bolean Expression Equation Full Adder :

20. Deference Of Full Adder :

21. Application Of Half And Full Adder :