Praveen Kumar Nagineni is seeking a position in the semiconductor industry to utilize his 1 year of experience as a VLSI front end ASIC verification engineer. He has skills in Verilog, SystemVerilog, UVM methodology, C programming, and tools like Questasim and Modelsim. He has worked on verification projects for CPRI PCS protocol, 1G MAC, and 10G PCS, developing test cases, debugging failures, and implementing verification environments. He has a B.Tech in ECE and is proficient in English and Telugu.