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The P.IZ.Z.A Team presented their project to accelerate the Umap algorithm through FPGA implementation. They introduced themselves and their goal to speed up the already fast Umap algorithm. Their project aims to accelerate the central core of the NN_Descent algorithm through an FPGA implementation plus optimized Python layer. Their current work includes a fully functioning FPGA implementation of the nn_descent algorithm using custom data types and optimized conditional jumps. They also have an automated build process to generate C code from the original Python implementation to run on the FPGA.







