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BITS Pilani
Pilani Campus
Data Storage Technologies
& Networks
Dr. Virendra Singh Shekhawat
Department of Computer Science and Information Systems
BITS Pilani, Pilani Campus
Topics
• I/O Techniques
– Polling
– Interrupt driven
– DMA
2
BITS Pilani, Pilani Campus
I/O Techniques
• Polling:
– CPU check on the status of an I/O device by reading
a memory address which is associated with an I/O
device
– Pseudo-asynchronous
• Processor inspects (multiple) devices in rotation
– Cons
• Processor may still be forced to do useless work or wait or
both
– Pros
• CPU can determines how often it needs to poll
3
BITS Pilani, Pilani Campus
I/O Techniques
• Interrupts:
– Processor initiates I/O by requesting an operation
with the device.
– May disconnect if response can’t be immediate,
which is usually the case
– When device is ready with a response it interrupts
the processor.
• Processor finishes I/O with the device.
– Asynchronous but
• Data transfer between I/O device and memory still
requires processor to execute instructions.
4
BITS Pilani, Pilani Campus
I/O Techniques: Interrupts
5
BITS Pilani, Pilani Campus
I/O Techniques
• Direct Memory Access
– Processor initiates I/O
– DMA controller acts as an intermediary:
• interacts with the device,
• transfers data to/from memory as appropriate, and
• interrupts processor to signal completion.
– From the processor’s perspective DMA controller is
yet another device
• But one that works at semiconductor speeds
6
BITS Pilani, Pilani Campus
I/O Techniques
• I/O Processor
– More sophisticated version of DMA controller
with the ability to execute code: execute I/O
routines, interact with the O/S etc
7
BITS Pilani, Pilani Campus
Thank You!
8

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M2 231-io tech-rl_2.3.1

  • 1. BITS Pilani Pilani Campus Data Storage Technologies & Networks Dr. Virendra Singh Shekhawat Department of Computer Science and Information Systems
  • 2. BITS Pilani, Pilani Campus Topics • I/O Techniques – Polling – Interrupt driven – DMA 2
  • 3. BITS Pilani, Pilani Campus I/O Techniques • Polling: – CPU check on the status of an I/O device by reading a memory address which is associated with an I/O device – Pseudo-asynchronous • Processor inspects (multiple) devices in rotation – Cons • Processor may still be forced to do useless work or wait or both – Pros • CPU can determines how often it needs to poll 3
  • 4. BITS Pilani, Pilani Campus I/O Techniques • Interrupts: – Processor initiates I/O by requesting an operation with the device. – May disconnect if response can’t be immediate, which is usually the case – When device is ready with a response it interrupts the processor. • Processor finishes I/O with the device. – Asynchronous but • Data transfer between I/O device and memory still requires processor to execute instructions. 4
  • 5. BITS Pilani, Pilani Campus I/O Techniques: Interrupts 5
  • 6. BITS Pilani, Pilani Campus I/O Techniques • Direct Memory Access – Processor initiates I/O – DMA controller acts as an intermediary: • interacts with the device, • transfers data to/from memory as appropriate, and • interrupts processor to signal completion. – From the processor’s perspective DMA controller is yet another device • But one that works at semiconductor speeds 6
  • 7. BITS Pilani, Pilani Campus I/O Techniques • I/O Processor – More sophisticated version of DMA controller with the ability to execute code: execute I/O routines, interact with the O/S etc 7
  • 8. BITS Pilani, Pilani Campus Thank You! 8