The document provides an overview of computer architecture, emphasizing its role in designing hardware and software interfaces to meet specific requirements like performance and energy efficiency. It highlights the transformation levels from algorithms to microarchitectures, the implications of Moore's Law, and the differences between instruction set architecture (ISA) and microarchitecture. The course aims to equip students with foundational knowledge and hands-on experience in modern processor design and evaluation.

1. Computer Architecture
Fundamental Concepts and
ISA

2. What Will You Learn
4
 Computer Architecture: The science and art of
designing, selecting, and interconnecting hardware
components and designing the hardware/software
interface to create a computing system that meets
functional, performance, energy consumption, cost,
and other specific goals.
 Traditional definition: “The term architecture is used
here to describe the attributes of a system as seen by
the programmer, i.e., the conceptual structure and
functional behavior as distinct from the organization
of the dataflow and controls, the logic design, and the
physical implementation.” Gene Amdahl, IBM Journal
of R&D, April 1964

3. Computer Architecture in Levels of Transformation
 Read: Patt, “Requirements, Bottlenecks, and Good Fortune: Agents
for Microprocessor Evolution,” Proceedings of the IEEE 2001.
Problem
Algorithm
Program/
Language
Runtime
System (VM,
OS, MM)
ISA (Architecture)
Microarchitecture
Logic
Circuits
Electrons
5

4. Aside: What Is An
Algorithm?
6
 Step-by-step procedure where each step has
three properties:
 Definite (precisely defined)
 Effectively computable (by a computer)
 Terminates

5. Levels of Transformation, Revisited
Problem
Algorithm
Program/
Language
User
Runtime System
(VM, OS, MM)
ISA
Microarchitecture
Logic
Circuits
Electrons
 A user-centric view: computer designed for
users
 The entire stack should be optimized for
user 7

6. What Will You Learn?
8
 Fundamental principles and tradeoffs in designing
the hardware/software interface and major
components of a modern programmable
microprocessor
 Focus on state-of-the-art (and some recent research and
trends)
 Trade-offs and how to make them
 How to design, implement, and evaluate a functional
modern
processor
 Semester-long lab assignments
 A combination of RTL implementation and higher-level
simulation
 Focus is functionality first (then, on “how to do even better”)

7. Why Study
Computer
Architecture?
9

8. What is Computer
Architecture?
 The science and art of designing, selecting, and
interconnecting hardware components and designing
the hardware/software interface to create a
computing system that meets functional,
performance, energy consumption, cost, and other
specific goals.
 We will soon distinguish between the terms
architecture, and microarchitecture.
10

9. An Enabler: Moore’s
Law
11
Moore, “Cramming more components onto integrated
circuits,”
Electronics Magazine,
1965.
Component counts double every other
year
Image source:

10. 12
Number of transistors on an integrated circuit doubles ~ every two
years
Image source:

11. Moore’s Law (1 of
2)
13
 1965; Gordon Moore - co-founder of Intel Observed
number of transistors that could be put on a single chip
was doubling every year
 The pace slowed to a doubling every 18 months in the
1970’s but has sustained that rate ever since

12. Moore’s Law (2 of
2)
14
 Consequences of Moore’s law:
 The cost of computer logic and memory circuitry has
fallen at a dramatic rate
 The electrical path length is shortened,
increasing operating speed
 Computer becomes smaller and is more convenient to
use in a variety of environments
 Reduction in power and cooling requirements
 Fewer interchip connections

13. Why Study Computer
Architecture?
15
 Enable better systems: make computers faster, cheaper,
smaller, more reliable, …
 By exploiting advances and changes in underlying
technology/circuits
 Enable new applications
 Life-like 3D visualization 20 years ago?
 Virtual reality?
 Personalized genomics? Personalized medicine?
 Enable better solutions to problems
 Software innovation is built into trends and changes in computer
architecture
 > 50% performance improvement per year has enabled this
innovation

14. Computer Architecture Today (I)
16
 Today is a very exciting time to study computer
architecture
 Industry is in a large paradigm shift (to multi-core and
beyond) – many different potential system designs
possible
 Many difficult problems motivating and caused by the
shift
 Power/energy constraints  multi-core?
 Complexity of design  multi-core?
 Difficulties in technology scaling  new technologies?
 Memory wall/gap
 Reliability wall/issues
 Programmability wall/problem

15. Course Goals
17
 Goal 1:. To familiarize those interested in computer
system design with both fundamental operation
principles and design tradeoffs of processor, memory,
and platform architectures in today’s systems
 Strong emphasis on fundamentals, design tradeoffs,
key current/future issues
 Strong emphasis on looking backward, forward, up
and down
 Goal 2: To provide the necessary background and
experience to design, implement, and evaluate a modern
processor by performing hands-on RTL and C-level
implementation.
Register-Transfer Level (RTL)
Goal 3: Think critically (in solving problems), and

16. Fundamental Concepts
18

17. What is A
Computer?
 Three key
components
 Computation
 Communication
 Storage (memory)
19

18. What is A
Computer?
 We will cover all three
components
Memory
(program
and
data)
I/O
Processing
control
(sequencing)
20
datapath

19. The Von Neumann Model/Architecture
21
 Also called stored program computer (instructions
in memory). Two key properties:
 Stored program
 Instructions stored in a linear memory array
 Memory is unified between instructions and data
 The interpretation of a stored value depends on the
control
signals
 Sequential instruction processing
 One instruction processed (fetched, executed, and completed)
at a time
 Program Counter (instruction pointer) identifies the current
instr.
 Program counter is advanced sequentially except for control
transfer instructions
When is a value interpreted as an
instruction?

20. The Von Neumann Model (of a Computer)
CONTROL UNIT
IP Inst Register
PROCESSING UNIT
ALU TEMP
MEMORY
Mem Addr Reg
Mem Data Reg
INPUT OUTPUT
23

21. Von Neumann vs Dataflow
 Consider a Von Neumann program
 What is the significance of the program
order?
 What is the significance of the storage
locations?
v <= a + b;
w <= b * 2;
x <= v - w
y <= v + w
z <= x * y
+ *2
- +
a
25
b
*
Dataflow
z
 Which model is more natural to you as a
programmer?
Sequential

22. The Dataflow Model (of a
Computer)
26
 Von Neumann model: An instruction is fetched
and executed in control flow order
 As specified by the instruction pointer
 Sequential unless explicit control flow instruction
 Dataflow model: An instruction is fetched and
executed in data flow order
 i.e., when its operands are ready
 i.e., there is no instruction pointer
 Instruction ordering specified by data flow dependence
 Each instruction specifies “who” should receive the result
 An instruction can “fire” whenever all operands are
received
 Potentially many instructions can execute at the same
time

23. More on Data
Flow
 In a data flow machine, a program consists of data
flow nodes
 A data flow node fires (fetched and executed) when
all it inputs are ready
 i.e. when all inputs have tokens
 Data flow node and its ISA representation
27

24. Data Flow Nodes
28

25. An Example Data Flow
Program
OUT
29

26. ISA-level Tradeoff: Instruction Pointer
30
 Do we need an instruction pointer in the ISA?
 Yes: Control-driven, sequential execution
 An instruction is executed when the IP points to it
 IP automatically changes sequentially (except for control
flow instructions)
 No: Data-driven, parallel execution
 An instruction is executed when all its operand values are
available (data flow)
 Tradeoffs: MANY high-level ones
 Ease of programming (for average programmers)?
 Ease of compilation?
 Performance: Extraction of parallelism?
 Hardware complexity?

27. ISA vs. Microarchitecture Level
Tradeoff
31
 A similar tradeoff (control vs. data-driven execution) can
be made at the microarchitecture level
 ISA: Specifies how the programmer sees instructions
to be executed
 Programmer sees a sequential, control-flow execution
order vs.
 Programmer sees a data-flow execution order
 Microarchitecture: How the underlying
implementation actually executes instructions
 Microarchitecture can execute instructions in any order as
long as it obeys the semantics specified by the ISA when
making the instruction results visible to software
 Programmer should see the order specified by the ISA

28. The Von-Neumann Model
 All major instruction set architectures today use
this model
 x86, ARM, MIPS, SPARC, Alpha, POWER
 Underneath (at the microarchitecture level), the
execution model of almost all implementations (or,
microarchitectures) is very different
 Pipelined instruction execution: Intel 80486 uarch
 Multiple instructions at a time: Intel Pentium uarch
 Out-of-order execution: Intel Pentium Pro uarch
 Separate instruction and data caches
 But, what happens underneath that is not consistent
with the von Neumann model is not exposed to
software
 Difference between ISA and 32

29. What is Computer
Architecture?
33
 ISA+implementation definition: The science and art of
designing, selecting, and interconnecting hardware
components and designing the hardware/software
interface to create a computing system that meets
functional, performance, energy consumption, cost,
and other specific goals.
 Traditional (ISA-only) definition: “The term
architecture is used here to describe the attributes of a
system as seen by the programmer, i.e., the
conceptual structure and functional behavior as
distinct from the organization of the dataflow and
controls, the logic design, and the physical
implementation.” Gene Amdahl, IBM Journal of R&D,
April 1964

30. ISA vs.
Microarchitecture
34
 ISA
 Agreed upon interface between
software
and hardware
 SW/compiler assumes, HW promises
 What the software writer needs to
know to write and debug system/user
programs
 Microarchitecture
 Specific implementation of an ISA
 Not visible to the software
 Microprocessor
 ISA, uarch, circuits
Problem
Algorithm
Program
ISA
Microarchitectur
e
Circuits
Electrons

31. ISA vs.
Microarchitecture
35
 What is part of ISA vs. Uarch?
 Gas pedal: interface for “acceleration”
 Internals of the engine: implement “acceleration”
 Implementation (uarch) can be various as long
as it satisfies the specification (ISA)
 Add instruction vs. Adder implementation
 Bit serial, ripple carry, carry lookahead adders are all part
of microarchitecture
 x86 ISA has many implementations: 286, 386, 486,
Pentium,
Pentium Pro, Pentium 4, Core, …
 Microarchitecture usually changes faster than
ISA
 Few ISAs (x86, ARM, SPARC, MIPS, Alpha) but many

32. IS
A
 Instructions
 Opcodes, Addressing Modes, Data Types
 Instruction Types and Formats
 Registers, Condition Codes
 Memory
 Address space, Addressability, Alignment
 Virtual memory management
 Call, Interrupt/Exception Handling
 Access Control, Priority/Privilege
 I/O: memory-mapped vs. instr.
 Task/thread Management
 Power and Thermal Management
 Multi-threading support, Multiprocessor
support
36

33. Microarchitecture
37
 Implementation of the ISA under specific design
constraints and goals
 Anything done in hardware without exposure to
software
 Pipelining
 In-order versus out-of-order instruction execution
 Memory access scheduling policy
 Speculative execution
 Superscalar processing (multiple instruction issue?)
 Clock gating
 Caching? Levels, size, associativity, replacement policy
 Prefetching?
 Voltage/frequency scaling?
 Error correction?