The document outlines the organization and architecture of computers, focusing on the interconnection of various units such as memory, CPU, and input/output components. It discusses the types of buses used for communication, including data, address, and control buses, as well as the differences between dedicated and multiplexed buses. Additionally, it covers bus arbitration methods, emphasizing centralized versus distributed approaches.

1. William Stallings
Computer Organization
and Architecture
7th
Edition
Top Level View of Computer
Function and Interconnection

2. Connecting
• All the units must be connected
• Different type of connection for different
type of unit
—Memory
—Input/Output
—CPU

3. Computer Modules
‫يقولك‬ ‫ممكن‬
‫أرسمها‬

4. Memory Connection
• Receives and sends data
• Receives addresses (of locations)
• Receives control signals
—Read
—Write
—Timing

5. Input/Output Connection(1)
• Similar to memory from computer’s
viewpoint
• Output
—Receive data from computer
—Send data to peripheral
• Input
—Receive data from peripheral
—Send data to computer

6. Input/Output Connection(2)
• Receive control signals from computer
• Send control signals to peripherals
—e.g. spin disk
• Receive addresses from computer
—e.g. port number to identify peripheral
• Send interrupt signals (control)

7. CPU Connection
• Reads instruction and data
• Writes out data (after processing)
• Sends control signals to other units
• Receives interrupts

8. Buses
• There are a number of possible
interconnection systems
• Single and multiple BUS structures are
most common
• e.g. Control/Address/Data bus (PC)

9. What is a Bus?
• A communication pathway connecting two
or more devices
• Often grouped
—A number of channels in one bus
—e.g. 32 bit data bus is 32 separate single bit
channels
• Power lines may not be shown

10. Data Bus
• Data Bus is used for Carries(‫)نقل‬ data
(instruction)
—Remember that there is no difference between
“data” and “instruction” at this level
• Width is a key determinant of performance
—8, 16, 32, 64 bit

11. Address bus
• Identify the source or destination (‫)وجهة‬ of
data
• e.g. CPU needs to read an instruction
(data) from a given location in memory
• Bus width determines maximum memory
capacity of system
—e.g. 8080 has 16 bit address bus giving 64k
address space

12. Control Bus
• Carries Control and timing information
—Memory read/write signal
—Interrupt request
—Clock signals
What is the difference between an address bus, data
bus, and control bus? (‫امتحان‬ ‫)سؤال‬
• data bus is used for carries(‫)نقل‬ data (instruction) between system units
• Address bus Used to identify the source or destination (‫)وجهة‬ of data, This means it
carries the addresses of memory locations or I/O ports.
• control bus is used for carries Control and timing information

13. Bus Interconnection Scheme
• What do buses look like?
—Parallel lines on circuit boards
—Ribbon cables
—Strip connectors on mother boards
– e.g. PCI
—Sets of wires

15. Traditional (ISA)
(with cache)

16. High Performance Bus

17. Bus Types
• Dedicated
—Separate data & address lines
• Multiplexed
—Shared lines
—Address valid or data valid control line
—Advantage - fewer lines
—Disadvantages
– More complex control
– Ultimate performance
What is the difference between dedicated bus and
multiplexed bus? (‫امتحان‬ ‫)سؤال‬
Dedicated bus use separate address and data lines, while
multiplexed bus use shared lines for address and data.

18. Bus Arbitration
• More than one module controlling the bus
• e.g. CPU and DMA controller
• Only one module may control bus at one
time
• Arbitration may be centralised or
distributed

19. Centralised or Distributed Arbitration
• Centralised
—Single hardware device controlling bus access
– Bus Controller
– Arbiter
—May be part of CPU or separate
• Distributed
—Each module may claim ( /
‫تأخذ‬ ‫)تطالب‬ the bus
—Control logic on all modules
What is the difference between Centralised
Arbitration and Distributed Arbitration? (‫سؤال‬
‫)امتحان‬
In Centralised Arbitration is Single hardware device controlling
bus access, while in Distributed Arbitration Each module may
claim the bus and Each module has control logic.

20. Control Bus (Control Lines & Timing)
• Memory write: Causes data on the bus to be written into the
addressed location
• Memory read: Causes data from the addressed location to be
placed on the bus
• I/O write: Causes data on the bus to be output to the addressed
I/O port
• I/O read: Causes data from the addressed I/O port to be placed
on the bus
• Transfer ACK: Indicates that data have been accepted from or
placed on the bus
• Bus request: Indicates that a module needs to gain control of
the bus
• Bus grant: Indicates that a requesting module has been granted
control of the bus
• Interrupt request: Indicates that an interrupt is pending (‫قيد‬
‫)االنتظار‬
• Interrupt ACK: Acknowledges that the pending interrupt has
been recognized
• Clock: Is used to synchronize operations

21. Synchronous Timing Diagram

22. Asynchronous Timing – Read Diagram

23. Asynchronous Timing – Write Diagram

24. PCI Bus
• Peripheral Component Interconnection
• Intel released to public domain
• 32 or 64 bit
• 50 signal lines

25. • Typical Server System

26. PCI Bus (Pins) Lines (required)
• Systems lines
—Including clock and reset
• Address & Data
• Interface Control
• Arbitration
• Error lines
• Interrupt lines
• Cache support
• 64-bit Bus Extension