FPGAs can be programmed after manufacturing to implement custom logic functions. They contain programmable logic blocks and interconnects that can be configured to create custom circuits. FPGAs provide flexibility compared to ASICs but have higher per-unit costs. The FPGA architecture consists of configurable logic blocks, programmable interconnects, and I/O blocks. Configurable logic blocks contain LUTs that implement logic functions. Programmable interconnects connect the logic blocks, and I/O blocks interface with external components. FPGAs are commonly used for prototyping, emulation, parallel computing, and other applications that require customizable hardware.
The document discusses PIR sensors and how they work, explaining that PIR sensors can detect infrared radiation from warm bodies like humans and animals moving in their field of view, causing a change in voltage that signals motion. It also describes common applications of PIR sensors in security alarms, motion-activated lighting, and more. The key components of a PIR sensor are a pyroelectric sensor and fresnel lens that focus infrared signals onto the sensor to detect changes from motion.
The document provides information about the 8051 microcontroller. It discusses the internal architecture and features of the 8051 microcontroller. The 8051 has 4KB of ROM, 128 bytes of RAM, four I/O ports, two timers, interrupts and more built into a single chip. It also compares microprocessors and microcontrollers, explaining that microcontrollers have internal memory and I/O ports built-in, while microprocessors do not. Additionally, it outlines the memory organization of the 8051, including its internal and external memory layout.
The document discusses a 5T SRAM cell for embedded cache memory. It begins by explaining the basic operations of memory and different types of memory like RAM and ROM. It then discusses the structure and operation of a typical 6T SRAM cell. It introduces a 5T SRAM cell that aims to reduce leakage and increase density compared to 6T cells. The document outlines the read and write operations of the 5T cell and provides results of implementing the cell showing improvements in leakage and area. It concludes by discussing potential applications and areas for future work.
SOC Application Studies: Image CompressionA B Shinde
This document discusses application studies of AES encryption and JPEG image compression on SOC designs. It provides an overview of the AES algorithm and requirements, describing the encryption process. An initial SOC design for AES is proposed using an ARM7 processor, and performance is evaluated. JPEG compression is also summarized, outlining the color space transformation, discrete cosine transform, and entropy coding steps. Finally, an example JPEG system for a digital still camera is presented using a TMS320C54x processor to implement the imaging pipeline and compression.
This document discusses the architecture of the PIC16C6X microcontroller. It begins by describing PIC microcontrollers in general and the core features of the PIC16C6X. It then examines the different versions of the PIC16C6X family and provides a pin diagram. The main blocks of the PIC16C6X architecture are outlined, including the power-on reset, watchdog timer, I/O ports, ADC, interrupt control, USART, memory blocks, and registers. Program memory size varies between versions. The document concludes with references.
its only for learning purpose for beginners who wants to understand this protocol.
Life is all about learning, hope u will enjoy in this my PPT.
for any suggestion your always welcome .
FPGAs can be programmed after manufacturing to implement custom logic functions. They contain programmable logic blocks and interconnects that can be configured to create custom circuits. FPGAs provide flexibility compared to ASICs but have higher per-unit costs. The FPGA architecture consists of configurable logic blocks, programmable interconnects, and I/O blocks. Configurable logic blocks contain LUTs that implement logic functions. Programmable interconnects connect the logic blocks, and I/O blocks interface with external components. FPGAs are commonly used for prototyping, emulation, parallel computing, and other applications that require customizable hardware.
The document discusses PIR sensors and how they work, explaining that PIR sensors can detect infrared radiation from warm bodies like humans and animals moving in their field of view, causing a change in voltage that signals motion. It also describes common applications of PIR sensors in security alarms, motion-activated lighting, and more. The key components of a PIR sensor are a pyroelectric sensor and fresnel lens that focus infrared signals onto the sensor to detect changes from motion.
The document provides information about the 8051 microcontroller. It discusses the internal architecture and features of the 8051 microcontroller. The 8051 has 4KB of ROM, 128 bytes of RAM, four I/O ports, two timers, interrupts and more built into a single chip. It also compares microprocessors and microcontrollers, explaining that microcontrollers have internal memory and I/O ports built-in, while microprocessors do not. Additionally, it outlines the memory organization of the 8051, including its internal and external memory layout.
The document discusses a 5T SRAM cell for embedded cache memory. It begins by explaining the basic operations of memory and different types of memory like RAM and ROM. It then discusses the structure and operation of a typical 6T SRAM cell. It introduces a 5T SRAM cell that aims to reduce leakage and increase density compared to 6T cells. The document outlines the read and write operations of the 5T cell and provides results of implementing the cell showing improvements in leakage and area. It concludes by discussing potential applications and areas for future work.
SOC Application Studies: Image CompressionA B Shinde
This document discusses application studies of AES encryption and JPEG image compression on SOC designs. It provides an overview of the AES algorithm and requirements, describing the encryption process. An initial SOC design for AES is proposed using an ARM7 processor, and performance is evaluated. JPEG compression is also summarized, outlining the color space transformation, discrete cosine transform, and entropy coding steps. Finally, an example JPEG system for a digital still camera is presented using a TMS320C54x processor to implement the imaging pipeline and compression.
This document discusses the architecture of the PIC16C6X microcontroller. It begins by describing PIC microcontrollers in general and the core features of the PIC16C6X. It then examines the different versions of the PIC16C6X family and provides a pin diagram. The main blocks of the PIC16C6X architecture are outlined, including the power-on reset, watchdog timer, I/O ports, ADC, interrupt control, USART, memory blocks, and registers. Program memory size varies between versions. The document concludes with references.
its only for learning purpose for beginners who wants to understand this protocol.
Life is all about learning, hope u will enjoy in this my PPT.
for any suggestion your always welcome .
The document introduces dual-port RAM (DPRAM), which is a single static RAM array that can be accessed by two sets of address, data, and control signals simultaneously. This increases bandwidth and offers shorter development times than alternatives. DPRAM uses an 8-transistor cell compared to 6 for regular SRAM, allowing two independent ports to read and write at the same time using different clocks. Applications include cellular base stations, routers, and video conferencing where high-speed concurrent access is needed.
This document discusses smart transmitters, which are microprocessor-based transmitters that can be programmed and communicate digitally. It describes how smart transmitters offer advantages like improved accuracy and the ability to access data remotely compared to conventional transmitters. The document then provides details on the HART communication protocol that smart transmitters use to transmit process variables and additional data digitally over the same wires as the 4-20 mA analog signal. It also discusses calibrating smart transmitters, noting that calibration is still important for accuracy even though smart transmitters have digital communication.
This document provides an introduction to temperature control and closed-loop control systems. It describes the basic components of a control loop including controllers, sensors, control devices and the process being controlled. It explains common sensor types like thermocouples and RTDs. It also covers controller outputs, tuning processes, alarm types and typical temperature control applications.
The document discusses the Serial Peripheral Interface (SPI) protocol. It describes SPI as a serial communication protocol that uses a master-slave architecture with 4 wires. The document outlines the basic components and functionality of SPI including its bus wiring, signal functions, data transfer process using shift registers, and the 4 clocking modes. It also discusses the pros and cons of SPI and provides examples of common applications.
This document discusses ARM Cortex-M microcontrollers and their features. It provides information on ARM architecture and RISC processors. Specific Cortex-M models are described including their instruction sets, pipelines, registers and memory architecture. STM32 microcontrollers are mentioned. General purpose input/output and how to configure pins for different functions like GPIO, analog or alternate functions are explained. Examples of working with registers to read button states and toggle LEDs are provided. The concept of bit banding memory is also introduced.
This document provides information on smartphone hardware architecture. It discusses key components such as the application and connectivity processor chips, memory, wireless capabilities, batteries, and sensors. Specific smartphones are also summarized, including the Apple iPhone 5S which uses the A7 64-bit processor and Touch ID fingerprint sensor, and the Samsung Galaxy S4 which employs the Exynos 5 Octa chip with ARM's big.LITTLE architecture. Diagrams depict the internal layout and connectivity of components in these devices.
The document discusses FPGA design flow and programming. It describes the roles of the systems architect who defines high-level requirements and provides a golden model and test vectors. The FPGA designer is responsible for delivering a firmware that approximates the golden model on a hardware platform using vendor tools. The design flow includes simulation, synthesis, placement and routing, and testing at different stages to verify functionality and timing.
This presentation gives an overview of FPGA devices. An FPGA is a device that contains a matrix of re-configurable gate array logic circuitry. When a FPGA is configured, the internal circuitry is connected in a way that creates a hardware implementation of the software application.
FPGA devices can deliver the performance and reliability of dedicated hardware circuitry.
The document discusses an agenda covering field-programmable logic devices (FPLDs) including complex programmable logic devices (CPLDs). It provides an overview of CPLD architecture, describing them as composed of multiple simpler programmable logic devices (SPLDs) like PALs interconnected on a single chip. It also discusses CPLD vendors and families, noting they provide devices with differing numbers of logic blocks and I/O pins depending on the intended application.
The document discusses sequential logic circuits and finite state machines. It covers topics like combinational vs sequential logic, what defines a finite state machine, state transition diagrams, equivalent state partitioning for minimization, and applications like computer memory and delay elements. Examples are provided of a sequential circuit and its state table, as well as the process of state minimization.
The document provides an overview of the STM32 MCU family from STMicroelectronics. It discusses the key features such as an ARM Cortex-M3 core, Flash memory up to 512KB, SRAM up to 64KB, low power modes, timers, and communication peripherals. It also outlines the applications for industrial equipment, appliances, low power devices, and consumer electronics. Finally, it gives a high-level description of the system architecture and various peripherals including DMA, ADC, DAC, communication interfaces, and watchdogs.
All the concepts of 8051 Micro controller have been explained in detail. Also some information on Embedded Systems. The Presentation deals with Processors & Microcontrollers from first generation to the present generation. This presentation an invaluable compendium of knowledge to the individuals trying to explore the field of electronics. Moreover, a complete coverage for Mumbai University students have been made available.
The document outlines various topics related to biomedical instrumentation including biometrics, physiological systems of the human body like cardiovascular and respiratory systems, the kidney, bioelectric potentials, biopotential electrodes, and transducers for ECG, EEG, and EMG. It also provides details on the characteristics of biomedical instrumentation systems and describes concepts like bioelectric potential, action potential, and the recording setup for ECG, EEG, and EMG.
STM32 timers can generate pulse-width modulation (PWM) signals and are used for time-based control in embedded systems. The STM32 has 11 timers including 2 advanced timers, 4 universal timers, and 2 basic timers. Universal timers like TIM2-TIM5 can count up, down, or up and down and can generate PWM signals with the frequency set by the auto-reload register and duty cycle set by the capture/compare register. Timers are useful for applications like traffic lights, power meters, and pacemakers that require time-based control.
One of the key benefits of JTAG is that it provides access to the internal circuitry of a device without the need for additional hardware such as a test probe or emulator. This is possible because JTAG uses a series of test access ports (TAPs) that are built into a device's boundary-scan architecture.
This document provides an introduction to the Motorola 68HC11 microcontroller. It begins by defining key terms related to computers, microprocessors, and microcontrollers. It explains that a computer consists of a processor, memory, and input/output components. A microprocessor is a processor contained on a single integrated circuit, while a microcontroller adds memory and input/output capabilities. The Motorola 68HC11 is an 8-bit microcontroller that contains CPU, RAM, ROM, timers, analog/digital converters, and communication interfaces on a single chip. It finds applications in devices like appliances, automobiles, printers, and more. The document discusses memory technologies like SRAM and DRAM that are used in microcontrollers.
This document discusses interrupts in the Atmega328P microcontroller. It describes asynchronous I/O operation using interrupts versus polling. Interrupts allow the microcontroller to perform other tasks while waiting for an I/O device to signal that it is ready. When an interrupt occurs, the microcontroller saves its state and jumps to an interrupt service routine to handle the device, then returns to its original task. The Atmega328P has multiple interrupt vectors that can be enabled or disabled individually using various register bits to control interrupts from different pins and peripherals. Example C code is provided to configure an interrupt-driven program from the INT0 pin.
This document outlines the key phases of the electronics product design process: concept development, requirements gathering, specifications development, design and prototyping, testing, manufacturing, and disposal. It emphasizes that product development follows a systematic engineering approach involving thorough documentation at each phase, from initially defining customer needs to ensuring reliable, high-quality products that meet specifications. The goal is to deliver the best product at the lowest cost and time to market.
Project report on embedded system using 8051 microcontrollerVandna Sambyal
The document describes a home security prototype project that was developed using an 8051 microcontroller to control various devices like LEDs, DC motors, relays and sensors. It provides details on the circuit diagram and working of the home security system, which uses components like a microcontroller, motion sensor, door sensor and siren to detect intrusion and alert users. The document also includes information on microcontrollers, their architecture, programming and how to interface them with external devices.
The document introduces dual-port RAM (DPRAM), which is a single static RAM array that can be accessed by two sets of address, data, and control signals simultaneously. This increases bandwidth and offers shorter development times than alternatives. DPRAM uses an 8-transistor cell compared to 6 for regular SRAM, allowing two independent ports to read and write at the same time using different clocks. Applications include cellular base stations, routers, and video conferencing where high-speed concurrent access is needed.
This document discusses smart transmitters, which are microprocessor-based transmitters that can be programmed and communicate digitally. It describes how smart transmitters offer advantages like improved accuracy and the ability to access data remotely compared to conventional transmitters. The document then provides details on the HART communication protocol that smart transmitters use to transmit process variables and additional data digitally over the same wires as the 4-20 mA analog signal. It also discusses calibrating smart transmitters, noting that calibration is still important for accuracy even though smart transmitters have digital communication.
This document provides an introduction to temperature control and closed-loop control systems. It describes the basic components of a control loop including controllers, sensors, control devices and the process being controlled. It explains common sensor types like thermocouples and RTDs. It also covers controller outputs, tuning processes, alarm types and typical temperature control applications.
The document discusses the Serial Peripheral Interface (SPI) protocol. It describes SPI as a serial communication protocol that uses a master-slave architecture with 4 wires. The document outlines the basic components and functionality of SPI including its bus wiring, signal functions, data transfer process using shift registers, and the 4 clocking modes. It also discusses the pros and cons of SPI and provides examples of common applications.
This document discusses ARM Cortex-M microcontrollers and their features. It provides information on ARM architecture and RISC processors. Specific Cortex-M models are described including their instruction sets, pipelines, registers and memory architecture. STM32 microcontrollers are mentioned. General purpose input/output and how to configure pins for different functions like GPIO, analog or alternate functions are explained. Examples of working with registers to read button states and toggle LEDs are provided. The concept of bit banding memory is also introduced.
This document provides information on smartphone hardware architecture. It discusses key components such as the application and connectivity processor chips, memory, wireless capabilities, batteries, and sensors. Specific smartphones are also summarized, including the Apple iPhone 5S which uses the A7 64-bit processor and Touch ID fingerprint sensor, and the Samsung Galaxy S4 which employs the Exynos 5 Octa chip with ARM's big.LITTLE architecture. Diagrams depict the internal layout and connectivity of components in these devices.
The document discusses FPGA design flow and programming. It describes the roles of the systems architect who defines high-level requirements and provides a golden model and test vectors. The FPGA designer is responsible for delivering a firmware that approximates the golden model on a hardware platform using vendor tools. The design flow includes simulation, synthesis, placement and routing, and testing at different stages to verify functionality and timing.
This presentation gives an overview of FPGA devices. An FPGA is a device that contains a matrix of re-configurable gate array logic circuitry. When a FPGA is configured, the internal circuitry is connected in a way that creates a hardware implementation of the software application.
FPGA devices can deliver the performance and reliability of dedicated hardware circuitry.
The document discusses an agenda covering field-programmable logic devices (FPLDs) including complex programmable logic devices (CPLDs). It provides an overview of CPLD architecture, describing them as composed of multiple simpler programmable logic devices (SPLDs) like PALs interconnected on a single chip. It also discusses CPLD vendors and families, noting they provide devices with differing numbers of logic blocks and I/O pins depending on the intended application.
The document discusses sequential logic circuits and finite state machines. It covers topics like combinational vs sequential logic, what defines a finite state machine, state transition diagrams, equivalent state partitioning for minimization, and applications like computer memory and delay elements. Examples are provided of a sequential circuit and its state table, as well as the process of state minimization.
The document provides an overview of the STM32 MCU family from STMicroelectronics. It discusses the key features such as an ARM Cortex-M3 core, Flash memory up to 512KB, SRAM up to 64KB, low power modes, timers, and communication peripherals. It also outlines the applications for industrial equipment, appliances, low power devices, and consumer electronics. Finally, it gives a high-level description of the system architecture and various peripherals including DMA, ADC, DAC, communication interfaces, and watchdogs.
All the concepts of 8051 Micro controller have been explained in detail. Also some information on Embedded Systems. The Presentation deals with Processors & Microcontrollers from first generation to the present generation. This presentation an invaluable compendium of knowledge to the individuals trying to explore the field of electronics. Moreover, a complete coverage for Mumbai University students have been made available.
The document outlines various topics related to biomedical instrumentation including biometrics, physiological systems of the human body like cardiovascular and respiratory systems, the kidney, bioelectric potentials, biopotential electrodes, and transducers for ECG, EEG, and EMG. It also provides details on the characteristics of biomedical instrumentation systems and describes concepts like bioelectric potential, action potential, and the recording setup for ECG, EEG, and EMG.
STM32 timers can generate pulse-width modulation (PWM) signals and are used for time-based control in embedded systems. The STM32 has 11 timers including 2 advanced timers, 4 universal timers, and 2 basic timers. Universal timers like TIM2-TIM5 can count up, down, or up and down and can generate PWM signals with the frequency set by the auto-reload register and duty cycle set by the capture/compare register. Timers are useful for applications like traffic lights, power meters, and pacemakers that require time-based control.
One of the key benefits of JTAG is that it provides access to the internal circuitry of a device without the need for additional hardware such as a test probe or emulator. This is possible because JTAG uses a series of test access ports (TAPs) that are built into a device's boundary-scan architecture.
This document provides an introduction to the Motorola 68HC11 microcontroller. It begins by defining key terms related to computers, microprocessors, and microcontrollers. It explains that a computer consists of a processor, memory, and input/output components. A microprocessor is a processor contained on a single integrated circuit, while a microcontroller adds memory and input/output capabilities. The Motorola 68HC11 is an 8-bit microcontroller that contains CPU, RAM, ROM, timers, analog/digital converters, and communication interfaces on a single chip. It finds applications in devices like appliances, automobiles, printers, and more. The document discusses memory technologies like SRAM and DRAM that are used in microcontrollers.
This document discusses interrupts in the Atmega328P microcontroller. It describes asynchronous I/O operation using interrupts versus polling. Interrupts allow the microcontroller to perform other tasks while waiting for an I/O device to signal that it is ready. When an interrupt occurs, the microcontroller saves its state and jumps to an interrupt service routine to handle the device, then returns to its original task. The Atmega328P has multiple interrupt vectors that can be enabled or disabled individually using various register bits to control interrupts from different pins and peripherals. Example C code is provided to configure an interrupt-driven program from the INT0 pin.
This document outlines the key phases of the electronics product design process: concept development, requirements gathering, specifications development, design and prototyping, testing, manufacturing, and disposal. It emphasizes that product development follows a systematic engineering approach involving thorough documentation at each phase, from initially defining customer needs to ensuring reliable, high-quality products that meet specifications. The goal is to deliver the best product at the lowest cost and time to market.
Project report on embedded system using 8051 microcontrollerVandna Sambyal
The document describes a home security prototype project that was developed using an 8051 microcontroller to control various devices like LEDs, DC motors, relays and sensors. It provides details on the circuit diagram and working of the home security system, which uses components like a microcontroller, motion sensor, door sensor and siren to detect intrusion and alert users. The document also includes information on microcontrollers, their architecture, programming and how to interface them with external devices.
3. 1. İnformasiyanın kodlanması məsələləri
2. Mobil rabitə sistemlərində maneədavamlı
kodlamanın reallaşdırılması
3. GSM standartında kodlama prinsipləri
3
4. İnformasiya m nb yinin kodlanması- Rabit kanalları v yaxud yaddaşə ə ə ə
resurslarına q na t edilm si m qs dil informasiyanin mümkün ola bil c kə ə ə ə ə ə ə ə
q d r maksimal sıxlaşdırılmasından ibar tdir;ə ə ə
Kanalın kodlanması- rabit kanalı il ötürüldükd n sonra s hvl ri aşkarlamağaə ə ə ə ə
v düz ltm y imkan ver n kod lifbasının genişl ndirilm siə ə ə ə ə ə ə ə
m liyyatıdır.Bel kodlama umümi halda mane y davamlı kimi adlandırılırə ə ə ə ə
v korrektl yici kodlarla h yata keçirilir. Ş b k texnologiyalarinda kanalə ə ə ə ə ə
kodlanması kimi tanınır Asinxron iş rejimində işləyir;
Rabit x ttinin kodlanması- m lumatın rabit x tti il asinxron v sinxronə ə ə ə ə ə ə
ötürülm si zamanı, etibarlı sinxronlaşdırma v minimum t hrifl r almaqə ə ə ə
imkanı t min edir.ə
Kriptoqrafik kodlama- informasiyanın saxlanılması və ötürülməsi prosesində ona
icazəsiz (sanksiyasız) daxilolmanın qarşısını almaq üçün verilənlərin məxfiləşdirilməsi
məqsədilə istifadə olunur.
4
5. Mobil rabitənin apparatca reallaşmasında siqnalın rəqəmli işlənməsi əsas rol oynayır. Rəqəmli
işlənmə şanşəkilli rabitənin birinci nəslindən ikinci nəslinə keçməsinə, sistemin həcminin
genişlənməsinə və onun keyfiyyərinin yaxşılaşmasına imkan vermişdir.Siqnalların rəqəmli işlənməsi
zamanı aşağıdakı proseslər nəzərdə tutulur.
- Siqnalların analoq –rəqəm çevrilməsi
- Nitq kodlaması
- Kanal kodlaması
- Modulyasiya
Nitq siqnallarının gücünün spektri tezliyin 400 Hs-ə uyğun qiymətlərində maksimal olur və
daha yüksək tezliklərdə oktavada 9 dB-ə yaxın sürətlə azalır;
Beynəlxalq Telefon və Teleqraf Konsultativ Komitəsinin məsləhətinə uyğun olaraq nitq
siqnallarının rəqəmli verilişində tezlik zolağı 300-3400 Hs arasında məhdudlaşır;
Nitq siqnalının səslərinin müddəti, sait səslər üçün 210 ms (milli saniyə), samit səslər üçün isə 95 ms
olur;
Nitq kodlanmasında əsas funksiya nitq koderi tərəfindən görülür. Koderin əsas vəzifəsi rəqəmli
siqnalları sıxlaşdıraraq nitq siqnallarının mümkün qədər aradan qaldırılmasıdır;
Nitq kodlanması iki üsulla aparılır: siqnal formasının kodlanması (waveform coding) və siqnalın
mənbəyinin kodlanması (source coding);
GSM standartında nitq kodekinin sadələşdirilmiş blok-sxemi növbəti səhifədə verilmişdir.
5
MMobil rabitə sistemlərində maneədavamlı kodlamanınobil rabitə sistemlərində maneədavamlı kodlamanın
reallaşdırılmasıreallaşdırılması
6. İlkin
emaletmə
Qısa müddətli xəbərvermə
süzgəcinin parametrlərinin
qiymətləndirilməsi
Qısa müddətli
xəbərvermə
süzgəc
analizatoru
Uzunmüddətli xəbərvermə
süzgəcinin parametrlərinin
qiymətləndirilməsi
Uzunmüddətli
xəbərvermə
süzgəc
analizatoru
Həyəcanlanma siqnalının
parametrlərinin
qiymətləndirilməsi
Süzgəc
postu
Qısa müddətli
xəbərvermə
süzgəc sintezatoru
Uzunmüddətli
xəbərvermə
süzgəc sintezatoru
Həyəcanlanma siqnalının
formalaşması
Koder
Dekoder
7. Kanal koderi nitq koderindən sonra yerləşir və informasiyanı daşıyıcı tezliyə köçürən
modulyatordan əvvəl olur;
Kanal koderinin əsas rolu nitq siqnalının maneədavamlı kodlamasıdır, bu da siqnalın vericidən
qəbulediciyə şüalanma prosesində baş verən səhvlərin aşkar edilməsi və onların mühüm dərəcədə
düzəldilməsi üçündür;
Maneədavamlı kodlama verilən siqnalın tərkibinə böyük həcmli artıqlama informasiyasının
əlavəsi ilə əldə edilir. İngiliscə belə kodlama Forward Error Correcting coding (FEC coding)
adlanır, yəni səhvləri əvvəlcədən korreksiya edən kodlama. Mobil rabitədə Maneəyədavamlı
kodlama üç əməliyyat şəklində yerinə yetirilir. Bloklu kodlama (block coding), bükülən kodlama
(convolution coding) və növbələnən kodlama (interleaving coding).
Kanal koderi informasiyanı artırır, verilişə hazırlanan informasiyanı dəstələyir və zamanca sıxır;
7
İdarəedici
informasiya
(məntiq bloku)
Nitq
informasiyası
Bloklu və
bükülən kodlama
Nitq informasiyası və
idarəedici informasiyanın
qablaşma və birləşməsi
Boklu və bükülən
kodlama
Şifrləmə Növbələmə
Zamanca
sıxılma
Modulyatora
8. 8
Modulyasiya verici traktın son elementidir, və siqnalın rəqəmli işləməsində heç bir əməliyyat
yerinə yetirmir ;
Modulyasiya siqnalın kanal koderinin çıxışındakı rəqəmli informasiyanı daşıyıcı tezliyə
köçürməkdir;
Modulyasiya edilmiş siqnal modulyatorun çıxışından anten kommutatoru vasitəsilə antenaya
daxil edilir və efirə şüalandırılır. Bu prosesi modulyator heyata keçirir. Əks prosesi isə
demodulyator icra edir;
Demodulyatorun funksiyası qəbul edilmiş siqnaldan informasiya olan siqnalı ayırmaqdır;
Modulyasiyanın 3 növü var: Amplitude Modulation-AM (Amplitud modulyasiyası (AM)),
Frequency Modulation – FM (Tezlik Modulyasiyası), Phase Modulation- PM (Faza
Modulyasiyası;
Mobil rabitə şəbəkələrində Quadrature Phase Shift Keying –QPSK , Minimum Shift Keying –
MSK istifadə edilir;
9. 9
GSM standartı üçün bir neçə modulyasiya növləri vardır;
MSK, QPSK , BPSK və GMSK mövcud növlərdir;
Soldakı qrafik MSK, QPSK and BPSK-nın spektrini göstərir
Sağdakı qrafik isə müxtəlif tip QPSK mulyasiyası növünü əks etdirir
