This document summarizes a research paper that proposes a microcontroller-based cryptosystem using the Tiny Encryption Algorithm (TEA) combined with a Key Generation Unit (KGU). The KGU uses timers in the microcontroller to generate random bits for encryption keys. The cryptosystem can operate in serial or wireless transmission modes. Performance analysis shows the cryptosystem has improved throughput and decreased execution time compared to TEA alone. Randomness testing of the generated keys indicates distinct random bits. In conclusion, the system provides moderate security and simplicity for applications requiring secured data transfer with low cost and memory constraints.
This document summarizes an FPGA implementation of a trained neural network. It describes implementing a 3-2-1 multilayer perceptron network on an FPGA for a fault identification application. The key modules implemented include multiply-accumulate, truncation, sigmoid and linear activation functions. Resource utilization is low, with the entire integrated network using only 2.2% of FPGA slices. Simulation results match manual calculations, demonstrating the network accurately classifies faults.
A novel secure combination technique of steganography and cryptographyZac Darcy
A new technique proposed with the combination of cryptography and steganography enhanced with new
secure feature for generating a new security system. Cryptography and Steganography are two popular
ways for secure data transmission in which the former distorts a message so it cannot be understood and
another hides a message so it cannot be seen. In cryptography, this system is used advanced encryption
standard (AES) algorithm to encrypt secret message and then these are separated keys; one of which is
used to hide in cover image. In steganography, a part of encrypted message as a key is used to hide in
discrete cosine transform (DCT) of an image which is highly secured. This kind of system is to be
introduced in applications such as transferring secret data that can be authentication of various fields.
Biomedical image transmission based on Modified feistal algorithmijcsit
This document presents a high-performance hardware implementation of a biomedical image encryption system using a modified Feistal algorithm. The encryption algorithm is based on DES with a novel key scheduling technique. The encrypted images are unintelligible but have high clarity when decrypted. The system is implemented on an FPGA and achieves an encryption rate of 35.5 Gbit/s. It uses different keys each clock cycle, making the encrypted images very difficult to break.
11.secure compressed image transmission using self organizing feature mapsAlexander Decker
This document summarizes a research paper that proposes a method for secure compressed image transmission using self-organizing feature maps. The method involves compressing images using SOFM-based vector quantization, entropy coding the results, and encrypting the compressed data using a scrambler before transmission. Simulation results show the method achieves a compression ratio of up to 38:1 while providing security, outperforming JPEG compression by up to 1 dB. The paper presents the technical details and evaluation of the proposed secure image transmission system.
Review: “Implementation of Feedforward and Feedback Neural Network for Signal...IJERA Editor
Main focus of project is on implementation of Neural Network Architecture (NNA) with on chip learning on
Analog VLSI Technology for signal processing application. In the proposed paper the analog components like
Gilbert Cell Multiplier (GCM), Neuron Activation Function (NAF) are used to implement artificial NNA.
Analog components used comprises of multiplier, adder and tan sigmoidal function circuit using MOS transistor.
This Neural Architecture is trained using Back Propagation (BP) Algorithm in analog domain with new
techniques of weight storage. Layout design and verification of above design is carried out using VLSI Backend
Microwind 3.1 software Tool. The technology used to design layout is 32 nm CMOS Technology.
Secure Image Transmission for Cloud Storage System Using Hybrid SchemeIJERD Editor
- Data over the cloud is transferred or transmitted between servers and users. Privacy of that
data is very important as it belongs to personal information. If data get hacked by the hacker, can be
used to defame a person’s social data. Sometimes delay are held during data transmission. i.e. Mobile
communication, bandwidth is low. Hence compression algorithms are proposed for fast and efficient
transmission, encryption is used for security purposes and blurring is used by providing additional
layers of security. These algorithms are hybridized for having a robust and efficient security and
transmission over cloud storage system.
International Journal of Engineering Research and Applications (IJERA) is an open access online peer reviewed international journal that publishes research and review articles in the fields of Computer Science, Neural Networks, Electrical Engineering, Software Engineering, Information Technology, Mechanical Engineering, Chemical Engineering, Plastic Engineering, Food Technology, Textile Engineering, Nano Technology & science, Power Electronics, Electronics & Communication Engineering, Computational mathematics, Image processing, Civil Engineering, Structural Engineering, Environmental Engineering, VLSI Testing & Low Power VLSI Design etc.
IJCER (www.ijceronline.com) International Journal of computational Engineerin...ijceronline
The document summarizes a research paper that proposes a new symmetric block cipher algorithm similar to AES but with a 200-bit block size instead of 128 bits. It compares the power consumption and strict avalanche criteria of the proposed algorithm to other AES standards. The power consumption during encryption is up to 30% lower but decryption is 20% higher. The strict avalanche criteria shows the proposed algorithm meets security levels of AES. The algorithm is described in detail including key schedule, byte substitution, shift row, mix column, and add round key transformations.
This document summarizes an FPGA implementation of a trained neural network. It describes implementing a 3-2-1 multilayer perceptron network on an FPGA for a fault identification application. The key modules implemented include multiply-accumulate, truncation, sigmoid and linear activation functions. Resource utilization is low, with the entire integrated network using only 2.2% of FPGA slices. Simulation results match manual calculations, demonstrating the network accurately classifies faults.
A novel secure combination technique of steganography and cryptographyZac Darcy
A new technique proposed with the combination of cryptography and steganography enhanced with new
secure feature for generating a new security system. Cryptography and Steganography are two popular
ways for secure data transmission in which the former distorts a message so it cannot be understood and
another hides a message so it cannot be seen. In cryptography, this system is used advanced encryption
standard (AES) algorithm to encrypt secret message and then these are separated keys; one of which is
used to hide in cover image. In steganography, a part of encrypted message as a key is used to hide in
discrete cosine transform (DCT) of an image which is highly secured. This kind of system is to be
introduced in applications such as transferring secret data that can be authentication of various fields.
Biomedical image transmission based on Modified feistal algorithmijcsit
This document presents a high-performance hardware implementation of a biomedical image encryption system using a modified Feistal algorithm. The encryption algorithm is based on DES with a novel key scheduling technique. The encrypted images are unintelligible but have high clarity when decrypted. The system is implemented on an FPGA and achieves an encryption rate of 35.5 Gbit/s. It uses different keys each clock cycle, making the encrypted images very difficult to break.
11.secure compressed image transmission using self organizing feature mapsAlexander Decker
This document summarizes a research paper that proposes a method for secure compressed image transmission using self-organizing feature maps. The method involves compressing images using SOFM-based vector quantization, entropy coding the results, and encrypting the compressed data using a scrambler before transmission. Simulation results show the method achieves a compression ratio of up to 38:1 while providing security, outperforming JPEG compression by up to 1 dB. The paper presents the technical details and evaluation of the proposed secure image transmission system.
Review: “Implementation of Feedforward and Feedback Neural Network for Signal...IJERA Editor
Main focus of project is on implementation of Neural Network Architecture (NNA) with on chip learning on
Analog VLSI Technology for signal processing application. In the proposed paper the analog components like
Gilbert Cell Multiplier (GCM), Neuron Activation Function (NAF) are used to implement artificial NNA.
Analog components used comprises of multiplier, adder and tan sigmoidal function circuit using MOS transistor.
This Neural Architecture is trained using Back Propagation (BP) Algorithm in analog domain with new
techniques of weight storage. Layout design and verification of above design is carried out using VLSI Backend
Microwind 3.1 software Tool. The technology used to design layout is 32 nm CMOS Technology.
Secure Image Transmission for Cloud Storage System Using Hybrid SchemeIJERD Editor
- Data over the cloud is transferred or transmitted between servers and users. Privacy of that
data is very important as it belongs to personal information. If data get hacked by the hacker, can be
used to defame a person’s social data. Sometimes delay are held during data transmission. i.e. Mobile
communication, bandwidth is low. Hence compression algorithms are proposed for fast and efficient
transmission, encryption is used for security purposes and blurring is used by providing additional
layers of security. These algorithms are hybridized for having a robust and efficient security and
transmission over cloud storage system.
International Journal of Engineering Research and Applications (IJERA) is an open access online peer reviewed international journal that publishes research and review articles in the fields of Computer Science, Neural Networks, Electrical Engineering, Software Engineering, Information Technology, Mechanical Engineering, Chemical Engineering, Plastic Engineering, Food Technology, Textile Engineering, Nano Technology & science, Power Electronics, Electronics & Communication Engineering, Computational mathematics, Image processing, Civil Engineering, Structural Engineering, Environmental Engineering, VLSI Testing & Low Power VLSI Design etc.
IJCER (www.ijceronline.com) International Journal of computational Engineerin...ijceronline
The document summarizes a research paper that proposes a new symmetric block cipher algorithm similar to AES but with a 200-bit block size instead of 128 bits. It compares the power consumption and strict avalanche criteria of the proposed algorithm to other AES standards. The power consumption during encryption is up to 30% lower but decryption is 20% higher. The strict avalanche criteria shows the proposed algorithm meets security levels of AES. The algorithm is described in detail including key schedule, byte substitution, shift row, mix column, and add round key transformations.
This document proposes an efficient and secure cryptography technique using unimodular matrices. It aims to improve data security during transmission by encrypting messages. The proposed method encrypts data into a matrix form using ASCII values, then multiplies it by an encoding matrix generated from an Armstrong number. At the receiver end, the cipher text matrix is decrypted by multiplying it by the inverse of the encoding matrix. This overcomes limitations of previous techniques by allowing any length messages and not relying on Armstrong numbers containing zeros. The method ensures confidentiality, access control and non-repudiation through the use of encryption and decryption with the same secret key.
Digital Implementation of Artificial Neural Network for Function Approximatio...IOSR Journals
: The soft computing algorithms are being nowadays used for various multi input multi output
complicated non linear control applications. This paper presented the development and implementation of back
propagation of multilayer perceptron architecture developed in FPGA using VHDL. The usage of the FPGA
(Field Programmable Gate Array) for neural network implementation provides flexibility in programmable
systems. For the neural network based instrument prototype in real time application. The conventional specific
VLSI neural chip design suffers the limitation in time and cost. With low precision artificial neural network
design, FPGA have higher speed and smaller size for real time application than the VLSI design. The
challenges are finding an architecture that minimizes the hardware cost, maximizing the performance,
accuracy. The goal of this work is to realize the hardware implementation of neural network using FPGA.
Digital system architecture is presented using Very High Speed Integrated Circuits Hardware Description
Language (VHDL)and is implemented in FPGA chip. MATLAB ANN programming and tools are used for
training the ANN. The trained weights are stored in different RAM, and is implemented in FPGA. The design
was tested on a FPGA demo board
Fast and Secure Transmission of Image by using Byte Rotation Algorithm in Net...IRJET Journal
This document proposes a new secure image transmission method using byte rotation algorithm that improves encryption speed and security. The key steps are:
1. The input image is divided into four blocks which are shuffled using byte rotation.
2. A cover image is used to embed the shuffled secret image blocks for transmission.
3. At the receiver, byte rotation is applied again to extract the original secret image blocks from the embedded image.
Experimental results show the proposed method recovers images with high PSNR quality scores while increasing encryption speed over other algorithms like AES. This provides a more secure and fast way to transmit encrypted images over networks.
Analog VLSI Implementation of Neural Network Architecture for Signal ProcessingVLSICS Design
With the advent of new technologies and advancement in medical science we are trying to process the information artificially as our biological system performs inside our body. Artificial intelligence through a biological word is realized based on mathematical equations and artificial neurons. Our main focus is on the implementation of Neural Network Architecture (NNA) with on a chip learning in analog VLSI for generic signal processing applications. In the proposed paper analog components like Gilbert Cell Multiplier (GCM), Neuron activation Function (NAF) are used to implement artificial NNA. The analog components used are comprises of multipliers and adders’ along with the tan-sigmoid function circuit using MOS transistor in subthreshold region. This neural architecture is trained using Back propagation (BP) algorithm in analog domain with new techniques of weight storage. Layout design and verification of the proposed design is carried out using Tanner EDA 14.1 tool and synopsys Tspice. The technology used in designing the layouts is MOSIS/HP 0.5u SCN3M, Tight Metal.
Analysis of image compression algorithms using wavelet transform with gui in ...eSAT Publishing House
IJRET : International Journal of Research in Engineering and Technology is an international peer reviewed, online journal published by eSAT Publishing House for the enhancement of research in various disciplines of Engineering and Technology. The aim and scope of the journal is to provide an academic medium and an important reference for the advancement and dissemination of research results that support high-level learning, teaching and research in the fields of Engineering and Technology. We bring together Scientists, Academician, Field Engineers, Scholars and Students of related fields of Engineering and Technology.
Analysis of image compression algorithms using wavelet transform with gui in ...eSAT Journals
Abstract Image compression is nothing but reducing the amount of data required to represent an image. To compress an image efficiently we use various techniques to decrease the space and to increase the efficiency of transfer of the images over network for better access. This paper explains about compression methods such as JPEG 2000, EZW, SPIHT (Set Partition in Hierarchical Trees) and HS-SPIHT on the basis of processing time, error comparison, mean square error, peak signal to noise ratio and compression ratio. Due to the large requirement for memory and the high complexity of computation, JPEG2000 cannot be used in many conditions especially in the memory constraint case. SPIHT gives better simplicity and better compression compared to the other techniques. But to scale the image more so as to get better compression we are using the line-based Wavelet transform because it requires lower memory without affecting the result of Wavelet transform. We proposed a highly scalable image compression scheme based on the Set Partitioning in Hierarchical Trees (SPIHT) algorithm. This algorithm is called Highly Scalable SPIHT (HS_SPIHT) it gives good scalability and provides 1 bit stream that can be easily adapted to give bandwidth and resolution requirements. Keywords: - Wavelet transform Scalability, SPIHT, HS-SPIHT, Processing time, Line-based Wavelet transform.
FPGA Based Implementation of AES Encryption and Decryption with Low Power Mul...IOSRJECE
This document discusses the implementation of AES encryption and decryption using a multiplexer look-up table (MLUT) based substitution box (S-box) on an FPGA to reduce power consumption and increase resistance to side channel attacks. The proposed MLUT S-box uses a 256-byte to 1-byte multiplexer with a 256-byte memory to select pre-computed S-box outputs, making it simpler and lower power than conventional implementations. Simulation results show the MLUT S-box design encrypting and decrypting data correctly while consuming 0.55W of power, three times lower than a conventional S-box. Power analysis also found the MLUT S-box has highly uniform power dissipation for different inputs
Implementation Of Back-Propagation Neural Network For Isolated Bangla Speech ...ijistjournal
This document describes the implementation of a back-propagation neural network for isolated Bangla speech recognition. The network was trained on Mel Frequency Cepstral Coefficient (MFCC) features extracted from recordings of 10 Bangla digits spoken by 10 speakers. The network architecture included an input layer of 250 neurons, a hidden layer of 16 neurons, and an output layer of 10 neurons. The network was trained using backpropagation and achieved a recognition rate of 96.3% for known speakers and 92% for unknown speakers. The system demonstrates the potential for developing speaker-independent isolated digit speech recognition in Bangla.
Implementation of Back-Propagation Neural Network using Scilab and its Conver...IJEEE
Artificial neural network has been widely used for solving non-linear complex tasks. With the development of computer technology, machine learning techniques are becoming good choice. The selection of the machine learning technique depends upon the viability for particular application. Most of the non-linear problems have been solved using back propagation based neural network. The training time of neural network is directly affected by convergence speed. Several efforts are done to improve the convergence speed of back propagation algorithm. This paper focuses on the implementation of back-propagation algorithm and an effort to improve its convergence speed. The algorithm is written in SCILAB. UCI standard data set is used for analysis purposes. Proposed modification in standard backpropagation algorithm provides substantial improvement in the convergence speed.
International Journal of Engineering and Science Invention (IJESI) is an international journal intended for professionals and researchers in all fields of computer science and electronics. IJESI publishes research articles and reviews within the whole field Engineering Science and Technology, new teaching methods, assessment, validation and the impact of new technologies and it will continue to provide information on the latest trends and developments in this ever-expanding subject. The publications of papers are selected through double peer reviewed to ensure originality, relevance, and readability. The articles published in our journal can be accessed online.
The International Journal of Engineering & Science is aimed at providing a platform for researchers, engineers, scientists, or educators to publish their original research results, to exchange new ideas, to disseminate information in innovative designs, engineering experiences and technological skills. It is also the Journal's objective to promote engineering and technology education. All papers submitted to the Journal will be blind peer-reviewed. Only original articles will be published.
The papers for publication in The International Journal of Engineering& Science are selected through rigorous peer reviews to ensure originality, timeliness, relevance, and readability.
IRJET - Implementation of Neural Network on FPGAIRJET Journal
This document summarizes the implementation of a neural network for regression on an FPGA. It discusses training a neural network using TensorFlow to predict house prices based on area. The trained model with optimized weights is then implemented on an FPGA using Verilog HDL by breaking it down into floating point multiplication and addition modules. Simulation results show the FPGA implementation produces the same outputs as GPU/CPU implementations but with lower latency, showing promise for deploying neural networks in real-time embedded applications using FPGAs.
Improvement of chaotic secure communication scheme based on steganographic me...Massoud Khodadadzadeh
1) The document proposes a novel method for improving chaotic secure communication using steganography and multimodal chaotic maps.
2) It hides a message signal in an image by modifying pixel grey levels, and sends the stego image using chaotic parameter modulation.
3) At the receiver, synchronization is used to estimate system parameters and determine the map set in order to retrieve the hidden message signal.
Deep Learning for Natural Language ProcessingIRJET Journal
This document discusses the use of deep learning techniques in natural language processing. It begins by defining deep learning as a set of machine learning algorithms that use multiple layered models like neural networks to learn inputs. Deep learning aims to process complex data like text in a way that mimics the human brain. The document then discusses several deep learning methods that have been applied to natural language processing tasks, including stacked autoencoders, deep Boltzmann machines, and transfer learning. It provides examples of how these techniques are used to perform tasks like object recognition from text and speech recognition.
This document summarizes a research paper that proposes a novel reversible data hiding scheme using AES encryption. The scheme consists of three phases: 1) AES encryption of the original image, 2) data embedding by modifying parts of the encrypted image, 3) data extraction and image recovery by decrypting the encrypted image and extracting the hidden data. The scheme aims to securely hide data in images while allowing perfect recovery of the original image. Experimental results show the decrypted image has a high PSNR value of 55.11dB and the hidden data can be successfully extracted.
IJCER (www.ijceronline.com) International Journal of computational Engineerin...ijceronline
The document discusses video compression using the Set Partitioning in Hierarchical Trees (SPIHT) algorithm and neural networks. It presents the principles of SPIHT coding and the backpropagation algorithm for neural networks. Various neural network training algorithms are tested for compressing video frames, including gradient descent with momentum and adaptive learning. The results show the compressed frames with different algorithms, and gradient descent with momentum and adaptive learning achieved the best compression ratio of 1.1737089:1 while maintaining image clarity.
This document discusses neural networks and multilayer feedforward neural network architectures. It describes how multilayer networks can solve nonlinear classification problems using hidden layers. The backpropagation algorithm is introduced as a way to train these networks by propagating error backwards from the output to adjust weights. The architecture of a neural network is explained, including input, hidden, and output nodes. Backpropagation is then described in more detail through its training process of forward passing input, calculating error at the output, and propagating this error backwards to update weights. Examples of backpropagation and its applications are also provided.
Nonlinear autoregressive moving average l2 model based adaptive control of no...Mustefa Jibril
This document discusses the use of neural network controllers for nonlinear systems based on nonlinear autoregressive moving average (NARMA) models. It specifically examines using a NARMA-L2 model to design three different neural network controllers for a nerves system based arm position sensor device: 1) a neural network controller with NARMA-L2 system identification, 2) a neural network controller with NARMA-L2 model predictive control, and 3) a neural network controller with NARMA-L2 model reference adaptive control. Simulation results show the neural network controller with NARMA-L2 model reference adaptive control had the best performance for controlling the arm position under different input signals.
Hybrid compression based stationary wavelet transformsOmar Ghazi
This document presents a hybrid compression approach for images that uses Stationary Wavelet Transforms (SWT), Back Propagation Neural Network (BPNN), and Lempel-Ziv-Welch (LZW) compression. The approach involves: 1) preprocessing the image, 2) applying SWT, 3) converting to a 1D vector using zigzag scan, and 4) hybrid compression using BPNN vector quantization and LZW lossless compression. Experimental results show the SWT with BPNN and LZW achieves the highest compression ratios but the longest processing time, while SWT with Run Length encoding has a lower ratio but shorter time. The hybrid approach combines lossy and lossless compression techniques to obtain a
This document summarizes a research paper that proposes a method for converting images and video into portraits and animations using RGB color segmentation. The method involves several steps: edge detection using Sobel operator, blurring the image with Gaussian blur to reduce noise, color segmentation by comparing RGB pixel values to a threshold, and region filling to convert the image into a portrait. The overall goal is to automatically convert still images and video into animated portraits without requiring design of characters or additional software.
Study and Analysis of Six Stroke EngineIJERA Editor
Six Stroke engine, the name itself indicates a cycle of six strokes out of which two are useful power strokes. According to its mechanical design, the six-stroke engine with external and internal combustion and double flow is similar to the actual internal reciprocating combustion engine. However, it differentiates itself entirely, due to its thermodynamic cycle and a modified cylinder head with two supplementary chambers: combustion and an air heating chamber, both independent from the cylinder. In this the cylinder and the combustion chamber are separated which gives more freedom for design analysis. In addition to the two valves in the four stroke engine two more valves are incorporated which are operated by a piston arrangement. The Six Stroke is thermodynamically more efficient because the change in volume of the power stroke is greater than the intake stroke and the compression stroke. The main advantages of six stroke engine includes reduction in fuel consumption by 40%, two power strokes in the six stroke cycle, dramatic reduction in pollution, adaptability to multi fuel operation. Six stroke engine’s adoption by the automobile industry would have a tremendous impact on the environment and world economy .
Arm Robot Surveillance Using Dual Tone Multiple Frequency TechnologyIJERA Editor
Surveillance place a pivotal role in addressing a wide range of security challenges .In the present paper we propose a Dual Tone Multiple Frequency ( DTMF) based Robot with video surveillance. In the proposed model a DTMF based Robot with video surveillance with multiple key functions, Arm picker and security system was implemented. Master and slave concept using 3 Microcontroller and motor driver IC to drive motors was implemented and belt wheel platform was used to move the robot from one place to another. Multiple key functions were used to perform more functions and a camera for surveillance .The robot can navigate with the help of the user.
This document proposes an efficient and secure cryptography technique using unimodular matrices. It aims to improve data security during transmission by encrypting messages. The proposed method encrypts data into a matrix form using ASCII values, then multiplies it by an encoding matrix generated from an Armstrong number. At the receiver end, the cipher text matrix is decrypted by multiplying it by the inverse of the encoding matrix. This overcomes limitations of previous techniques by allowing any length messages and not relying on Armstrong numbers containing zeros. The method ensures confidentiality, access control and non-repudiation through the use of encryption and decryption with the same secret key.
Digital Implementation of Artificial Neural Network for Function Approximatio...IOSR Journals
: The soft computing algorithms are being nowadays used for various multi input multi output
complicated non linear control applications. This paper presented the development and implementation of back
propagation of multilayer perceptron architecture developed in FPGA using VHDL. The usage of the FPGA
(Field Programmable Gate Array) for neural network implementation provides flexibility in programmable
systems. For the neural network based instrument prototype in real time application. The conventional specific
VLSI neural chip design suffers the limitation in time and cost. With low precision artificial neural network
design, FPGA have higher speed and smaller size for real time application than the VLSI design. The
challenges are finding an architecture that minimizes the hardware cost, maximizing the performance,
accuracy. The goal of this work is to realize the hardware implementation of neural network using FPGA.
Digital system architecture is presented using Very High Speed Integrated Circuits Hardware Description
Language (VHDL)and is implemented in FPGA chip. MATLAB ANN programming and tools are used for
training the ANN. The trained weights are stored in different RAM, and is implemented in FPGA. The design
was tested on a FPGA demo board
Fast and Secure Transmission of Image by using Byte Rotation Algorithm in Net...IRJET Journal
This document proposes a new secure image transmission method using byte rotation algorithm that improves encryption speed and security. The key steps are:
1. The input image is divided into four blocks which are shuffled using byte rotation.
2. A cover image is used to embed the shuffled secret image blocks for transmission.
3. At the receiver, byte rotation is applied again to extract the original secret image blocks from the embedded image.
Experimental results show the proposed method recovers images with high PSNR quality scores while increasing encryption speed over other algorithms like AES. This provides a more secure and fast way to transmit encrypted images over networks.
Analog VLSI Implementation of Neural Network Architecture for Signal ProcessingVLSICS Design
With the advent of new technologies and advancement in medical science we are trying to process the information artificially as our biological system performs inside our body. Artificial intelligence through a biological word is realized based on mathematical equations and artificial neurons. Our main focus is on the implementation of Neural Network Architecture (NNA) with on a chip learning in analog VLSI for generic signal processing applications. In the proposed paper analog components like Gilbert Cell Multiplier (GCM), Neuron activation Function (NAF) are used to implement artificial NNA. The analog components used are comprises of multipliers and adders’ along with the tan-sigmoid function circuit using MOS transistor in subthreshold region. This neural architecture is trained using Back propagation (BP) algorithm in analog domain with new techniques of weight storage. Layout design and verification of the proposed design is carried out using Tanner EDA 14.1 tool and synopsys Tspice. The technology used in designing the layouts is MOSIS/HP 0.5u SCN3M, Tight Metal.
Analysis of image compression algorithms using wavelet transform with gui in ...eSAT Publishing House
IJRET : International Journal of Research in Engineering and Technology is an international peer reviewed, online journal published by eSAT Publishing House for the enhancement of research in various disciplines of Engineering and Technology. The aim and scope of the journal is to provide an academic medium and an important reference for the advancement and dissemination of research results that support high-level learning, teaching and research in the fields of Engineering and Technology. We bring together Scientists, Academician, Field Engineers, Scholars and Students of related fields of Engineering and Technology.
Analysis of image compression algorithms using wavelet transform with gui in ...eSAT Journals
Abstract Image compression is nothing but reducing the amount of data required to represent an image. To compress an image efficiently we use various techniques to decrease the space and to increase the efficiency of transfer of the images over network for better access. This paper explains about compression methods such as JPEG 2000, EZW, SPIHT (Set Partition in Hierarchical Trees) and HS-SPIHT on the basis of processing time, error comparison, mean square error, peak signal to noise ratio and compression ratio. Due to the large requirement for memory and the high complexity of computation, JPEG2000 cannot be used in many conditions especially in the memory constraint case. SPIHT gives better simplicity and better compression compared to the other techniques. But to scale the image more so as to get better compression we are using the line-based Wavelet transform because it requires lower memory without affecting the result of Wavelet transform. We proposed a highly scalable image compression scheme based on the Set Partitioning in Hierarchical Trees (SPIHT) algorithm. This algorithm is called Highly Scalable SPIHT (HS_SPIHT) it gives good scalability and provides 1 bit stream that can be easily adapted to give bandwidth and resolution requirements. Keywords: - Wavelet transform Scalability, SPIHT, HS-SPIHT, Processing time, Line-based Wavelet transform.
FPGA Based Implementation of AES Encryption and Decryption with Low Power Mul...IOSRJECE
This document discusses the implementation of AES encryption and decryption using a multiplexer look-up table (MLUT) based substitution box (S-box) on an FPGA to reduce power consumption and increase resistance to side channel attacks. The proposed MLUT S-box uses a 256-byte to 1-byte multiplexer with a 256-byte memory to select pre-computed S-box outputs, making it simpler and lower power than conventional implementations. Simulation results show the MLUT S-box design encrypting and decrypting data correctly while consuming 0.55W of power, three times lower than a conventional S-box. Power analysis also found the MLUT S-box has highly uniform power dissipation for different inputs
Implementation Of Back-Propagation Neural Network For Isolated Bangla Speech ...ijistjournal
This document describes the implementation of a back-propagation neural network for isolated Bangla speech recognition. The network was trained on Mel Frequency Cepstral Coefficient (MFCC) features extracted from recordings of 10 Bangla digits spoken by 10 speakers. The network architecture included an input layer of 250 neurons, a hidden layer of 16 neurons, and an output layer of 10 neurons. The network was trained using backpropagation and achieved a recognition rate of 96.3% for known speakers and 92% for unknown speakers. The system demonstrates the potential for developing speaker-independent isolated digit speech recognition in Bangla.
Implementation of Back-Propagation Neural Network using Scilab and its Conver...IJEEE
Artificial neural network has been widely used for solving non-linear complex tasks. With the development of computer technology, machine learning techniques are becoming good choice. The selection of the machine learning technique depends upon the viability for particular application. Most of the non-linear problems have been solved using back propagation based neural network. The training time of neural network is directly affected by convergence speed. Several efforts are done to improve the convergence speed of back propagation algorithm. This paper focuses on the implementation of back-propagation algorithm and an effort to improve its convergence speed. The algorithm is written in SCILAB. UCI standard data set is used for analysis purposes. Proposed modification in standard backpropagation algorithm provides substantial improvement in the convergence speed.
International Journal of Engineering and Science Invention (IJESI) is an international journal intended for professionals and researchers in all fields of computer science and electronics. IJESI publishes research articles and reviews within the whole field Engineering Science and Technology, new teaching methods, assessment, validation and the impact of new technologies and it will continue to provide information on the latest trends and developments in this ever-expanding subject. The publications of papers are selected through double peer reviewed to ensure originality, relevance, and readability. The articles published in our journal can be accessed online.
The International Journal of Engineering & Science is aimed at providing a platform for researchers, engineers, scientists, or educators to publish their original research results, to exchange new ideas, to disseminate information in innovative designs, engineering experiences and technological skills. It is also the Journal's objective to promote engineering and technology education. All papers submitted to the Journal will be blind peer-reviewed. Only original articles will be published.
The papers for publication in The International Journal of Engineering& Science are selected through rigorous peer reviews to ensure originality, timeliness, relevance, and readability.
IRJET - Implementation of Neural Network on FPGAIRJET Journal
This document summarizes the implementation of a neural network for regression on an FPGA. It discusses training a neural network using TensorFlow to predict house prices based on area. The trained model with optimized weights is then implemented on an FPGA using Verilog HDL by breaking it down into floating point multiplication and addition modules. Simulation results show the FPGA implementation produces the same outputs as GPU/CPU implementations but with lower latency, showing promise for deploying neural networks in real-time embedded applications using FPGAs.
Improvement of chaotic secure communication scheme based on steganographic me...Massoud Khodadadzadeh
1) The document proposes a novel method for improving chaotic secure communication using steganography and multimodal chaotic maps.
2) It hides a message signal in an image by modifying pixel grey levels, and sends the stego image using chaotic parameter modulation.
3) At the receiver, synchronization is used to estimate system parameters and determine the map set in order to retrieve the hidden message signal.
Deep Learning for Natural Language ProcessingIRJET Journal
This document discusses the use of deep learning techniques in natural language processing. It begins by defining deep learning as a set of machine learning algorithms that use multiple layered models like neural networks to learn inputs. Deep learning aims to process complex data like text in a way that mimics the human brain. The document then discusses several deep learning methods that have been applied to natural language processing tasks, including stacked autoencoders, deep Boltzmann machines, and transfer learning. It provides examples of how these techniques are used to perform tasks like object recognition from text and speech recognition.
This document summarizes a research paper that proposes a novel reversible data hiding scheme using AES encryption. The scheme consists of three phases: 1) AES encryption of the original image, 2) data embedding by modifying parts of the encrypted image, 3) data extraction and image recovery by decrypting the encrypted image and extracting the hidden data. The scheme aims to securely hide data in images while allowing perfect recovery of the original image. Experimental results show the decrypted image has a high PSNR value of 55.11dB and the hidden data can be successfully extracted.
IJCER (www.ijceronline.com) International Journal of computational Engineerin...ijceronline
The document discusses video compression using the Set Partitioning in Hierarchical Trees (SPIHT) algorithm and neural networks. It presents the principles of SPIHT coding and the backpropagation algorithm for neural networks. Various neural network training algorithms are tested for compressing video frames, including gradient descent with momentum and adaptive learning. The results show the compressed frames with different algorithms, and gradient descent with momentum and adaptive learning achieved the best compression ratio of 1.1737089:1 while maintaining image clarity.
This document discusses neural networks and multilayer feedforward neural network architectures. It describes how multilayer networks can solve nonlinear classification problems using hidden layers. The backpropagation algorithm is introduced as a way to train these networks by propagating error backwards from the output to adjust weights. The architecture of a neural network is explained, including input, hidden, and output nodes. Backpropagation is then described in more detail through its training process of forward passing input, calculating error at the output, and propagating this error backwards to update weights. Examples of backpropagation and its applications are also provided.
Nonlinear autoregressive moving average l2 model based adaptive control of no...Mustefa Jibril
This document discusses the use of neural network controllers for nonlinear systems based on nonlinear autoregressive moving average (NARMA) models. It specifically examines using a NARMA-L2 model to design three different neural network controllers for a nerves system based arm position sensor device: 1) a neural network controller with NARMA-L2 system identification, 2) a neural network controller with NARMA-L2 model predictive control, and 3) a neural network controller with NARMA-L2 model reference adaptive control. Simulation results show the neural network controller with NARMA-L2 model reference adaptive control had the best performance for controlling the arm position under different input signals.
Hybrid compression based stationary wavelet transformsOmar Ghazi
This document presents a hybrid compression approach for images that uses Stationary Wavelet Transforms (SWT), Back Propagation Neural Network (BPNN), and Lempel-Ziv-Welch (LZW) compression. The approach involves: 1) preprocessing the image, 2) applying SWT, 3) converting to a 1D vector using zigzag scan, and 4) hybrid compression using BPNN vector quantization and LZW lossless compression. Experimental results show the SWT with BPNN and LZW achieves the highest compression ratios but the longest processing time, while SWT with Run Length encoding has a lower ratio but shorter time. The hybrid approach combines lossy and lossless compression techniques to obtain a
This document summarizes a research paper that proposes a method for converting images and video into portraits and animations using RGB color segmentation. The method involves several steps: edge detection using Sobel operator, blurring the image with Gaussian blur to reduce noise, color segmentation by comparing RGB pixel values to a threshold, and region filling to convert the image into a portrait. The overall goal is to automatically convert still images and video into animated portraits without requiring design of characters or additional software.
Study and Analysis of Six Stroke EngineIJERA Editor
Six Stroke engine, the name itself indicates a cycle of six strokes out of which two are useful power strokes. According to its mechanical design, the six-stroke engine with external and internal combustion and double flow is similar to the actual internal reciprocating combustion engine. However, it differentiates itself entirely, due to its thermodynamic cycle and a modified cylinder head with two supplementary chambers: combustion and an air heating chamber, both independent from the cylinder. In this the cylinder and the combustion chamber are separated which gives more freedom for design analysis. In addition to the two valves in the four stroke engine two more valves are incorporated which are operated by a piston arrangement. The Six Stroke is thermodynamically more efficient because the change in volume of the power stroke is greater than the intake stroke and the compression stroke. The main advantages of six stroke engine includes reduction in fuel consumption by 40%, two power strokes in the six stroke cycle, dramatic reduction in pollution, adaptability to multi fuel operation. Six stroke engine’s adoption by the automobile industry would have a tremendous impact on the environment and world economy .
Arm Robot Surveillance Using Dual Tone Multiple Frequency TechnologyIJERA Editor
Surveillance place a pivotal role in addressing a wide range of security challenges .In the present paper we propose a Dual Tone Multiple Frequency ( DTMF) based Robot with video surveillance. In the proposed model a DTMF based Robot with video surveillance with multiple key functions, Arm picker and security system was implemented. Master and slave concept using 3 Microcontroller and motor driver IC to drive motors was implemented and belt wheel platform was used to move the robot from one place to another. Multiple key functions were used to perform more functions and a camera for surveillance .The robot can navigate with the help of the user.
Evaluation of Euclidean and Manhanttan Metrics In Content Based Image Retriev...IJERA Editor
This document evaluates the performance of the Euclidean and Manhattan distance metrics in a content-based image retrieval system. It finds that the Manhattan distance metric showed better precision than the Euclidean distance metric. The system uses color histograms and Gabor texture features to represent images. Color is represented in HSV color space and histograms of hue, saturation and value are used. Gabor filters are applied to capture texture at different scales and orientations. Distance between feature vectors is calculated using Euclidean and Manhattan distance formulas to find similar images from the database. The system was tested on a dataset of 1000 Corel images and Manhattan distance produced more relevant search results.
Este documento resume y critica el Estudio Económico del nuevo proyecto de embalse de Biscarrués realizado por Iberinsa. Se cometieron graves errores en el estudio de Iberinsa, como sobreestimar los volúmenes de agua que serían turbinados y realizar una errónea ponderación de los cánones teóricos para el regadío y la producción eléctrica. Además, no se contabilizaron adecuadamente los costes sobre las actividades de rafting en la zona, ni los costes ambientales asociados a
This document discusses management and z-leadership. It is authored by Franck Bourdeau and published by DIA Editions. The title of the document is "Stupeur" which discusses innovative approaches to leadership.
Conecta con tus sentidos, Recréate la vista en 2 minutosindaianasan
Super Fotky es una aplicación de fotografía que permite a los usuarios tomar fotos, aplicar filtros y efectos, y compartirlas en las redes sociales. La aplicación ofrece una interfaz sencilla e intuitiva para capturar y editar imágenes, y cuenta con una amplia biblioteca de herramientas creativas para mejorar las fotos antes de publicarlas.
O documento discute o conceito de etnocentrismo. Ele define etnocentrismo como a tendência de um indivíduo ou grupo julgar outro grupo com base nos valores e padrões do próprio grupo. O documento também explica que o etnocentrismo causa distorções nas percepções que fazemos daqueles que são diferentes de nós e que julgar outras culturas com base nos valores da própria cultura é ser etnocêntrico.
Este documento presenta un grupo de 16 jóvenes llamado Logroño Dinámica que está realizando una Escuela Taller de Dinamización y Mediación. El objetivo del grupo es dinamizar la sociedad a través de la movilización de personas y trabajar en la resolución de conflictos y mejora de la convivencia comunitaria mediante la mediación. El grupo trabaja con diversos colectivos como barrios problemáticos, inmigración, infancia, adolescencia, personas mayores y desempleados. La Escuela Taller dura 6 meses de form
Microsoft power point dentro del aeropuerto.ppt ampliadomacuqui
El documento describe las diferentes actividades y vehículos que se pueden encontrar dentro de un aeropuerto, incluyendo la llegada y aterrizaje de un avión, el señalero indicando su recorrido por la pista, los pasajeros subiendo al avión, las avionetas de la escuela de pilotos y un camión de bomberos realizando una demostración.
O documento resume as principais alterações introduzidas pelo Acordo Ortográfico da Língua Portuguesa de 1990, assinado por países da CPLP. Privilegia-se agora o critério fonético em vez do etimológico e introduzem-se três novas letras no alfabeto. Reduzem-se as regras de emprego do hífen e definem-se duplas grafias entre Portugal e Brasil.
El comisario de la Confederación Hidrográfica del Tajo, José Antonio Díaz Lázaro-Carrasco, explicó su visión sobre la cuenca del Tajo en el VII Congreso Ibérico de la FNCA en Talavera de la Reina. Dice que la DMA no es suficiente, pero que se han hecho cosas. Por ejemplo, se han dejado de vertir al Tajo 400.000 toneladas de lodos.
Este documento presenta un proyecto de ilustración en Illustrator sobre una nueva identidad para Caperucita Roja como futbolista. La ilustración mostrará a Caperucita Roja como capitana de la selección peruana de fútbol, gritando un gol en un estadio rodeada de osos de peluche vestidos como jugadores de Perú. La imagen incorporará elementos como la camiseta número 10 de Perú, chimpunes y una capucha roja con la indumentaria de la selección peruana.
El documento presenta un recurso interactivo para que estudiantes entre 10 y 13 años tomen decisiones que contribuyan a la paz y armonía social. El recurso ofrece escenarios sobre situaciones cotidianas en el barrio, hogar y colegio donde los usuarios deben elegir una acción y ver sus consecuencias. El objetivo es concientizar sobre el impacto de las decisiones diarias y promover valores como la solidaridad y justicia.
Este documento presenta un proyecto de diseño gráfico en Illustrator para crear una nueva versión de Caperucita Roja como una bebé futbolista. La identidad mostrará a Caperucita parada en una cancha de fútbol usando la camiseta de la selección peruana número 10 y gritando un gol. Los otros jugadores serán osos de peluche vestidos igual, y habrá anuncios en el estadio relacionados a bebés. El proyecto incluye ideas, bocetos y la ejecución final en
Presentación donde buscar trabajo poapmariaj_fs_88
El documento proporciona información sobre dónde buscar empleo, incluyendo revistas especializadas, programas de televisión, periódicos, oficinas especializadas, boletines oficiales, anuncios públicos y sitios web. También describe los primeros pasos para acceder al mercado laboral como inscribirse como demandante de empleo en oficinas de empleo, entregar documentos como el currículum y solicitar trabajo de forma formal.
Ponencia de Tony Herrera, socio fundador de la Fundación Nueva Cultura del Agua, en las segundas jornadas provinciales por una nueva cultura del agua, organizadas con la Diputación de Málaga.
Un blog es un sitio web actualizado periódicamente que recopila artículos de uno o más autores de forma cronológica. Existen blogs periodísticos, empresariales, tecnológicos, educativos y personales. Los blogs educativos tienen el objetivo de reforzar el proceso de enseñanza y aprendizaje, permitiendo la construcción de la identidad del autor, la organización de información, el fomento del debate a través de comentarios y la creación de comunidades de aprendizaje.
Este documento describe los retos de la gestión conjunta de las cuencas hidrográficas hispano-lusas en el marco del Convenio de Albufeira y la Directiva Marco del Agua. Señala la necesidad de mayor coordinación entre España y Portugal, incluyendo la compatibilización de sistemas, el intercambio de información, y la generación eventual de un único Plan Hidrológico para cada Demarcación Hidrográfica Internacional.
El documento resume la decisión del Consejo de Ministros de aprobar un aumento de 100 millones de euros para el recrecimiento de la presa de Yesa. Esto eleva el coste total del proyecto a 277 millones de euros, más del doble del presupuesto inicial. La asociación Río Aragón se opone firmemente al proyecto debido a problemas técnicos y de seguridad, y por el despilfarro que supone para las arcas públicas.
Design And Implementation Of Tiny Encryption AlgorithmIJERA Editor
Over the recent years, several smart applications like RFID‟s, sensor networks, including industrial systems, critical infrastructures, private and public spaces as well as portable and wearable applications in which highly constrained devices are interconnected, typically communicating wirelessly with one another, working in concert to accomplish some task. Advanced safety and security mechanisms can be very important in all of these areas. Light weight cryptography enables secure and efficient communication between networked smart objects. This proposed system focuses on the FPGA implementation of light weight cryptographic algorithm Tiny Encryption Algorithm TEA to adapt with many real time constraints such as memory, data loss and low cost. The proposed scheme uses Linear Feedback Shift Register to generate the random key making it more secure for sensitive information transfer in many real-time applications. In this study,operation of this cryptosystem is analyzed by implementing the cryptographic algorithm TEA with the key generation unit in FPGA Spartan 3E. We have also compared the results with the IDEA.
Extended of TEA: A 256 bits block cipher algorithm for image encryption IJECEIAES
This paper introduces an effective image encryption approach that merges a chaotic map and polynomial with a block cipher. According to this scheme, there are three levels of encryption. In the first level, pixel positions of the image are scuffled into blocks randomly based on a chaotic map. In the second level, the polynomials are constructed by taking N unused pixels from the permuted blocks as polynomial coefficients. Finally, the third level a proposed secret-key block cipher called extended of tiny encryption algorithm (ETEA) is used. The proposed ETEA algorithm increased the block size from 64-bit to 256-bit by using F-function in type three Feistel network design. The key schedule generation is very straightforward through admixture the entire major subjects in the identical manner for every round. The proposed ETEA algorithm is word-oriented, where wholly internal operations are executed on words of 32 bits. So, it is possible to efficiently implement the proposed algorithm on smart cards. The results of the experimental demonstration that the proposed encryption algorithm for all methods are efficient and have high security features through statistical analysis using histograms, correlation, entropy, randomness tests, and the avalanche effect.
This document summarizes a research paper that proposes a new approach for complex encryption and decryption of data. The approach uses a combination of public key infrastructure and RC6 algorithm. It divides plaintext into blocks, uses one block as an encryption key, and inserts the key into the ciphertext based on a private position. Performance analysis shows the proposed approach encrypts and decrypts data faster than the AES algorithm. Security analysis indicates the approach is secure against known attacks based on correlation analysis and information entropy tests. The approach provides improved security and performance for encrypting network data.
Pairing Based Elliptic Curve Cryptosystem for Message AuthenticationIJTET Journal
This document summarizes a research paper on using elliptic curve cryptography for message authentication. It begins with an introduction to elliptic curve cryptography and how it can provide equivalent security to other public key encryption methods but with smaller key sizes. It then describes the proposed methodology which includes generating an ECC key pair, encrypting a message with the public key, transmitting the encrypted message, and decrypting it with the private key. The results show a message being encrypted and decrypted correctly using this ECC process. It concludes that ECC can provide an efficient method for authentication in systems like vehicular networks due to its lower computation and communication overhead compared to other encryption methods.
IJCER (www.ijceronline.com) International Journal of computational Engineerin...ijceronline
The document summarizes a research paper that proposes a new symmetric block cipher algorithm similar to AES but with a 200-bit block size instead of 128 bits. It compares the power consumption and strict avalanche criteria of the proposed algorithm to other AES standards. The power consumption during encryption is up to 30% lower but decryption is 20% higher. The strict avalanche criteria shows the proposed algorithm meets security levels of AES. The algorithm is described in detail including key schedule, byte substitution, shift row, mix column, and add round key transformations.
Data Security Using Elliptic Curve CryptographyIJCERT
Cryptography technique is used to provide data security. In existing cryptography technique the key generation takes place randomly. Key generation require shared key. If shared key is access by unauthorized user then security becomes disoriented. Hence existing problems are alleviated to give more security to data. In proposed system a algorithm called as Elliptic Curve Cryptography is used. The ECC generates the key by using the point on the curve. The ECC is used for generating the key by using point on the curve and encryption and decryption operation takes place through curve. In the proposed system the encryption and key generation process takes place rapidly.
This document presents an optimized FPGA hardware implementation of public key cryptography using encryption and decryption. The implementation uses two keys - a public key for encryption that anyone can use, and a private key for decryption that only the intended recipient possesses. The design was tested on a Xilinx Virtex 5 FPGA. Encryption and decryption were shown to work correctly when the proper keys were used. Without the private key, decryption was not possible, demonstrating the security of the approach. Synthesis results showed the design utilizes FPGA resources efficiently compared to other related work.
A NOVEL STRUCTURE WITH DYNAMIC OPERATION MODE FOR SYMMETRIC-KEY BLOCK CIPHERSIJNSA Journal
This document proposes a unified operation structure (UOS) that combines existing block cipher modes of operation to allow for multi-mode functionality. The UOS uses three buffers to store feedback information from the previous encryption block, overcoming the typical need for separate buffers for each mode. This provides a common solution for supporting multiple modes of operation with low memory requirements, making it suitable for ubiquitous computing devices. The UOS can integrate encryption modes like ECB, CBC, CFB and OFB as well as authentication modes like CBC-MAC to provide both confidentiality and integrity.
IJRET : International Journal of Research in Engineering and Technology is an international peer reviewed, online journal published by eSAT Publishing House for the enhancement of research in various disciplines of Engineering and Technology. The aim and scope of the journal is to provide an academic medium and an important reference for the advancement and dissemination of research results that support high-level learning, teaching and research in the fields of Engineering and Technology. We bring together Scientists, Academician, Field Engineers, Scholars and Students of related fields of Engineering and Technology
Implementation of Cryptography Architecture with High Secure CoreIJMER
International Journal of Modern Engineering Research (IJMER) is Peer reviewed, online Journal. It serves as an international archival forum of scholarly research related to engineering and science education.
International Journal of Modern Engineering Research (IJMER) covers all the fields of engineering and science: Electrical Engineering, Mechanical Engineering, Civil Engineering, Chemical Engineering, Computer Engineering, Agricultural Engineering, Aerospace Engineering, Thermodynamics, Structural Engineering, Control Engineering, Robotics, Mechatronics, Fluid Mechanics, Nanotechnology, Simulators, Web-based Learning, Remote Laboratories, Engineering Design Methods, Education Research, Students' Satisfaction and Motivation, Global Projects, and Assessment…. And many more.
IRJET- Implementation of AES Algorithm in Arduino Mega2560 BoardIRJET Journal
1) The document discusses the implementation of the Advanced Encryption Standard (AES) algorithm for encryption on an Arduino Mega2560 board. AES was chosen to securely transmit sensor data collected by microcontrollers.
2) AES provides stronger encryption than older standards like DES and 3DES through its larger key sizes of 128, 192, and 256 bits and more rounds of encryption. The document implements a simple version of AES on the Arduino board.
3) Testing showed the AES code used 8824 bytes of program storage on the Arduino and encryption took 3016 microseconds while decryption took 3792 microseconds, demonstrating AES can provide security for resource-constrained devices.
Data Encryption and Decryption Algorithm Using Hamming Code and Arithmetic Op...IJERA Editor
This paper explains the implementation of data encryption and decryption algorithm using hamming code and arithmetic operations with the help of Verilog HDL. As the days are passing the old algorithms are not remained so strong cryptanalyst are familiar with them. Hamming code is one of forward error correcting code which has got many applications. In this paper hamming code algorithm was discussed and the implementation of it was done with arithmetic operations. For high security some arithmetic operations are added with hamming code process. A 3-bit data will be encrypted as 14-bit and using decryption process again we will receives 3-bit original data. The implemented design was tested on Spartan3A FPGA kit.
Mixed Scanning and DFT Techniques for Arithmetic CoreIJERA Editor
Elliptic curve Cryptosystem used in cryptography chips undergoes side channel threats, where the attackers deciphered the secret key from the scan path. The usage of extra electronic components in scan path architecture will protect the secret key from threats. This work presents a new scan based flip flop for secure cryptographic application. By adding more sensitive internal nets along with the scan enable the testing team can find out the bugs in chip after post-silicon and even after chip fabrication. Also present a new mixed technique by adding DFT(design for testing or Dfx unit) unit and scan unit in same chip unit without affecting the normal critical path ,i.e. without affecting speed of operation of chip, latency in normal mode. Both Scan unit and DFT unit are used for testing the sequential and combinational circuits present in 32 Bit Arithmetic core. Here a proposed PN code generation unit as scan in port to increase the code coverage and scan out port efficiency. The proposed system will written in verilog code and simulated using Xilinx Tool. The hardware module core is synthesized using Xilinx Vertex 5 Field Programmable Gated Array (FPGA) kit. The performance utilization is reported with the help of generated synthesis result
LOW AREA FPGA IMPLEMENTATION OF DROMCSLA-QTL ARCHITECTURE FOR CRYPTOGRAPHIC A...IJNSA Journal
Nowadays, several techniques are implemented for the cryptosystems to provide security in communication
systems. The major issues detected in conventional methods are the weakness against different attack,
unacceptable data expansion, and slow performance speed. In this paper, a method Dual-port Read Only
Memory-Carry Select Adder-Quantitative Trait Loci (DROM-CSLA-QTL) is introduced, which utilizes
lower area than the existing method. The proposed system is implemented using DROM-CSLA, which
occupies less area. The DROM-CLSA-QTL algorithm is implemented using tools such as MATLAB and
Model Sim. Further for FPGA implementation, Virtex 4, Virtex 5 and Virtex 6 devices are used to
determine the number of Lookup Tables (LUTs), slices, flip-flops, area and frequency. Mean, Variance and
Covariance are evaluated in the MATLAB.
LOW AREA FPGA IMPLEMENTATION OF DROMCSLA-QTL ARCHITECTURE FOR CRYPTOGRAPHIC A...IJNSA Journal
Nowadays, several techniques are implemented for the cryptosystems to provide security in communication systems. The major issues detected in conventional methods are the weakness against different attack, unacceptable data expansion, and slow performance speed. In this paper, a method Dual-port Read Only Memory-Carry Select Adder-Quantitative Trait Loci (DROM-CSLA-QTL) is introduced, which utilizes lower area than the existing method. The proposed system is implemented using DROM-CSLA, which occupies less area. The DROM-CLSA-QTL algorithm is implemented using tools such as MATLAB and Model Sim. Further for FPGA implementation, Virtex 4, Virtex 5 and Virtex 6 devices are used to determine the number of Lookup Tables (LUTs), slices, flip-flops, area and frequency. Mean, Variance and Covariance are evaluated in the MATLAB.
Convolutional neural network based key generation for security of data throug...IJECEIAES
Machine learning techniques, especially deep learning, are playing an increasingly important role in our lives. Deep learning uses different models to extract information from the data. They have already had a huge impact in areas such as health (i.e., cancer diagnosis), self-driving cars, speech recognition, and data encryption. Recently, deep learning models, including convolutional neural networks (CNN), have been proven to be more effective in the security field. Moreover, the National Institute of Standards and Technology (NIST) recommends the advanced encryption standard (AES) algorithm as the most often utilized encryption method in several security applications. In this paper, a crypt-intelligent system (CIS) capable of securing data is proposed. It is based on the combination of the performance of CNN with the AES, by substituting the key expansion unit of AES with a CNN architecture that performs the key generation. Our CIS is described using very high-speed integrated circuit (VHSIC) hardware description language (VHDL), simulated by ModelSim, synthesized, and implemented with Xilinx ISE 14.7. Finally, the Airtex-7 series XC7A100T device has achieved an encryption throughput of 965.88 Mbps. In addition, the CIS offers a high degree of flexibility and is supported by reconfigurability, based on the experimental results, if sufficient resources are available, the architecture can provide performance that can satisfy cryptographic applications.
IJERA (International journal of Engineering Research and Applications) is International online, ... peer reviewed journal. For more detail or submit your article, please visit www.ijera.com
Performance Analysis of Mobile Security Protocols: Encryption and Authenticat...CSCJournals
Due to extremely high demand of mobile phones among people, over the years there has been a great demand for the support of various applications and security services. 2G and 3G provide two levels of security through: encryption and authentication. This paper presents performance analysis and comparison between the algorithms in terms of time complexity. The parameters considered for comparison are processing power and input size. Security features may have adverse effect on quality of services offered to the end users and the system capacity. The computational cost overhead that the security protocols and algorithms impose on lightweight end users devices is analyzed. The results of analysis reveal the effect of authentication and encryption algorithms of 2G and 3G on system performance defined in terms of throughput which will further help in quantifying the overhead caused due to security.
A Novel Structure with Dynamic Operation Mode for Symmetric-Key Block CiphersIJNSA Journal
Modern Internet protocols support several modes of operation in encryption tasks for data confidentiality
to keep up with varied environments and provide the various choices, such as multi-mode IPSec support.
To begin with we will provide a brief background on the modes of operation for symmetric-key block
ciphers. Different block cipher modes of operation have distinct characteristics. For example, the cipher
block chaining (CBC) mode is suitable for operating environments that require self-synchronizing
capabilities, and the output feedback (OFB) mode requires encryption modules only. When using
symmetric-key block cipher algorithms such as the Advanced Encryption Standard (AES), users
performing information encryption often encounter difficulties selecting a suitable mode of operation.
This paper describes a structure for analyzing the block operation mode combination. This unified
operation structure (UOS) combines existing common and popular block modes of operation. UOS does
multi-mode of operation with most existing popular symmetric-key block ciphers and do not only consist
of encryption mode such as electronic codebook (ECB) mode, cipher block chaining (CBC) mode, cipher
feedback (CFB) mode and output feedback (OFB) mode, that provides confidentiality but also message
authentication mode such as the cipher block chaining message authentication code (CBC-MAC) in
cryptography. In Cloud Computing, information exchange frequently via the Internet and on-demand.
This research provides an overview and information useful for approaching low-resource hardware
implementation, which is proper to ubiquitous computing devices such as a sensor mote or an RFID tag.
The use of the method is discussed and an example is given. This provides a common solution for multimode and this is very suitable for ubiquitous computing with several resources and environments. This
study indicates a more effectively organized structure for symmetric-key block ciphers to improve their
application scenarios. We can get that it is flexible in modern communication applications.
IRJET- Data Embedding using Image SteganographyIRJET Journal
This document presents a method for secure communication using both steganography and cryptography techniques. It discusses embedding encrypted text into an image using discrete wavelet transform (DWT). Specifically, it first encrypts a text message using the advanced encryption standard (AES) algorithm. It then embeds the encrypted text into an image by applying DWT to decompose the image into sub-bands and hiding the data in the high frequency sub-bands. MATLAB is used to implement a graphical user interface that allows a sender to encrypt a message, embed it into an image, and send the stego-image to a receiver. The receiver interface extracts the encrypted text from the stego-image and decrypts it using AES. The method aims to
1. CH.Gopi, M. Veda Chary, M.A. Khadar Baba / International Journal of Engineering Research
and Applications (IJERA) ISSN: 2248-9622 www.ijera.com
Vol. 3, Issue 1, January -February 2013, pp.1135-1140
Microcontroller Based Cryptosystem With Key Generation Unit
CH.Gopi 1, M. Veda Chary2*, M.A. Khadar Baba 3
1
M. Tech (ES) Final Year, Assoc. Professor, 3 Professor & HOD,
2
Dept. of ECE, CMR College of Engineering & Technology, Hyderabad, Andhra Pradesh
Abstract:-
The embedded based applications need communication (RF transmission) and the proposed
sensitive data transfer between different nodes. In system uses KGU to increase the key security further.
order to increase the speed and to reduce the The work also extends with the randomness test for
hardware complexity, this proposed system the generated key using the principle component
focuses on the light weight security algorithm Tiny analysis method. This above research work uses
Encryption. Algorithm TEA which can be 89c51 microcontroller and the performances are
implemented in microcontroller to adapt with analyzed by implementing the KGU with TEA which
many real time constraints such as memory, data offers moderate security and simplicity in
loss and low cost. The additive feature of this implementation processes. In this paper, section 2
proposed system is that it uses Key Generation deals with the related works, section 3 describes the
Unit (KGU) to produce the random key to make it implementation of TEA with KGU. The section 4
optimal for sensitive data transfer in many real- explores the performance analysis and the results of
time applications. This above work uses proposed system. The conclusion is drawn in section
microcontroller and the performances of this 5.
cryptosystem is analyzed by implementing the
cryptographic algorithm TEA with key generation II. RELATED WORKS :
unit. The key generation unit uses the timers in The software analysis of different block
microcontroller to generate the random bits. The ciphers using 8-bit AVR microcontroller were
work extends with implementing the two different presented in. The performance of these block ciphers
modes of communication serial (UART) and are compared with that of the Advanced Encryption
wireless transmission (RF) to transfer the data Standard (AES) implementation and it has been
from encryption unit to decryption unit. proved that TEA consumes less memory than all the
others. The implementation of TEA [2] is discussed
I INTRODUCTION: using PIC18F4550 and shows that it can operate at
The communication system which requires 586 bytes per second. In [8], the unpredictable
sensitive data transfer uses secured cryptographic voltage oscillation signals generated by the oscillator
algorithms to convert the data into an unrecognizable are used to generate random bits and uses n number
format. These algorithms are classified into of oscillators to get the sample values. These values
symmetric and asymmetric, which employs private are fed to LFSR to produce robust random numbers.
and public keys respectively. The symmetric cipher is The proposed paper presents the implementation of
further classified into stream and block ciphers. This TEA with KGU in microcontroller with reduced cost
proposed paper focuses on the block cipher which and increased speed which makes it suitable for many
allows feasibility for the key generation and these area and cost constraint applications such as RFID
generated keys are used for cryptographic and wireless communications.
applications with reduced hardware complexity. In
the existing system, the hardware implementation of III. IMPLEMENTATION OF TEA WITH
block ciphers has limited feasibility in scheduling the KGU
key which is the primary resource for high secured A. Tiny Encryption Algorithm
data transfer. Since the existing system uses TEA offers Shannon's twin properties of
predefined key for the encrypting process, the system diffusion and confusion using the mixed (orthogonal)
can offer narrowed security level though they use algebraic groups, to improve the security. Due to this
complex security algorithms. The major drawback in feature, the TEA is a light weighted cryptographic
the existing system is that there is no key generation algorithm which makes it suitable for many real time
unit to increase the efficient change of key parameter area constraint applications. The figure 1 shows the
for a secured data transfer. The proposed system architecture for TEA encryption process.
implements the above statements using the light
weighted, secure and efficient block cipher TEA with
different modes of communication. The two modes of
communication include serial (UART) and wireless
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and Applications (IJERA) ISSN: 2248-9622 www.ijera.com
Vol. 3, Issue 1, January -February 2013, pp.1135-1140
Figure 1 TEA Encryption Process
Figure 2 TEA Decryption Process
TEA operates on 64 (block size) data bits at a time
using a 128-bit key with 32 rounds. TEA is an
Since, the TEA has a Feistel structure the reverse
iteration cipher, where each round i has inputs M0[i-
operation of encryption process is performed to
1] and M1[i-1] as in (2) and (3), which is derived
obtain the plain text in the decryption process.
from the previous round. The subkey K[i] is derived
from the 128 bit overall K. The constant delta (_) in
B. Block Description for TEA with KGU
(1), is the derivative of golden number ratio to ensure
that the subkeys are distinct.
The main block diagram of “MICROCONTROLLER
BASED CRYTOSYSTEM WITH KEY
GENERATION UNIT” is depicted in the figure 3,
which shows the complete operation of the system.
The principle feature of this system is the usage of
KGU to generate the random bits which is used as a
key for security algorithm. The security algorithm is
chosen in such way that it occupies reduced area and
time constraints, with high performance. TEA is such
block cipher which is known for its high security with
The single TEA round function performs the simple reduced area.
mixed orthogonal algebraic functions such as
Right/Left shifts, Integer addition and exclusive – or
operations. The steps carried out in round function:
1. The one half M1[i-1] of the block cipher is Left
shifted by 4 times and Right shifted 5 times.
2. The left shifted block is added with the subkey K0
and right shifted block is added with the subkey K1.
3. It is also added with the constant delta value
DELTA[i] which is the multiples of delta, where I
represents the number of iterations.
4. The results are then Ex–ORed and added with the
other half of the block cipher M0[i-1] which produces Figure 3 Block Diagram of TEA with KGU
one half of the block cipher M0 for next iteration.
5. Similar operations are performed for the next half The encryption unit receives the key from
round function with the above result. KGU to encrypt the data. It has the feasibility to
choose either of the modes of transmission, in
Finally, the Ex–ORed result is added with the first additive with the option of choosing the
half of the block cipher M1[i-1] to produce the next predefined/currently generated key. When the system
half block M1 for the further rounds. Similar is working with serial mode of transmission, the key
operations are performed for decryption process and cipher text along with mode are transmitted
which is described in figure 2. In this case, the through the serial port. In case of RF transmission
constant delta value DELTA(i-1) is “C6EF3720”, mode, the decryption unit receives the above data
where „i‟ represents the number of iterations. In each through wireless communication.
iteration, the delta value “9E3779B9” is subtracted
with the constant delta value. The algorithm is implemented using Atmel 89c51
with reduced code size and increased speed. The
performance of the system is discussed in the
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3. CH.Gopi, M. Veda Chary, M.A. Khadar Baba / International Journal of Engineering Research
and Applications (IJERA) ISSN: 2248-9622 www.ijera.com
Vol. 3, Issue 1, January -February 2013, pp.1135-1140
following chapters, based on the number of cycles it normal timer operation, then the sample values are
takes to execute the encryption and decryption taken from the timers whenever it is required, as per
process, throughput and code size. The speed of the the table I whereas, the timer1 is not used for the
controller varies depend upon crystal frequencies (say generation of first key.For the initial value of second
24MHz,12MHz).The block comprises of the key, the timer1 uses the LSB (16-bit) value of most
following units: recently updated cipher txt. This value is then
replaced by the LSB of updated cipher text, for the
1. KGU next key generation, and this repeats for every key
2. Encryption unit generation process. The control unit is used to select
3. Decryption unit either of the timer values to take the samples. These
1) KGU: The KGU is implemented using timers in generated keys are then stored in the EEPROM for
the microcontroller to generate the random bits. The the use of decryption process. The advantage of using
generated random numbers acts as a key for block such method will increase the strength of the key
cipher and is stored in EEPROM, so that the key is generation unit and makes it more complex for
secured and it is then transferred to the decryption related key attacks.
unit. The figure 4 depicts the block diagram of the
KGU. 2) Encryption Unit: The figure 5 shows flow chart
for the encryption unit which illustrates the overview
of the encryption block. As it is described in the flow
diagram, the encryption process starts with the
operation of key generation followed by receiving the
plain text, performs TEA encryption process and
selects the mode of communication (RF & Serial) to
transmit the data to decryption unit. Finally, display
the encrypted result in LCD and repeats the above
process. Figure 5
The function of the key generation unit is shown in
figure 6. The function starts with initializing the
Figure 4 KGU
timer0 and number of samples for both the timers
(Timer0 & Timer1). The timers generate the random
The KGU uses the in-built timers (T0 & T1)which
bits of size 16-bit. The random bits from the timers
accept the input from the crystal oscillator by
are stored in the RAM until the sample count reaches
dividing its value by 12. In order to generate 128 bit
zero. The pattern for these sample values are shown
key from 16 bit timers, it has to take 8 samples from
in the table I
the timer. These sample values are taken from the
timers, as per the table I.
TABLE I. SAMPLE VALUES
The table I indicates the number of samples to be
taken from each timer. This repeats for every 8 set of
keys. The initial value for the timer0, to generate the Figure 5 Flow chart for Encryption Unit
first key is predefined and its starts running with the
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4. CH.Gopi, M. Veda Chary, M.A. Khadar Baba / International Journal of Engineering Research
and Applications (IJERA) ISSN: 2248-9622 www.ijera.com
Vol. 3, Issue 1, January -February 2013, pp.1135-1140
. The sample count is initialized as 8 to get 128-bit The figure 7 represents the flow of RF transmitter. It
key. The counter is decremented and once the sample requires a RF encoder to make compatible with the
count reaches zero, the sample values of the timers RF transmitter. The steps involved with the serial
are reinitialized, where the timer1 is initialized with communication are shown in figure 8, which includes
the LSB of updated cipher text for the generation of the initialization of timers. This process involves with
next set of random bits as it is described in the KGU. the mode and cipher text whereas, the key is stored in
EEPROM which is used later for the decryption
This below process is done only when the user process.
prefers to generate a new set of random bits otherwise
it uses the predefined random bits.
Figure 6 Flow chart for Key Generation Unit Figure 8 Flow chart for Serial Communication
3) Decryption Unit: The processes performed by the
decryption unit are shown in the figure 9. The two
different modes of operations that are performed in
this unit are normal and interrupt modes. The normal
mode deals with the RF transmission and interrupt
mode performs the serial data transfer which receives
the data through UART. In the case of serial
communication it requires to receive the key from
EEPROM to perform TEA decryption process. The
LCD is used to display the received cipher text, key
and the decrypted text (plain text).
Figure 7 : Flow chart for RF Transmitter
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5. CH.Gopi, M. Veda Chary, M.A. Khadar Baba / International Journal of Engineering Research
and Applications (IJERA) ISSN: 2248-9622 www.ijera.com
Vol. 3, Issue 1, January -February 2013, pp.1135-1140
time, it is very high when compared with TEA
processes.
TABLEIV.PERFORMANCE ANALYSIS OF
KGU UNIT
The table V shows the encryption module along with
the KGU, TEA, I2C and Serial units, whose
Figure 9 Flowchart for Decryption Unit
throughput is 17516.65bps in 24MHz and 8758.38bps
in 12MHz.
IV. PERFORMANCE ANALYSIS OF TEA
TABLEV. PERFORMANCE ANALYSIS OF
IMPLEMENTATION :
ENCRYPTION MODULE :
The performance analysis of TEA encryption is
shown in the table II in terms of code size, machine
cycles, throughput and execution time with the
upgraded performance. From the table it is inferred
that the throughput is improved to 10308.23bps in
24MHz and 5154.22bps in 12MHz. The additive
upgraded result with the execution time is that the
time is decreased down to 47.71%.
TABLEII. PERFORMANCE ANALYSIS OF
TEA ENCRYPTION UNIT A. Randomness Test Results for Generated Random
Bits : The figure 10 shows the randomness test result.
The result is obtained from the Unscrambler 9.8
software using the Principle Component Analysis
method. It is also proved that the proposed method
(Cipher mix random bits) provides better result with
distinct random bits.
Similar comparison is made with the TEA decryption
which is illustrated in the table III whose upgraded
performance of throughput is increased to 88.90%
and the execution time is decreased down to 47.31%.
TABLE III. PERFORMANCE ANALYSIS OF TEA
DECRYPTION UNIT
Figure 10 Randomness test results for KGU –
Cipher mix random bits
B. Simulation Results :
The figure 11, 12 and 13 shows the simulation results
for KGU, TEA encryption and decryption units
The performance of KGU is depicted in the table IV respectively.
whose throughput is 1641025.64bps in 24MHz and
820512.82bps in 12MHz. In the case of execution
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6. CH.Gopi, M. Veda Chary, M.A. Khadar Baba / International Journal of Engineering Research
and Applications (IJERA) ISSN: 2248-9622 www.ijera.com
Vol. 3, Issue 1, January -February 2013, pp.1135-1140
Therefore, the system is suitable to implement in the
high secured low cost applications. The
implementation of TEA using AT89C51 is to reduce
the cost of the system. The application includes
various wired and wireless communications which
requires secured data transfer
REFERENCES :
[1] Soren Rinne, Thomas Eisenbarth, and Christof
Paar, “Performance Analysis of Contemporary
Light-Weight Block Ciphers on 8-bit
Microcontrollers”, Horst Gortz Institute for IT
Security Ruhr University Bochum 44780
Bochum, Germany.
[2] Edi Permadi, “The Implementation of Tiny
Figure 11 Simulation Result for KGU Encryption Algorithm (TEA) on PIC18F4550
microcontroller”, Electrical Engineering 2005,
President University.
[3] Devesh C. Jinwala, Dhiren R. Patel, Department
of Computer Engineering S. V. National
Institute of Technology, INDIA; Kankar S.
Dasgupta Space Applications Centre, Indian
Space Research Organization, INDIA,
“Investigating and Analyzing the Light-weight
ciphers for Wireless Sensor Networks”, March
10, 2009.
[4] Thomas Eisenbarth, Ruhr University Bochum;
Sandeep Kumar, Philips Research Europe;
Christof Paar and Axel Poschmann, Ruhr
University; Bochum Leif Uhsadel, Catholic
University of Leuven, “A Survey of
Lightweight-Cryptography Implementations”,
Figure 12 Simulation Result for TEA Encryption IEEE Design & Test of Computers dtco-24-06-
Unit pos.3d 4/10/07.
[5] P.Israsena, Thailand IC Design Incubator
(TIDI) National Electronics & Computer
Technology Center (NECTEC), “Design and
implementation of low power hardware
encryption for low cost secure RFID using
TEA”, 2005 IEEE ICICS.
[6] Issam Damaj, Samer Hamade and Hassan Diab
“Efficient tiny hardware cipher under verilog”,
in High Performance Computing & Simulation
Conference, 2008.
[7] Laszlo Hars, Cortlandt Manor, NY (US),
“Switching electronic circuit for Random
Number Generation”, US Patent August 3,
2004.
[8] Laszlo Hars, Cortlandt Manor, NY
Figure 13 Simulation Result for TEA Decryption (US),”Latching electronic circuit for random
Unit number generation”, US Patent October 17,
2006.
[9] David A.Carlson, Haslet, TX (US); Gregg
V. CONCLUSION
A.Bouchard. Round Rock,TX (US); Anand
The system employs the utilization of TEA
algorithm, which is a light-weight block cipher and Varadharajan Framingham, MA (US); Derek S.
Brasili. Westminster,MA (US), ”Random
offers low power and area consumption with
moderate security. The additional feature of this Number Generator”, US Patent
system is the usage of KGU to generate the random October11,2005..
key which still improves the security of data transfer.
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