The document discusses the architecture and functional block of the TMS320C54xx digital signal processors, focusing on the multiplier/adder unit and its components, including data addressing modes. It outlines seven basic addressing modes for accessing operands, including immediate, absolute, accumulator, and indirect addressing. Additionally, the learning outcomes emphasize understanding the MAC unit and addressing modes of the TMS320C54xx devices.

1. Department of Collegiate and Technical Education
DSPALGORITHM AND ARCHITECTURE
(15EC751/17EC751/18EC734)
Module 3
PROGRAMMABLE DIGITAL SIGNAL
PROCESSORS
SESSION 3
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2.  To understand the architecture functional block of
MAC and data addressing modes of TMS320C54xx
processors.
Learning objectives
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3.  Functional block of MAC of TMS320C54XX
Data Addressing Modes of TMS320C54xx
Table of Content
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4. Multiplier/Adder Unit(MAC Unit)
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5.  The kernel of the DSP device architecture is
multiplier/adder unit. The multiplier/adder unit of
TMS320C54xx devices performs 17 x 17 2’s complement
multiplication with a 40-bit addition effectively in a
single instruction cycle.
 In addition to the multiplier and adder, the unit consists of
control logic for integer and fractional computations and a
16-bit temporary storage register, T.
 The compare, select, and store unit (CSSU) is a hardware
unit specifically incorporated to accelerate the
add/compare/select operation
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6.  This operation is essential to implement the Viterbi
algorithm used in many signal-processing applications.
 The exponent encoder unit supports the EXP instructions,
which stores in the T register the number of leading
redundant bits of the accumulator content.
 This information is useful while shifting the accumulator
content for the purpose of scaling.
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7. Data Addressing Modes of TMS320C54X
Processors
Data addressing modes provide various ways to access operands to execute instructions and place
results in the memory or the registers. The 54XX devices offer seven basic addressing modes
1. Immediate addressing.
2. Absolute addressing.
3. Accumulator addressing.
4. Direct addressing.
5. Indirect addressing.
6. Memory mapped addressing
7. Stack addressing.
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8. Immediate addressing:
The instruction contains the specific value of the operand. The operand
can be short (3,5,8 or 9 bit in length) or long (16 bits in length). The
instruction syntax for short operands occupies one memory location
and long operand occupies two memory locations. This addressing
modes can be used to initialize registers and memory locations.
Example: LD #20, DP.
RPT #0FFFFh.
Absolute Addressing:
The instruction contains a specified address in the operand.
1. Dmad addressing (data memory location): This uses specific value
to specify an address in data space. The syntax for dmad addressing
uses a symbol or a number to specify an address in data space.
MVDK Smem,dmad
MVDM dmad,MMR
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9. 2. Pmad addressing(program memory location):This uses specific value to
specify an address in program space. The syntax for pmad addressing uses a
symbol or a number to specify an address in program space.
MVDP Smem, pmad
MVPD pmem, Smad
3. PA addressing(port address):This uses specific value to specify an an
external I/O port address. The syntax for PA addressing uses a symbol or a
number to specify the port address.
PORTR PA, Smem,
4. *(lk) addressing(a location in the data space specified directly)
Example:
MVKP 1000h, *AR5 ; 1000 H *AR5 (dmad addressing)
MVPD 1000h, *AR7 ; 1000h *AR7 (pmad addressing)
PORTR 05h, *AR3 ; 05h *AR3(PA addressing)
LD *(1000h), A ; *(1000h) A(*(lk) addressing)
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10. Accumulator Addressing:
Accumulator content is used as address to transfer data
between Program and Data memory. Examples of
instructions in this mode are READA and WRITA. READA
transfers a word from a program-memory location specified
by accumulator A to a data memory location. WRITA
transfers a word from a data memory location to a program-
memory location specified by accumulator A.
Ex: READA *AR2
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11. LEARNING OUTCOME
Able to understand and remember the
architecture functional block of MAC
To understand and remember the addressing
modes of TMS320C54XX device.
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12. REFERENCES:
“Digital Signal Processing”, Avatar Singh and S.
Srinivasan, Thomson Learning, 2004.
REFERENCE BOOKS:
1.Digital Signal Processing: A practical approach, Ifeachor
E. C., Jervis B. W Pearson- Education, PHI/ 2002
2.“Digital Signal Processors”, B Venkataramani and M
Bhaskar TMH, 2002
3. “Architectures for Digital Signal Processing”, Peter Pirsch
John Weily, 2007
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13. CHAIRMAN : Dr. Rangaraju
H.O.D : Dr Revanna C R
Content Developer: Prof.Hemanth kumar C S
Moderator: Prof.Hemanth Kumar C S
Prof. Roopashree D
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14. QUESTIONS ?
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