The document outlines the experience and qualifications of Deep Banerjee, including over 2 years of experience in analog IC design working on projects such as a boost regulator and bandgap reference circuit. Deep holds an M.Tech in Microelectronics and VLSI from IIT Bombay and currently works as a design engineer focusing on projects involving wire-free charging and USB boost converters. Deep has expertise in analog/mixed-signal design and tools such as Cadence Virtuoso.

1. Deep Banerjee G3, Parimala Elan, Hemantnagar
M.Tech. (Microelectronics and VLSI) Marathahalli, Bangalore
Department of Electrical Engineering Phone: 9900457774
Indian Institute of Technology, Bombay Email: i.deep28@gmail.com
SUMMARY
• 2+ years of experience in Analog IC Design
• Designed a Boost Regulator, which has been fabricated & validated in 180nm process
• Designed a Bandgap Reference circuit, which was fabricated & validated in 16-FF Technology node
• Experienced with AMS tools like Cadence-Virtuoso & Calibre
• M.Tech. in Microelectronics & VLSI from IIT Bombay with M.Tech. project on SERDES Receiver
OBJECTIVE
To learn about and participate in all the aspects of designing an Integrated Circuit & develop my understanding
of Analog Design Fundamentals
AREAS OF INTEREST
Analog/Mixed-Signal/RF IC Design
PROFESSIONAL EXPERIENCE
Cirel Systems, Bangalore [May,2014 - Till Date]
Design Engineer, Grade-3
o Contact based Wire-free Charger:
- Currently working on the Architecture of the system. The main challenge in the design is working with a high
supply of 20V without access to high gate-voltage sustainable transistors.
- Working on the spec definition & initial design of sub-blocks like ’Bandgap’, ’LDO’, ’Charge-Pump’ & driver
circuits.
o Wireless Charger for wearable products:
- Prepared & presented a company-wide talk on the topic. The talk covered the basic principles of wireless
charging, viz. induction & resonance, industry standards, viz. Qi & A4WP, basic block diagram of the system
with an introduction to the basic blocks involved and a survey of the existing receiver architectures.
o Boost Converter to power USB devices for TabletPMIC product:
- Am the block owner of the USB-Boost converter for the TabletPMIC product of the company. It’s a PWM
based, current mode control, Boost regulator which supports USB 2.0 & 3.0 specs.
- The converter had a lot of functional, performance as well as yield issues in the previous generation. Was
responsible for debugging the issues in the lab & making design changes to rectify them.
- The second generation of the product has been fabricated as well as characterized in the lab.
- Was responsible for building switching & average models for the Boost converter which were used to verify the
overall stability of the converter & for faster sims.
- Major redesign effort was expended on sub-blocks like ’Current-Sense’, ’Power-MOS drivers’, ’PWM-Oscillator’,
’Custom-digital logic’.
- Redesign was also needed to add programmability, testability & trim features to all the sub-blocks in the design.
- Understood the FSM logic of the block, and defined the changes required in the logic, which were then imple-
mented by the digital designer.
- Understood the issues which can be introduced during layout & prepared layout constraints for the layout
engineer.
- Did thorough verification of the block, which included sub-block level & top level spectre as well as AMS sims
& post-layout sims for critical sub-blocks.
- Prepared thorough documentation for the block which includes review slides, reference docs, trim & test pro-
cedure docs etc.
- Was involved in the DQC process of the block in the lab.
- Debugged issues in the new generation & proposed metal changes to rectify them.
- Wrote scripts for licence management & post processing of simulation data, which are now being used company-
wide.
1

2. LSI Research & Developement, Bangalore [July,2013 - May,2014]
Analog/Mixed Signal IP Design Engineer-I
o 16-FF Bandgap & PTAT:
- Designed & Verified a Current Mode Bandgap Reference circuit & a PTAT Bias-Current Generator in the
16-FF technology node which were then fabricated & validated.
EDUCATION
Degree/Exam University Institute Year CPI/%
M.Tech. (Microelectronics) IIT Bombay IIT Bombay 2013 9.59
BE. (Elec. & Comm.) Gujarat University LDRP Institute of Technology & Research 2010 78.4
HSC Gujarat Board Shree Swaminarayan English High School 2006 84.00
SSC Gujarat Board M.B. Patel English High School 2004 88.00
Secured All India Rank 11 in GATE-2011, Electronics & Communication among 137,853 candidates.
MAJOR PROJECTS
• M.Tech Project :
Design of Receiver for Multilane, Serial I/Os for chip to chip communication
Guide: Prof. Maryam Shojaei Baghini and Prof. D. K. Sharma
Tools: Cadence-Virtuoso and Calibre Standard: JESD 204B Technology: ST Microelectronics 65nm
o The objective of the project was to design high speed, low power receiver for off-chip communication for
line lengths of 20 cm and datarates of 6.25 Gbps through 12.5 Gbps
o Schematic level design and layout of a Rx-LFFE (Receiver-Side Linear Feed-Forward Equalizer) which
resolves completely closed eye, for Transmitter swing of 200 mV & data rate 14 Gbps across all process
corners was done
o Schematic level design and layout of High Speed Comparator & Latch with maximum throughput of 16
Gbps across all process corners was done
o Schematic level design and layout of Offset Compensation Circuit capable of compensating for input offset
voltages of upto 60 mV was done
• R&D Project: Design of co-processor for the ARM microprocessor
Guide: Prof. D.K. Sharma
Designed a dedicated Encryption Coprocessor for the ARM using the DES encryption algorithm.
• B.E. Project:
Electronic Voting Machine using the ATMEL 89S8252 Microcontroller
M.TECH COURSES
o CMOS Analog VLSI Design o VLSI Design o VLSI Design Lab
o Mixed Signal VLSI Design o Systems Design o RF Microelectronics Chip Design
o Microelectronics Simulation Lab o Solid State Devices o VLSI Technology
o Digital Signal Processing and its Applications
TECHNICAL SKILLS
• Tools:
o Cadence-Virtuoso: Proficient with the Cadence AMS tool-set;
o Cadence-Calibre: Experienced with Layout design along with DRC & LVS;
o Also familiar with MATLAB, Xilinx-IDE, Altera-Quartus & NGSpice
• Languages: Verilog (digital & analog) and VHDL (HDL), 8051 and 8085(Assembly), C, Awk, Shell, Perl
(Scripting & Programming)
2