This document summarizes a student project on a multilevel inverter topology with reduced switch count. It presents the design of a three-phase 15-level voltage source inverter using three DC voltage sources and 10 switches. Simulation results show that this topology reduces total harmonic distortion to 4.71% compared to 72.86% for a two-level inverter. While requiring more switches, multilevel inverters allow generating higher voltages using lower-rated devices and produce waveforms closer to sinusoidal with lower harmonic losses.

1. DEPT: OF ELECTRICAL ENGINEERING
Multilevel Inverter Topology With Reduced Switch Count
Presentation by:
Ayush Jindal
Shashank Bhadouria
Ruhi Jain
Anjali Garg
Project Guide:
Dr. Prashant Singh Rathod
Dr. Deepak Verma
Dr. Aprajita Panday

2. Abstract
Nowadays multilevel inverters are a very attractive solution for medium-voltage high
power conversion applications; they convert DC power to AC power at required output
voltage and frequency level. Three-phase Multilevel Inverter (MLI) are used in many
medium and high-power applications such as motor drives and grid connected
systems. There are numerous Pulse Width Modulation (PWM) techniques for
MLIs.This technique is recommended to improve the performance of inverter and to
eliminate the filtering requirements.
The topology used here is that of H bridge inverter. In this, separate DC sources are
used for each H bridge. If the value of DC voltage is same in all the bridges, then it can
simply be called as a cascaded multilevel inverter. In case of different DC voltage
being used in different H bridges, then it is called a Hybrid multilevel inverter.

3. INTRODUCTION
❖ Inverters convert DC voltage to variable magnitude,
variable frequency AC voltage.
❖ Ideally, purely sinusoidal output voltage.Practically not
possible.
❖ PWM Techniques makes the task of extracting sinusoidal
voltage from output of inverters easier.

4. Drawbacks of two-level VSIs for MV Drives
● High dv/dt in the inverter output voltage – as high as
10,000V/µs
● Motor harmonic losses
This can be solved by adding properly tuned LC filter.
It has some disadvantages
● Increased manufacturing cost
● Fundamental voltage drop
● Circulating current between the filter and DC circuit

5. Why Multilevel Inverter Topology With Reduced Switch
Count ?
In order to overcome the problem of distortion in the output voltage
waveform caused due to the presence of harmonics, this project proposes
the modelling an Inverter with three dc voltage sources and ten switches
to synthesize 15 levels across the load using MATLAB/SIMULINK.
The objectives of the work area:
● To study and simulate a three phase 15 level Voltage Source Inverter.
Comparison in performance of two-Level inverters.
● To understand and implement Pulse Width Modulation for minimization of filtering
requirements

6. Multilevel Voltage Source Inverter
Multi-level inverters are the preferred choice in industry
for the application in High voltage and High power
application
Advantages of Multi-level inverters
● Higher voltage can be generated using the devices of lower rating.
● Increased number of voltage levels produce better voltage waveforms and
reduced THD.
● Switching frequency can be reduced for the PWM operation.

7. The three basic and popular MLI topologies used in commercial
application since last few decades:-
1. Neutral Point Clamped (NPC)
2. Flying Capacitor (FC)
3. Cascade H-Bridge (CHB)

8. STRUCTURE OF OUR WORK

9. SWITCHING SCHEME

12. SIMULATION MODEL

13. Pulse Width Modulation: For Positive Cycle

14. Pulse Width Modulation: For Negative Cycle

15. For Instance : PWM-S1

16. OUTPUT

17. ADVANTAGES:
➢ Better waveform quality of output voltage (more sinusoidal).
➢ Reduced dV/dt, leading to reduction in EMI.
➢ Multilevel converters produce smaller CM voltage; therefore, the
stress in the bearings of a motor connected to a multilevel motor drive
can be reduced.
➢ Lower voltage rating devices can be used.
DISADVANTAGE:
➢ More number of power semiconductor switches are needed.
➢ Some configurations need more than one isolated DC supply.

18. RESULT AND CONCLUSION
Two level Inverter Five level Inverter Fifteen level Inverter
THD was around 72.86%. THD is around 35.41%. THD is around 4.71%
Applicable for low
power ratings.
For higher power ratings Application in high power
ratings
Less number of
switches required
Requirement of more number
of switches
Requirement of circuit
components increases with
increase in levels of the
inverter
Efficiency is around 50% Efficiency is around 83.75% Efficiency is around 98.19%

19. CONCLUSION AND DISCUSSION
➢ As the number of level increases, THD decreases and active
power increases.
➢ The output waveforms of the voltage and load current are also
approximated sine wave.
➢ Increasing the number of voltage levels in the inverter without
requiring higher rating on individual devices can increase power
rating.
➢ Earlier simulated Three-phase Fifteen level Inverter results has
been compared to three phase five level inverter and it is found
that the total harmonic distortion has been reduced by 31.1%.

20. FUTURE SCOPE
● The THD can be further reduced by increasing the number of inverter
levels.
● More efficient control Techniques such as Space Vector modulation
can be implemented.
● Suitable filter design for further improvement of output voltage.
● Implementation of hardware circuits .