1. Accounting for Copper Surface Roughness
for Close Correlation
between Simulation
and Measurement
in a 10Gbps
Package Channel
Jacov Brener, PHY EM Design Engineer
Intel Corporation, Datacenter and Connected Systems Group,
Communication & Storage Silicon Engineering

2. • Motivation
• Measurement setup and results
• Initial correlation results
• Surface roughness Hall-Huray model
• Surface roughness measurement
• Final correlation results
• Summary
• Q&A
Agenda
2
J. Brener, “Accounting for Copper Surface Roughness for Close Correlation between
Simulation and Measurement in a 10Gbps Package Channel”, November 26th 2013

3. Motivation
• TP1 is on the DUT balls [1]
• The only high speed channel
exits in the test is package
channel
• Need to account for package
impact on waveform jitter, rise
time, amplitude etc…
3
J. Brener, “Accounting for Copper Surface Roughness for Close Correlation between
Simulation and Measurement in a 10Gbps Package Channel”, November 26th 2013
TP1
Silicon
Package
Board
PTH
BGA
C4 bumps
Trace

4. Motivation
cont.
• A typical 10mm package has BW of at
least 20GHz
• Package effects mostly on waveform
on the balls so we’ll focus on ILdiff
magnitude
100GHz 3D full wave typical
package channel model
4
J. Brener, “Accounting for Copper Surface Roughness for Close Correlation between
Simulation and Measurement in a 10Gbps Package Channel”, November 26th 2013

5. Measurement Setup and Results
• 4 port 20GHz equipment
• SOLT calibration
• Dual side probing station
5
J. Brener, “Accounting for Copper Surface Roughness for Close Correlation between
Simulation and Measurement in a 10Gbps Package Channel”, November 26th 2013
VNA
Package
Probes

6. Measurement Setup and Results
cont.
• Low measurement noise
• Low package to package variation
• Good measurement repeatability
6
J. Brener, “Accounting for Copper Surface Roughness for Close Correlation between
Simulation and Measurement in a 10Gbps Package Channel”, November 26th 2013

7. Initial Correlation Results
• Small correlation error in DC due to inaccuracy of the field solver
• Nearly linear increase in the correlation error – looks like a loss mechanism
• ~12.5% error @20GHz
7
J. Brener, “Accounting for Copper Surface Roughness for Close Correlation between
Simulation and Measurement in a 10Gbps Package Channel”, November 26th 2013

8. Initial Correlation Results
cont.
• Cross section of package traces were made to
debug the correlation error
• Copper surface roughness was discovered to
be on the order of skin depth in GHz range
• Both on the traces an the planes found to be
equally rough
• Same phenomena occurs on boards and was
discussed extensively in DesignCon [2]
8
J. Brener, “Accounting for Copper Surface Roughness for Close Correlation between
Simulation and Measurement in a 10Gbps Package Channel”, November 26th 2013

9. Surface Roughness Hall-Huray Model
• Traditional Hammerstad model describes
surface roughness as a repeating series of
peaks and valleys [3]
• Models the surface as a 1 dimensional
effective cross section [3]
9
RMSh
0
2
2
1 arctan 1.
2
4Hammerstad
smooth
r
rough
skin
smooth
RMS
r
skin
f
h
f




 

  
    
   
J. Brener, “Accounting for Copper Surface Roughness for Close Correlation between
Simulation and Measurement in a 10Gbps Package Channel”, November 26th 2013

10. 2
2
2
0
4
3
1
2
2
2
1
Hall Huary
smooth
r
rough
skin
smooth
r
r
r
skin skin
f
a N
s
A
s
f
a a






 


 
 
Surface Roughness Hall-Huray Model
cont.
• Hall-Hurray model models a 2 dimensional
surface [4]
• Describes the surface as an effective matrix of
half-spheres [4]
10
a
J. Brener, “Accounting for Copper Surface Roughness for Close Correlation between
Simulation and Measurement in a 10Gbps Package Channel”, November 26th 2013
N half-spheres
per area A

11. Surface Roughness Measurement
• Copper surface was exposed from
the dielectrics [5]
• SEM (Scanning Electro Microscopy)
pictures were taken to visualize the
phenomena [5]
• AFM (Atomic Force Microscopy) 3D
profile map was taken for analysis [5]
11
J. Brener, “Accounting for Copper Surface Roughness for Close Correlation between
Simulation and Measurement in a 10Gbps Package Channel”, November 26th 2013

12. Surface Roughness Measurement
cont.
Results obtained from AFM [5]:
• RMS: RMS height
• SAD: Surface Area
Difference
12
N
Z
RMS i
2
)(
( _ _ )
1
( _ )
i
j
real surface area
SAD
scan area
 
  
 


J. Brener, “Accounting for Copper Surface Roughness for Close Correlation between
Simulation and Measurement in a 10Gbps Package Channel”, November 26th 2013

13. Final Correlation Results
Rough trace loss estimation [6]
13
  
   
1
20log
smooth
rough
r
rough
l
f
R
wt
R j L G j C
j
Attenuation dB e 



  
  



  
 

J. Brener, “Accounting for Copper Surface Roughness for Close Correlation between
Simulation and Measurement in a 10Gbps Package Channel”, November 26th 2013

14. • Hall-Huray model usage decreases the error by a factor of 10 up to 13GHz
• Hall-Huray model usage decreases the error at 20GHz to less than 5%
• Hammerstad model is still away from reality
14
J. Brener, “Accounting for Copper Surface Roughness for Close Correlation between
Simulation and Measurement in a 10Gbps Package Channel”, November 26th 2013
Final Correlation Results
cont.

15. Summary
1. Package can and will become important
2. Surface roughness adds significant loss at GHz range
and beyond for any PCB trace
3. Surface roughness can be accurately measured by
AFM
4. Hall-Huray model proven to be effective
5. Accounting for surface roughness decrease
correlation error by x2.5
15
J. Brener, “Accounting for Copper Surface Roughness for Close Correlation between
Simulation and Measurement in a 10Gbps Package Channel”, November 26th 2013

16. Acknowledgments & References
• Acknowledgments:
– Manukovsky Alex, Intel Corp.
– Valentina Korchnoy, Intel Corp.
• References
1. IEEE 802.3-2012, Clause 72
2. E. Bogatin, D. DeGroot, P.G. Huray, Y.Shlepnev, “Which one is better? Comparing options to
describe frequency dependent losses”, DesignCon 2013
3. E. Hammerstad , O. Jensen, “Accurate models for microstrip computer aided design”, IEEE MTT-S
Int. Microw. Symp. Dig., May 1980, pp.407–409.
4. S. Hall, S. Pytel, P. Huray, D. Hua, A. Moonshiram, G. Brist, and E. Sijercic, “Multigigahertz
Causal Transmission Line Modeling Methodology Using a 3-D Hemispherical Surface
Roughness Approach”, IEEE trans. Microwave Theory and Tech., vol.55, no.12, Dec.2007,
pp.2614-2624
5. V. Korchnoy, J. Brener, “A Practical Method for Trace Exposure and Roughness Measurements and
Implementation in High Speed Package Design”, ISTFA 2012, November 2012
6. W.R. Eisenstadt, Y. Eo“S-Parameter-Based IC Interconnect Transmission Line Characterization”,
IEEE trans. Components Hybrids and Manufacturing Tech., vol. 15, no. 4, August 1992, pp483-490
16
J. Brener, “Accounting for Copper Surface Roughness for Close Correlation between
Simulation and Measurement in a 10Gbps Package Channel”, November 26th 2013

17. Thank you!
Q&A