1. University of Minnesota
EE 5164
Semiconductor Properties and Devices II
2015 Project Paper
Introduction to Two-Dimensional Field Effect Transistors
Yi Ren

2. “Pushing” by the Moore’s scaling law for more than 40 years, engineers have
reduced the gate length of the transistor below 30nm[1]. However, there will be
an ultimate limits of the size of the transistors and noted by Gordon Moore
himself on 13 April 2005: “In terms of size (of transistors) you can see that we're
approaching the size of atoms which is a fundamental barrier”[2]. As the most
popular two-dimensional material, graphene successful demonstrated it’s
extraordinary properties in electrical, optical and thermo-mechanical. It creates
a new era for 2-D materials and technically provides an method to achieve 2-
dimensional field effect transistors by using 2-D material, which may reduce the
size of the transistors in atomic levels and finally reach the limitation of the
Moore’s law in few decades. This paper will first give an general description of 2-
D FETs, which includes its general structural and advantage compared with the
conventional FETs. Then I will introduce some properties of graphene and
transition-metal dichalcogenides (TMD), which are the majority components of
nowadays 2-D FETs. Finally the paper will shown several 2-D FETs that based on
different 2-D TMD materials.
From conventional FET to 2-D FET
Field effect transistor is a transistor that uses an electrical field at gate

3. terminal to control the shape of the conductive channel from source to drain and
achieve to control the current flow from source terminal to drain terminal. The
FET has a very high switching current ratio and input resistance, hence, it is
widely applied in the digital circuit especially the integrated circuit. Conventional
field-effect transistors operate on the basis of energy filtering of electrons (or
holes) flowing over a barrier. The barrier is controlled with a voltage and there is
a subthreshold swing (SS) limit that the current can not be changed more than
60 mV/decade[3]. For most of 3-D crystal material, they can not reach this limit
because of the dangling bonds. Hence, they need more voltage to achieve the high
on/off current ratio which means they will have high power consumption. One
way to improve the performance of the conventional transistors is reducing the
dimension of the transistor. By reducing the gate length , the inherent
capacitances and resistances [Fig. 1]

4. Fig. 1 Inherent resistances and capacitances in the n-channel MOSFET structure.[4]
will reduce, which results in a high speed response and low power consumption,
shown in Fig. 2. And the thin channel can against short-channel effects down to
very short gate length [5].
In order to reach the limitation of gate length and thickness of the channel,
engineers finally decide to use 2-D material, which means the channel can be just
one atomic layer thick, to build the FET and this is how 2-D FET comes from.
a

5. b

6. Fig. 2 The performance of transistor versus dimensional. a, cut-off frequency of
different transistors versus gate length [5]. b, the active power performance of
different Intel process [6].
The general idea of the 2-D FETs is that inside of using doped semiconductor
like silicon and gallium arsenide as the channel, they use 2-D material as their
channel. One of the primary advantages of 2-D films is that instead of using
chemical bond, the layers materials are bonded by the van der Waal's (vdW)

7. forces. The absence of dangling bonds can reduce surface roughness scattering
and also reduce the interface traps resulting in high mobilities [7] and eliminate
performance reduce due to interface states [8]. On the other hand, the 2-D FET
have potential to reduce the scale of the transistor into atomic levels, which
means we can fabricate more transistors on one chip and finally reach the
limitation of the Moore’s scaling Law.
As the milestone the of 2-D FET, 2-D material is necessary to be introduced.
The fabrication and performance of the 2-D FET are highly dependent on the
property of the 2-D materials. The next section will introduce two 2-D materials
that are studied extensively for a new generation of ultra thin electronics.
2-D Material
The successful produced and isolated of graphene in 2004 raise a revolution
in science. It shows that when the scale of the conventional material reduce to
atomic level, the special properties will show up. This discovery leads the
scientists to extensively study on 2-D material.
Graphene
Graphene is an allotrope of carbon and is a purely 2-D material. It has
regular hexagons lattice form with a carbon atom at each corner (Fig. 3). One of
the property of graphene that attracts the transistor engineer is its high carrier
mobility at room temperature. Mobilities of 10,000–15,000 cm2
V-1
s-1
are
measured for exfoliated graphene on SiO2-covered silicon wafers[9] and the
recent research measured mobilities of around 23,000 cm2
V-1
s-1
in top-gated

8. graphene MOS channels [5]. Although these value seems attractive, they all
measured the large-area graphene, which is gapless. Large-area graphene is a
zero-gap semimetal, because its conduction and valence bands meet at the Dirac
points on the edge of Brillouin zone (Fig. 3 b(i)).
Fig.3
Properties
of
graphene.
a, structure
of
graphene.
b, Band structure around the K point of (i) large-area graphene, (ii) graphene
nanoribbons, (iii) unbiased bilayer graphene, and (iv) bilayer graphene with an
applied perpendicular field [5].
Zero bandgap means large-area graphene can not be used as the channel
because it can not be switched off. However, there are three possible ways to
open a bandgap on graphene: by reducing the scale of large-area graphene in one
dimension to form graphene nanoribbons, by using electric field to bias bilayer
graphene and by applying strain to graphene. For the first method, when the
width of the nanoribbons reduce below 20nm, the bandgap is in excess of 200

9. meV [5]. But this value can be affect by the roughness of the edge and even
though the edge is perfect, this bandgap is still too small to have a high on/off
current ratio. In addition to that, as the bandgap increasing, the mobility of the
graphene will decrease extremely (200 cm2
V-1
s-1
for a 150 meV bandgap)[10].
The second method needs very high voltage. Theoretically, in order to reach
values of 200–250 meV, we need fields about (1–3)×107
Vcm-1
and third methods
is hard to achieve in practice [5].
Although graphene has extremely high carrier mobility, it is constrained by
its zero-bandgap. Hence, in stead of use graphene as the channel, it can be a good
terminal material of the 2-D FET with very high electron conductivity.
Transition metal dichalcogenides monolayers
The transition metal dichalcogenides monolayers are atomically thin film of
a class of materials with the formula MX2, where M is a transition metal
element(Mo, W, and so on), and X is a chalcogen (S, Se, or Te). One layer of M
atoms is sandwiched between two layers of X atoms by van der Walls interaction
(Fig.4). Compared to graphene, TMD monolayers has good bandgap property
such as MoS2 and WSe2 have direct bandgap in the range of 1.2−1.8eV.

10. Fig.4 Three-dimensional schematic representation and top view of a typical MX2
structure, with the chalcogen atoms (X) in yellow and the metal atoms (M) in blue
[11].
Compared to traditional semiconducting materials such as silicon, Ge, monolayer
TMD films have less surface roughness scattering without dangling bonds and
also reduce interface traps resulting in low density of interface states on the
semiconductor−dielectric interface. Another important feature of 2D TMD films
is their atomic thickness that allows easier control of channel charge by gate
voltage and high degree of vertical scaling that can reduce the short channel
effects [7].
On of the disadvantage of monolayer TMD materials is the low carrier
mobility compared to conventional material like silicon. In order to increase

11. mobility and drive current performance, high dielectric constant dielectric
material, thin nanosheet- thickness and right contact metal should be chosen [7]
[12]. The next section will introduce several 2-D FETs that have different
solutions
Several 2-D FET
MoS2 FET
The basic structure of the MoS2 FET that is fabricated by B. Radisavljevic et al. In
2011 is shown in Fig.5. As you can see,

12. Fig.5 MoS2 monolayer transistors. a, optical image of a single layer of MoS2. b,
optical image of two FET transistors connect in series. c, three-dimensional
schematic view of one of the transistors shown in b [10].
compared to conventional MOSFET, the main difference is that the channel is
replaced by 2-D TMD material. They use monolayer MoS2 and HfO2, which
dielectric constant is 25, as the gate dielectric. The mobility of this single layer
MoS2 transistor is at least 200 cm2
V-1
s-1
and the on/off current ratio is 1×108
at
room temperature [10]. At the bias voltage Vds =500 mV, the maximal measured
on current is 2.5 μA/μm by using Au as the contact metal. This transistor uses
monolayer and high dielectric constant material as gate dielectric to increase the
mobility and its similar to the gaphene nanoribbons channel transistor but has
much higher on/off current ratio. However, the on current is still too small. In
order to improve that driven current, people should find another contact
material that has low contact resistance with MoS2.
A lot of efforts have been devoted toward optimized metal contacts to the
monolayer MoS2 but still can not reach the optimized device performance. By
addressing this challenge in a new strategy, engineers decide to use graphene as
electrodes to get a nearly perfect Fermi level match with MoS2 when in the on-
state [13]. The structure of this MoS2 FET with graphene electrodes shown that
is fabricated by Yuan Liu et al. in 2014 is shown in Fig. 6. According to the
property of the

13. Fig. 6 Schematics of a
BN/graphene/MoS2/BN
sandwich structure with
edge graphene contacts [13].
Graphene, its fermi level can be modified by a gate potential [7]. By using this
method, they get the mobility up to 1300 cm2
V-1
s-1
at very low temperature (less
than 10K) and they get the zero contact barrier with MoS2 at 1.9K. This method
give the engineers a hint of finding new contact material with atomic 2-D
material.
WSe2 FET
The structure of back-gated WSe2 FET that is fabricated by Wei Liu et al. in
2012 is shown in Fig. 7. In their experiment, they use the ab initio density
functional
a
b

14. Fig. 7 Back-
gate WSe2
monolayer
transistor. a,
schematic of
back-gated
WSe2
monolayer FET, highly n-doped silicon serves as back gate. b, optical image of fabricated
WSe2 monolayer FETs. [7]
theory (DFT) calculations indicate that the d-orbitals of the contact metal is the
key point to form low resistance ohmic contacts with monolayer WSe2 [7]. Based
on this theory, they found the indium (In) results in a small contact resistance
with WSe2. Their back-gated In-WSe2 FET has a record on current of 210 μA/μm
and the mobility of 142 cm2/V·s with an on/off current ratio exceeding 106
[7].
Completely 2-D FET
The 2-D FET that I introduced above only have 2-D materials in their
channel, but this completely 2-D FET that is fabricated by Tania Roy et al. in 2014
shown in Fig. 8 is built from all 2-D material components. They use large area
CVD graphene to contact MoS2 crystals, exfoliated boron nitride as the gate
dielectric and exfoliated graphene as the gate terminal[8].

15. Fig. 8 schematic of All-2D MoS2 FET with few-layer h-BN gate dielectric, and bilayer
graphene source/drain and multilayer graphene top-gate electrodes [8].
Although its mobility is only 33 cm2/V·s with on/off current ratio of 106
[8], it
demonstrates how the ultimate 2-D FET looks like in the future.
In summery, as the conventional transistors become smaller and smaller, the
short channel effects become an important problems that restricted the
performance of the ultra small transistors. However, the 2-D FET gives engineers
a solution to improve the performance of conventional transistor by using 2-D
materials as their channel. So far, 2-D FET still have a lot of problems such as
high contact resistance between the 2-D material and contact material, low
carrier mobility and complex fabrication process to be solved, but I am sure that
2-D FET will finally replace the conventional FET in the market and lead our life
into a new era.
References
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