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Dr. Dev Narayan Yadav Department of CSE, National Institute of Technology Rourkela The 8051 Microcontroller Course Instructor: Dr. Dev Narayan Yadav Department of CSE, NIT Rourkela Email: yadavd@nitrkl.ac.in Mo. – 8349869748 Room – CS204
Dr. Dev Narayan Yadav Department of CSE, National Institute of Technology Rourkela 8051 Pin Diagram
Dr. Dev Narayan Yadav Department of CSE, National Institute of Technology Rourkela 8051 Pin Diagram Pins of 8051 X1, X2 : Clock RESET : Reset ALE : Address Latch Enable : Enable External Access : Program Status Enable VCC : Power Supply GND : Ground P0 P1 P2 P3 : 8-bit I/O Ports 8051 Microcontroller X1 X2 RST ALE EA PSEN VCC GND Internal ROM 4K Bytes (Program Memory) P0 8-bit P1 8-bit P2 8-bit P3 8-bit Internal RAM 128 Bytes (Data Memory)  8051 micro-controller has a 40-pin dual in-line package (DIP).  The I/O ports P0-P3 provides various alternative functions such as address/data bus, read/write signals etc.
Dr. Dev Narayan Yadav Department of CSE, National Institute of Technology Rourkela 8051 Memory (RAM and ROM) Memory: RAM & ROM ROM: Stores the program which needs to be run by microcontroller. Also known as code/program memory. RAM: Stores the temporary data required by the program. 8051 Microcontroller X1 X2 RST ALE EA PSEN VCC GND Internal ROM 4K Bytes (Program Memory) P0 8-bit P1 8-bit P2 8-bit P3 8-bit Internal RAM 128 Bytes (Data Memory)  What type of program do we store in ROM? • A program for oven, a program for air conditioner, a program for a pointing device etc.  What could be the temporary data? • Time which you set for cooking, speed of fan etc.
Dr. Dev Narayan Yadav Department of CSE, National Institute of Technology Rourkela Pins of 8051: X1 X2 X1 & X2 (Crystal Oscillator Pins) These two pins are used to connect an external crystal oscillator to provide the clock signal necessary for the microcontrollers operation. Clock signal is the beats in which the microcontroller operates; thus often referred to as the “heartbeat” of the system. Frequency of 8051: 12MHz 8051 Microcontroller X1 X2 RST ALE EA PSEN VCC GND Internal ROM 4K Bytes (Program Memory) P0 8-bit P1 8-bit P2 8-bit P3 8-bit Internal RAM 128 Bytes (Data Memory)  What is referred as “heartbeat” of an electronic device?
Dr. Dev Narayan Yadav Department of CSE, National Institute of Technology Rourkela Pins of 8051: RESET RESET (RST) As usual this pin is used to reset the microcontroller (close and terminate all activities and reset microcontroller to its initial value). What will reset? Processor RAM, Registers I/O ports. PC (program counter) Note: ROM contents are retained. 8051 Microcontroller X1 X2 RST ALE EA PSEN VCC GND Internal ROM 4K Bytes (Program Memory) P0 8-bit P1 8-bit P2 8-bit P3 8-bit Internal RAM 128 Bytes (Data Memory)
Dr. Dev Narayan Yadav Department of CSE, National Institute of Technology Rourkela Pins of 8051: ALE ALE: Address Latch Enable It is used to multiplex/de-multiplex address and data. Address: 16-bits; A0 to A15 Data: 8-bit; D0 to D7 Multiplexing will be done between A0-A7 and D0-D7  AD0-AD7 ALE = 1: AD0-AD7 carries address ALE = 0: AD0-AD7 carries data Note: A8-A15 always carries address. 8051 Microcontroller X1 X2 RESET ALE EA PSEN VCC GND Internal ROM 4K Bytes (Program Memory) P0 8-bit P1 8-bit P2 8-bit P3 8-bit Internal RAM 128 Bytes (Data Memory)  Why multiplexing, why to not have extra pins?
Dr. Dev Narayan Yadav Department of CSE, National Institute of Technology Rourkela Pins of 8051: : Enable External Access This pins selects whether the program code is fetched from internal ROM or external ROM. () = : Internal ROM discarded 𝟎 () = 1: External ROM starts after internal ROM. Note: Not applicable for external RAM. 8051 Microcontroller X1 X2 RST ALE 𝐄𝐀 PSEN VCC GND Internal ROM 4K Bytes (Program Memory) P0 8-bit P1 8-bit P2 8-bit P3 8-bit Internal RAM 128 Bytes (Data Memory)  Even though 8051 have internal RAM and ROM it supports external RAM and ROM devices.
Dr. Dev Narayan Yadav Department of CSE, National Institute of Technology Rourkela Pins of 8051: : Program Store Enable This pin is used as read signal for external ROM. There is no pin to indicate write operation why? 8051 Microcontroller X1 X2 RESET ALE EA 𝐏𝐒𝐄𝐍 VCC GND Internal ROM 4K Bytes (Program Memory) P0 8-bit P1 8-bit P2 8-bit P3 8-bit Internal RAM 128 Bytes (Data Memory)
Dr. Dev Narayan Yadav Department of CSE, National Institute of Technology Rourkela Pins of 8051: I/O Ports I/O Ports All ports are bidirectional (can work as input or output). All port supports Byte as well as Bit operations (ports are Byte as well as bit addressable). Byte operation : MOV P0, #25H Bit operation : SETB P0.0 : CLR P0.0 Note: Along with I/O operations ports have different alternative functionalities. 8051 Microcontroller X1 X2 RESET ALE EA PSEN VCC GND Internal ROM 4K Bytes (Program Memory) P0 8-bit P1 8-bit P2 8-bit P3 8-bit Internal RAM 128 Bytes (Data Memory) P0.7 – P0.0 P1.7 – P1.0 P2.7 – P2.0 P3.7 – P3.0
Dr. Dev Narayan Yadav Department of CSE, National Institute of Technology Rourkela Pins of 8051: I/O Ports I/O Ports: P0 This port is used as multiplexed address/data bus. Why no dedicated pins like 8085? When external memory is not used: Functions as a bidirectional I/O port When external memory is used: Functions as lower address (A0-A7) and data bus (D0-D7). 8051 Microcontroller X1 X2 RESET ALE EA PSEN VCC GND Internal ROM 4K Bytes (Program Memory) AD0-AD7 P0 P1 8-bit P2 8-bit P3 8-bit Internal RAM 128 Bytes (Data Memory)
Dr. Dev Narayan Yadav Department of CSE, National Institute of Technology Rourkela Pins of 8051: I/O Ports I/O Ports: P1 The only port which is dedicated to I/O operation and do not have any alternate function. 8051 Microcontroller X1 X2 RESET ALE EA PSEN VCC GND Internal ROM 4K Bytes (Program Memory) AD0-AD7 P0 P1 8-bit P2 8-bit P3 8-bit Internal RAM 128 Bytes (Data Memory)
Dr. Dev Narayan Yadav Department of CSE, National Institute of Technology Rourkela Pins of 8051: I/O Ports I/O Ports: P2 This port is used as an 8-bit address bus (A8-A15) which carries higher bit address. 8051 Microcontroller X1 X2 RESET ALE EA PSEN VCC GND Internal ROM 4K Bytes (Program Memory) AD0-AD7 P0 P1 8-bit A8-A15 P2 P3 8-bit Internal RAM 128 Bytes (Data Memory)
Dr. Dev Narayan Yadav Department of CSE, National Institute of Technology Rourkela Pins of 8051: I/O Ports I/O Ports: P3 This port implements various important alternative functions of 8051. P3.0 : RxD P3.1 : TxD P3.2 : P3.3 : P3.4 : T0 P3.5 : T1 P3.6 : P3.7 : 8051 Microcontroller X1 X2 RESET ALE EA PSEN VCC GND Internal ROM 4K Bytes (Program Memory) AD0-AD7 P0 P1 8-bit A8-A15 P2 P3 8-bit Internal RAM 128 Bytes (Data Memory)
Dr. Dev Narayan Yadav Department of CSE, National Institute of Technology Rourkela Pins of 8051: I/O Ports I/O Ports: P3.0 P3.1 This pins are used for serial communication. P3.0 RxD  Serial Receive P3.1 TxD  Serial Transmit. Transmit one bit at a time. Is it a important feature? Why no dedicated pins for this? 8051 Microcontroller X1 X2 RESET ALE EA PSEN VCC GND Internal ROM 4K Bytes (Program Memory) P0 8-bit P1 8-bit P2 8-bit RxD P3.0 Internal RAM 128 Bytes (Data Memory) TxD P3.0
Dr. Dev Narayan Yadav Department of CSE, National Institute of Technology Rourkela Pins of 8051: I/O Ports 8051 Microcontroller X1 X2 RESET ALE EA PSEN VCC GND Internal ROM 4K Bytes (Program Memory) P0 8-bit P1 8-bit P2 8-bit RxD P3.0 Internal RAM 128 Bytes (Data Memory) RxD P3.1 𝐈𝐍𝐓 𝟎 P3.2 𝐈𝐍𝐓𝟏 P3.3 I/O Ports: P3.2 P3.3 This pins are used for capturing external hardware interrupts.
Dr. Dev Narayan Yadav Department of CSE, National Institute of Technology Rourkela Pins of 8051: I/O Ports 8051 Microcontroller X1 X2 RESET ALE EA PSEN VCC GND Internal ROM 4K Bytes (Program Memory) P0 8-bit P1 8-bit P2 8-bit RxD P3.0 Internal RAM 128 Bytes (Data Memory) TxD P3.1 INT0 P3.2 INT1 P3.3 T0 P3.4 T1 P3.5 I/O Ports: P3.4 P3.5 Timer inputs: In 8051 two external timers can be connected in ports T0 and T1.
Dr. Dev Narayan Yadav Department of CSE, National Institute of Technology Rourkela Pins of 8051: I/O Ports 8051 Microcontroller X1 X2 RESET ALE EA PSEN VCC GND Internal ROM 4K Bytes (Program Memory) P0 8-bit P1 8-bit P2 8-bit RxD P3.0 Internal RAM 128 Bytes (Data Memory) TxD P3.1 INT0 P3.2 INT1 P3.3 T0 P3.4 T1 P3.5 I/O Ports: P3.6 P3.7 The read/write signal which is only used when we connect an external RAM. PSEN  For ROM RD/WR  For RAM 𝐑𝐃 P3.6 𝐖𝐑 P3.7
Dr. Dev Narayan Yadav Department of CSE, National Institute of Technology Rourkela Pins of 8051: I/O Ports 8051 Microcontroller X1 X2 RESET ALE EA PSEN VCC GND Internal ROM 4K Bytes (Program Memory) P0 8-bit P1 8-bit P2 8-bit RxD P3.0 Internal RAM 128 Bytes (Data Memory) TxD P3.1 INT0 P3.2 INT1 P3.3 T0 P3.4 T1 P3.5 𝐑𝐃 P3.6 𝐖𝐑 P3.7
Dr. Dev Narayan Yadav Department of CSE, National Institute of Technology Rourkela Architecture of 8051
Dr. Dev Narayan Yadav Department of CSE, National Institute of Technology Rourkela Architecture of 8051 ALU (8-bit) A (8-bit) B (8-bit) PC (16-bit) DPTR DPH DPL (16-bit) Address Data RAM (128-Byte) Address Data ROM (4KB) PSW (8-bit) Latch (8-bit) P0 (8-bit) Latch (8-bit) P0 (8-bit) Latch (8-bit) P0 (8-bit) Latch (8-bit) P0 (8-bit) Timing and Control Unit XTAL1 XTAL2 RESET ALE 𝐏𝐒𝐄𝐍 𝐄𝐀VCC GND 16-bit Bus 8-bit Bus
Dr. Dev Narayan Yadav Department of CSE, National Institute of Technology Rourkela Processor Section ALU (8-bit) A (8-bit) B (8-bit) PC (16-bit) DPTR DPH DPL (16-bit) PSW (8-bit) 16-bit Bus 8-bit Bus ALU: For performing arithmetic and logic operations (8-bit). Accumulator (A): Store first operand, and the result.. Register B: the only register that can be used for multiplication and division. PSW: When ALU operates on something result goes to A, status goes to PSW (we studied it as flag register in 8085). This gives flexibility to access program status directly (observe it is connected with 8-bit data bus  accessible by programmer).
Dr. Dev Narayan Yadav Department of CSE, National Institute of Technology Rourkela Processor Section ALU (8-bit) A (8-bit) B (8-bit) PC (16-bit) DPTR DPH DPL (16-bit) PSW (8-bit) 16-bit Bus 8-bit Bus Program Counter (PC): 16-bit (address of the instruction which needs to be executed next). Goes incremented after each instruction is fetched. (not controllable by programmer: automatically increment) Data Pointer (DPTR)  gives address of data that you want to read/write. Can be accessed as whole or as a 8-bit registers DPH, DPL (observe it is connected with both 8 and 16 bit bus. Initialization of DPTR is done as two 8-bit registers.
Dr. Dev Narayan Yadav Department of CSE, National Institute of Technology Rourkela Memory Section Address Data RAM (128-Byte) Address Data ROM (4KB) 16-bit Bus 8-bit Bus In total we can have 4 memories Internal RAM External RAM Internal ROM External ROM
Dr. Dev Narayan Yadav Department of CSE, National Institute of Technology Rourkela Memory Section Address Data RAM (128-Byte) Address Data ROM (4KB) 16-bit Bus 8-bit Bus Internal RAM (128 Bytes) 128 locations 1-byte each. Locations: 128 locations  7-bit address. Address range: 00H to 7FH. Internal RAM is connected with only 8-bit bus why?
Dr. Dev Narayan Yadav Department of CSE, National Institute of Technology Rourkela Memory Section Address Data RAM (128-Byte) Address Data ROM (4KB) 16-bit Bus 8-bit Bus Internal ROM (4K Bytes) 14K locations 1-byte each. (12-bit address). Address range: 0000H to 0FFFH ROM is connected with 16-bit address bus as the address size is 16-bit. ROM is also connected with the 8-bit bus using which the data transfer will take place.
Dr. Dev Narayan Yadav Department of CSE, National Institute of Technology Rourkela I/O Section Latch (8-bit) P0 (8-bit) Latch (8-bit) P0 (8-bit) Latch (8-bit) P0 (8-bit) Latch (8-bit) P0 (8-bit) 16-bit Bus 8-bit Bus 8-bit data bus is connected to all the ports. The 16-bit bus is connected to port 0 and 2 because they also carry address. Every port has a latch why? To hold the value (also call port registers). Until we will not change the value of latch explicitly it will retain.
Dr. Dev Narayan Yadav Department of CSE, National Institute of Technology Rourkela Timing and Control Unit Timing and Control Unit XTAL1 XTAL2 RESET ALE𝐏𝐒𝐄𝐍 𝐄𝐀VCC GND Releases control signal for all components.
Dr. Dev Narayan Yadav Department of CSE, National Institute of Technology Rourkela PSW  Flag Register
Dr. Dev Narayan Yadav Department of CSE, National Institute of Technology Rourkela PSW PSW.7 PSW.6 PSW.5 PSW.4 PSW.3 PSW.2 PSW.1 PSW.0 CY AC FO RSI RSO OVR X P Carry Bit CY=0  No carry CY=1  Carry out of MSB Example (80H+80H) 1000 0000 1000 0000 0000 0000 (00) CY AC OVR P 1 0 0 0
Dr. Dev Narayan Yadav Department of CSE, National Institute of Technology Rourkela PSW PSW.7 PSW.6 PSW.5 PSW.4 PSW.3 PSW.2 PSW.1 PSW.0 CY AC FO RSI RSO OVR X P Auxiliary Carry AC=0  No carry from lower to higher nibble AC=1  Carry from lower to higher nibble Example (27H+39H) 0010 0111 0011 1001 0110 0000 (60) CY AC OVR P 0 1 0 0
Dr. Dev Narayan Yadav Department of CSE, National Institute of Technology Rourkela PSW PSW.7 PSW.6 PSW.5 PSW.4 PSW.3 PSW.2 PSW.1 PSW.0 CY AC FO RSI RSO OVR X P Parity P=0  Even Parity (Even/Zero number of 1’s in A) P=1  Odd Parity (Odd number of 1’s in A) Example-1 (23H+31H) 0010 0011 0011 0001 0101 0100 (54) CY AC OVR P 0 0 0 1
Dr. Dev Narayan Yadav Department of CSE, National Institute of Technology Rourkela PSW PSW.7 PSW.6 PSW.5 PSW.4 PSW.3 PSW.2 PSW.1 PSW.0 CY AC FO RSI RSO OVR X P Overflow OVR = 1  Overflow OVR = 0  No Overflow It is only effected by signed numbers. Note:- It does not simply mean that the number is more then 8 bit. Representation of Numbers Unsigned  8-bit magnitude, 0 to 255 (00H to FFH) Signed  1-bit reserved for sign; 7-bit for magnitude (-128, -127, … -1, 0, 1, …. 126, 127) (-80H to 7F) Say we got an result of some operation as: 1000 0011 What does this value represent? Unsigned  83H Signed  (we cant say anything just by looking the number) Note:- mostly the computation/storage for negative numbers are done using 2’s complement (not by just putting 1 in MSB).
Dr. Dev Narayan Yadav Department of CSE, National Institute of Technology Rourkela PSW PSW.7 PSW.6 PSW.5 PSW.4 PSW.3 PSW.2 PSW.1 PSW.0 CY AC FO RS1 RS0 OVR X P Overflow OVR = 1  Overflow OVR = 0  No Overflow It is only effected by signed numbers. Note:- It does not simply mean that the number is more then 8 bit. Representation of Numbers For a signed operation result we have to look for MSB as well as OVR bit 7FH+01H  80H  1000 0000 (got an negative number as result) (OVR=1). If OVR = 0; result  whatever we got is result. If OVR = 1; compute 2’s compliment to get result
Dr. Dev Narayan Yadav Department of CSE, National Institute of Technology Rourkela PSW PSW.7 PSW.6 PSW.5 PSW.4 PSW.3 PSW.2 PSW.1 PSW.0 CY AC FO RS1 RS0 OVR X P Overflow OVR = 1  Overflow OVR = 0  No Overflow It is only effected by signed numbers. Note:- It does not simply mean that the number is more then 8 bit. Converting a Number to its 2’s Complement form Method-1:- 1’s Complement + 1 Method-2:- from RHS copy number till you get 1st one, and then complement everything. (i.e 0101  1011) If an operation has been done for 2’s complement number then we need to convert the result to 2’s complement again to get our result.
Dr. Dev Narayan Yadav Department of CSE, National Institute of Technology Rourkela Exercise Example-3 (-23H+-31H) 1101 1101 1100 1111 1010 1100 0101 0100 (54) CY AC OVR P 1 1 0 0 Example-1 (23H+31H) 0010 0011 0011 0001 0101 0100 (54) CY AC OVR P 0 0 0 1 Example-2 (27H+39H) 0010 0111 0011 1001 0110 0000 (60) CY AC OVR P 0 1 0 0 Example-4 (64H+32H) 0110 0100 0011 0010 1001 0110 (-16) CY AC OVR P 0 0 1 0 OVR  XOR (6th , 7th Carry)
Dr. Dev Narayan Yadav Department of CSE, National Institute of Technology Rourkela PSW PSW.7 PSW.6 PSW.5 PSW.4 PSW.3 PSW.2 PSW.1 PSW.0 CY AC F0 RS1 RS0 OVR X P Register Bank Select Internal RAM have register banks. Consist 32, 1-Byte registers divided into 4 blocks; register R0 to R7 in each block. MOV A, R0 ( R0from which bank?) 00  Bank 0 01  Bank 1 10  Bank 2 11  Bank 3 SET PSW.4, CLR PSW.4 Why not R0 to R31? Bank Address Data B3 R0 to R7 B2 R0 to R7 B1 R0 to R7 B0 R7 R6 R5 R4 R3 R2 R1 R0
Dr. Dev Narayan Yadav Department of CSE, National Institute of Technology Rourkela PSW PSW.7 PSW.6 PSW.5 PSW.4 PSW.3 PSW.2 PSW.1 PSW.0 CY AC F0 RS1 RS0 OVR X P F0 User defined flag (processor does not read or set this flag by there own) SETB PSW.5 CLR PSW.5

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8051_02_PinDiagram_Architecture_PSW.pptx

  • 1.
    Dr. Dev NarayanYadav Department of CSE, National Institute of Technology Rourkela The 8051 Microcontroller Course Instructor: Dr. Dev Narayan Yadav Department of CSE, NIT Rourkela Email: yadavd@nitrkl.ac.in Mo. – 8349869748 Room – CS204
  • 2.
    Dr. Dev NarayanYadav Department of CSE, National Institute of Technology Rourkela 8051 Pin Diagram
  • 3.
    Dr. Dev NarayanYadav Department of CSE, National Institute of Technology Rourkela 8051 Pin Diagram Pins of 8051 X1, X2 : Clock RESET : Reset ALE : Address Latch Enable : Enable External Access : Program Status Enable VCC : Power Supply GND : Ground P0 P1 P2 P3 : 8-bit I/O Ports 8051 Microcontroller X1 X2 RST ALE EA PSEN VCC GND Internal ROM 4K Bytes (Program Memory) P0 8-bit P1 8-bit P2 8-bit P3 8-bit Internal RAM 128 Bytes (Data Memory)  8051 micro-controller has a 40-pin dual in-line package (DIP).  The I/O ports P0-P3 provides various alternative functions such as address/data bus, read/write signals etc.
  • 4.
    Dr. Dev NarayanYadav Department of CSE, National Institute of Technology Rourkela 8051 Memory (RAM and ROM) Memory: RAM & ROM ROM: Stores the program which needs to be run by microcontroller. Also known as code/program memory. RAM: Stores the temporary data required by the program. 8051 Microcontroller X1 X2 RST ALE EA PSEN VCC GND Internal ROM 4K Bytes (Program Memory) P0 8-bit P1 8-bit P2 8-bit P3 8-bit Internal RAM 128 Bytes (Data Memory)  What type of program do we store in ROM? • A program for oven, a program for air conditioner, a program for a pointing device etc.  What could be the temporary data? • Time which you set for cooking, speed of fan etc.
  • 5.
    Dr. Dev NarayanYadav Department of CSE, National Institute of Technology Rourkela Pins of 8051: X1 X2 X1 & X2 (Crystal Oscillator Pins) These two pins are used to connect an external crystal oscillator to provide the clock signal necessary for the microcontrollers operation. Clock signal is the beats in which the microcontroller operates; thus often referred to as the “heartbeat” of the system. Frequency of 8051: 12MHz 8051 Microcontroller X1 X2 RST ALE EA PSEN VCC GND Internal ROM 4K Bytes (Program Memory) P0 8-bit P1 8-bit P2 8-bit P3 8-bit Internal RAM 128 Bytes (Data Memory)  What is referred as “heartbeat” of an electronic device?
  • 6.
    Dr. Dev NarayanYadav Department of CSE, National Institute of Technology Rourkela Pins of 8051: RESET RESET (RST) As usual this pin is used to reset the microcontroller (close and terminate all activities and reset microcontroller to its initial value). What will reset? Processor RAM, Registers I/O ports. PC (program counter) Note: ROM contents are retained. 8051 Microcontroller X1 X2 RST ALE EA PSEN VCC GND Internal ROM 4K Bytes (Program Memory) P0 8-bit P1 8-bit P2 8-bit P3 8-bit Internal RAM 128 Bytes (Data Memory)
  • 7.
    Dr. Dev NarayanYadav Department of CSE, National Institute of Technology Rourkela Pins of 8051: ALE ALE: Address Latch Enable It is used to multiplex/de-multiplex address and data. Address: 16-bits; A0 to A15 Data: 8-bit; D0 to D7 Multiplexing will be done between A0-A7 and D0-D7  AD0-AD7 ALE = 1: AD0-AD7 carries address ALE = 0: AD0-AD7 carries data Note: A8-A15 always carries address. 8051 Microcontroller X1 X2 RESET ALE EA PSEN VCC GND Internal ROM 4K Bytes (Program Memory) P0 8-bit P1 8-bit P2 8-bit P3 8-bit Internal RAM 128 Bytes (Data Memory)  Why multiplexing, why to not have extra pins?
  • 8.
    Dr. Dev NarayanYadav Department of CSE, National Institute of Technology Rourkela Pins of 8051: : Enable External Access This pins selects whether the program code is fetched from internal ROM or external ROM. () = : Internal ROM discarded 𝟎 () = 1: External ROM starts after internal ROM. Note: Not applicable for external RAM. 8051 Microcontroller X1 X2 RST ALE 𝐄𝐀 PSEN VCC GND Internal ROM 4K Bytes (Program Memory) P0 8-bit P1 8-bit P2 8-bit P3 8-bit Internal RAM 128 Bytes (Data Memory)  Even though 8051 have internal RAM and ROM it supports external RAM and ROM devices.
  • 9.
    Dr. Dev NarayanYadav Department of CSE, National Institute of Technology Rourkela Pins of 8051: : Program Store Enable This pin is used as read signal for external ROM. There is no pin to indicate write operation why? 8051 Microcontroller X1 X2 RESET ALE EA 𝐏𝐒𝐄𝐍 VCC GND Internal ROM 4K Bytes (Program Memory) P0 8-bit P1 8-bit P2 8-bit P3 8-bit Internal RAM 128 Bytes (Data Memory)
  • 10.
    Dr. Dev NarayanYadav Department of CSE, National Institute of Technology Rourkela Pins of 8051: I/O Ports I/O Ports All ports are bidirectional (can work as input or output). All port supports Byte as well as Bit operations (ports are Byte as well as bit addressable). Byte operation : MOV P0, #25H Bit operation : SETB P0.0 : CLR P0.0 Note: Along with I/O operations ports have different alternative functionalities. 8051 Microcontroller X1 X2 RESET ALE EA PSEN VCC GND Internal ROM 4K Bytes (Program Memory) P0 8-bit P1 8-bit P2 8-bit P3 8-bit Internal RAM 128 Bytes (Data Memory) P0.7 – P0.0 P1.7 – P1.0 P2.7 – P2.0 P3.7 – P3.0
  • 11.
    Dr. Dev NarayanYadav Department of CSE, National Institute of Technology Rourkela Pins of 8051: I/O Ports I/O Ports: P0 This port is used as multiplexed address/data bus. Why no dedicated pins like 8085? When external memory is not used: Functions as a bidirectional I/O port When external memory is used: Functions as lower address (A0-A7) and data bus (D0-D7). 8051 Microcontroller X1 X2 RESET ALE EA PSEN VCC GND Internal ROM 4K Bytes (Program Memory) AD0-AD7 P0 P1 8-bit P2 8-bit P3 8-bit Internal RAM 128 Bytes (Data Memory)
  • 12.
    Dr. Dev NarayanYadav Department of CSE, National Institute of Technology Rourkela Pins of 8051: I/O Ports I/O Ports: P1 The only port which is dedicated to I/O operation and do not have any alternate function. 8051 Microcontroller X1 X2 RESET ALE EA PSEN VCC GND Internal ROM 4K Bytes (Program Memory) AD0-AD7 P0 P1 8-bit P2 8-bit P3 8-bit Internal RAM 128 Bytes (Data Memory)
  • 13.
    Dr. Dev NarayanYadav Department of CSE, National Institute of Technology Rourkela Pins of 8051: I/O Ports I/O Ports: P2 This port is used as an 8-bit address bus (A8-A15) which carries higher bit address. 8051 Microcontroller X1 X2 RESET ALE EA PSEN VCC GND Internal ROM 4K Bytes (Program Memory) AD0-AD7 P0 P1 8-bit A8-A15 P2 P3 8-bit Internal RAM 128 Bytes (Data Memory)
  • 14.
    Dr. Dev NarayanYadav Department of CSE, National Institute of Technology Rourkela Pins of 8051: I/O Ports I/O Ports: P3 This port implements various important alternative functions of 8051. P3.0 : RxD P3.1 : TxD P3.2 : P3.3 : P3.4 : T0 P3.5 : T1 P3.6 : P3.7 : 8051 Microcontroller X1 X2 RESET ALE EA PSEN VCC GND Internal ROM 4K Bytes (Program Memory) AD0-AD7 P0 P1 8-bit A8-A15 P2 P3 8-bit Internal RAM 128 Bytes (Data Memory)
  • 15.
    Dr. Dev NarayanYadav Department of CSE, National Institute of Technology Rourkela Pins of 8051: I/O Ports I/O Ports: P3.0 P3.1 This pins are used for serial communication. P3.0 RxD  Serial Receive P3.1 TxD  Serial Transmit. Transmit one bit at a time. Is it a important feature? Why no dedicated pins for this? 8051 Microcontroller X1 X2 RESET ALE EA PSEN VCC GND Internal ROM 4K Bytes (Program Memory) P0 8-bit P1 8-bit P2 8-bit RxD P3.0 Internal RAM 128 Bytes (Data Memory) TxD P3.0
  • 16.
    Dr. Dev NarayanYadav Department of CSE, National Institute of Technology Rourkela Pins of 8051: I/O Ports 8051 Microcontroller X1 X2 RESET ALE EA PSEN VCC GND Internal ROM 4K Bytes (Program Memory) P0 8-bit P1 8-bit P2 8-bit RxD P3.0 Internal RAM 128 Bytes (Data Memory) RxD P3.1 𝐈𝐍𝐓 𝟎 P3.2 𝐈𝐍𝐓𝟏 P3.3 I/O Ports: P3.2 P3.3 This pins are used for capturing external hardware interrupts.
  • 17.
    Dr. Dev NarayanYadav Department of CSE, National Institute of Technology Rourkela Pins of 8051: I/O Ports 8051 Microcontroller X1 X2 RESET ALE EA PSEN VCC GND Internal ROM 4K Bytes (Program Memory) P0 8-bit P1 8-bit P2 8-bit RxD P3.0 Internal RAM 128 Bytes (Data Memory) TxD P3.1 INT0 P3.2 INT1 P3.3 T0 P3.4 T1 P3.5 I/O Ports: P3.4 P3.5 Timer inputs: In 8051 two external timers can be connected in ports T0 and T1.
  • 18.
    Dr. Dev NarayanYadav Department of CSE, National Institute of Technology Rourkela Pins of 8051: I/O Ports 8051 Microcontroller X1 X2 RESET ALE EA PSEN VCC GND Internal ROM 4K Bytes (Program Memory) P0 8-bit P1 8-bit P2 8-bit RxD P3.0 Internal RAM 128 Bytes (Data Memory) TxD P3.1 INT0 P3.2 INT1 P3.3 T0 P3.4 T1 P3.5 I/O Ports: P3.6 P3.7 The read/write signal which is only used when we connect an external RAM. PSEN  For ROM RD/WR  For RAM 𝐑𝐃 P3.6 𝐖𝐑 P3.7
  • 19.
    Dr. Dev NarayanYadav Department of CSE, National Institute of Technology Rourkela Pins of 8051: I/O Ports 8051 Microcontroller X1 X2 RESET ALE EA PSEN VCC GND Internal ROM 4K Bytes (Program Memory) P0 8-bit P1 8-bit P2 8-bit RxD P3.0 Internal RAM 128 Bytes (Data Memory) TxD P3.1 INT0 P3.2 INT1 P3.3 T0 P3.4 T1 P3.5 𝐑𝐃 P3.6 𝐖𝐑 P3.7
  • 20.
    Dr. Dev NarayanYadav Department of CSE, National Institute of Technology Rourkela Architecture of 8051
  • 21.
    Dr. Dev NarayanYadav Department of CSE, National Institute of Technology Rourkela Architecture of 8051 ALU (8-bit) A (8-bit) B (8-bit) PC (16-bit) DPTR DPH DPL (16-bit) Address Data RAM (128-Byte) Address Data ROM (4KB) PSW (8-bit) Latch (8-bit) P0 (8-bit) Latch (8-bit) P0 (8-bit) Latch (8-bit) P0 (8-bit) Latch (8-bit) P0 (8-bit) Timing and Control Unit XTAL1 XTAL2 RESET ALE 𝐏𝐒𝐄𝐍 𝐄𝐀VCC GND 16-bit Bus 8-bit Bus
  • 22.
    Dr. Dev NarayanYadav Department of CSE, National Institute of Technology Rourkela Processor Section ALU (8-bit) A (8-bit) B (8-bit) PC (16-bit) DPTR DPH DPL (16-bit) PSW (8-bit) 16-bit Bus 8-bit Bus ALU: For performing arithmetic and logic operations (8-bit). Accumulator (A): Store first operand, and the result.. Register B: the only register that can be used for multiplication and division. PSW: When ALU operates on something result goes to A, status goes to PSW (we studied it as flag register in 8085). This gives flexibility to access program status directly (observe it is connected with 8-bit data bus  accessible by programmer).
  • 23.
    Dr. Dev NarayanYadav Department of CSE, National Institute of Technology Rourkela Processor Section ALU (8-bit) A (8-bit) B (8-bit) PC (16-bit) DPTR DPH DPL (16-bit) PSW (8-bit) 16-bit Bus 8-bit Bus Program Counter (PC): 16-bit (address of the instruction which needs to be executed next). Goes incremented after each instruction is fetched. (not controllable by programmer: automatically increment) Data Pointer (DPTR)  gives address of data that you want to read/write. Can be accessed as whole or as a 8-bit registers DPH, DPL (observe it is connected with both 8 and 16 bit bus. Initialization of DPTR is done as two 8-bit registers.
  • 24.
    Dr. Dev NarayanYadav Department of CSE, National Institute of Technology Rourkela Memory Section Address Data RAM (128-Byte) Address Data ROM (4KB) 16-bit Bus 8-bit Bus In total we can have 4 memories Internal RAM External RAM Internal ROM External ROM
  • 25.
    Dr. Dev NarayanYadav Department of CSE, National Institute of Technology Rourkela Memory Section Address Data RAM (128-Byte) Address Data ROM (4KB) 16-bit Bus 8-bit Bus Internal RAM (128 Bytes) 128 locations 1-byte each. Locations: 128 locations  7-bit address. Address range: 00H to 7FH. Internal RAM is connected with only 8-bit bus why?
  • 26.
    Dr. Dev NarayanYadav Department of CSE, National Institute of Technology Rourkela Memory Section Address Data RAM (128-Byte) Address Data ROM (4KB) 16-bit Bus 8-bit Bus Internal ROM (4K Bytes) 14K locations 1-byte each. (12-bit address). Address range: 0000H to 0FFFH ROM is connected with 16-bit address bus as the address size is 16-bit. ROM is also connected with the 8-bit bus using which the data transfer will take place.
  • 27.
    Dr. Dev NarayanYadav Department of CSE, National Institute of Technology Rourkela I/O Section Latch (8-bit) P0 (8-bit) Latch (8-bit) P0 (8-bit) Latch (8-bit) P0 (8-bit) Latch (8-bit) P0 (8-bit) 16-bit Bus 8-bit Bus 8-bit data bus is connected to all the ports. The 16-bit bus is connected to port 0 and 2 because they also carry address. Every port has a latch why? To hold the value (also call port registers). Until we will not change the value of latch explicitly it will retain.
  • 28.
    Dr. Dev NarayanYadav Department of CSE, National Institute of Technology Rourkela Timing and Control Unit Timing and Control Unit XTAL1 XTAL2 RESET ALE𝐏𝐒𝐄𝐍 𝐄𝐀VCC GND Releases control signal for all components.
  • 29.
    Dr. Dev NarayanYadav Department of CSE, National Institute of Technology Rourkela PSW  Flag Register
  • 30.
    Dr. Dev NarayanYadav Department of CSE, National Institute of Technology Rourkela PSW PSW.7 PSW.6 PSW.5 PSW.4 PSW.3 PSW.2 PSW.1 PSW.0 CY AC FO RSI RSO OVR X P Carry Bit CY=0  No carry CY=1  Carry out of MSB Example (80H+80H) 1000 0000 1000 0000 0000 0000 (00) CY AC OVR P 1 0 0 0
  • 31.
    Dr. Dev NarayanYadav Department of CSE, National Institute of Technology Rourkela PSW PSW.7 PSW.6 PSW.5 PSW.4 PSW.3 PSW.2 PSW.1 PSW.0 CY AC FO RSI RSO OVR X P Auxiliary Carry AC=0  No carry from lower to higher nibble AC=1  Carry from lower to higher nibble Example (27H+39H) 0010 0111 0011 1001 0110 0000 (60) CY AC OVR P 0 1 0 0
  • 32.
    Dr. Dev NarayanYadav Department of CSE, National Institute of Technology Rourkela PSW PSW.7 PSW.6 PSW.5 PSW.4 PSW.3 PSW.2 PSW.1 PSW.0 CY AC FO RSI RSO OVR X P Parity P=0  Even Parity (Even/Zero number of 1’s in A) P=1  Odd Parity (Odd number of 1’s in A) Example-1 (23H+31H) 0010 0011 0011 0001 0101 0100 (54) CY AC OVR P 0 0 0 1
  • 33.
    Dr. Dev NarayanYadav Department of CSE, National Institute of Technology Rourkela PSW PSW.7 PSW.6 PSW.5 PSW.4 PSW.3 PSW.2 PSW.1 PSW.0 CY AC FO RSI RSO OVR X P Overflow OVR = 1  Overflow OVR = 0  No Overflow It is only effected by signed numbers. Note:- It does not simply mean that the number is more then 8 bit. Representation of Numbers Unsigned  8-bit magnitude, 0 to 255 (00H to FFH) Signed  1-bit reserved for sign; 7-bit for magnitude (-128, -127, … -1, 0, 1, …. 126, 127) (-80H to 7F) Say we got an result of some operation as: 1000 0011 What does this value represent? Unsigned  83H Signed  (we cant say anything just by looking the number) Note:- mostly the computation/storage for negative numbers are done using 2’s complement (not by just putting 1 in MSB).
  • 34.
    Dr. Dev NarayanYadav Department of CSE, National Institute of Technology Rourkela PSW PSW.7 PSW.6 PSW.5 PSW.4 PSW.3 PSW.2 PSW.1 PSW.0 CY AC FO RS1 RS0 OVR X P Overflow OVR = 1  Overflow OVR = 0  No Overflow It is only effected by signed numbers. Note:- It does not simply mean that the number is more then 8 bit. Representation of Numbers For a signed operation result we have to look for MSB as well as OVR bit 7FH+01H  80H  1000 0000 (got an negative number as result) (OVR=1). If OVR = 0; result  whatever we got is result. If OVR = 1; compute 2’s compliment to get result
  • 35.
    Dr. Dev NarayanYadav Department of CSE, National Institute of Technology Rourkela PSW PSW.7 PSW.6 PSW.5 PSW.4 PSW.3 PSW.2 PSW.1 PSW.0 CY AC FO RS1 RS0 OVR X P Overflow OVR = 1  Overflow OVR = 0  No Overflow It is only effected by signed numbers. Note:- It does not simply mean that the number is more then 8 bit. Converting a Number to its 2’s Complement form Method-1:- 1’s Complement + 1 Method-2:- from RHS copy number till you get 1st one, and then complement everything. (i.e 0101  1011) If an operation has been done for 2’s complement number then we need to convert the result to 2’s complement again to get our result.
  • 36.
    Dr. Dev NarayanYadav Department of CSE, National Institute of Technology Rourkela Exercise Example-3 (-23H+-31H) 1101 1101 1100 1111 1010 1100 0101 0100 (54) CY AC OVR P 1 1 0 0 Example-1 (23H+31H) 0010 0011 0011 0001 0101 0100 (54) CY AC OVR P 0 0 0 1 Example-2 (27H+39H) 0010 0111 0011 1001 0110 0000 (60) CY AC OVR P 0 1 0 0 Example-4 (64H+32H) 0110 0100 0011 0010 1001 0110 (-16) CY AC OVR P 0 0 1 0 OVR  XOR (6th , 7th Carry)
  • 37.
    Dr. Dev NarayanYadav Department of CSE, National Institute of Technology Rourkela PSW PSW.7 PSW.6 PSW.5 PSW.4 PSW.3 PSW.2 PSW.1 PSW.0 CY AC F0 RS1 RS0 OVR X P Register Bank Select Internal RAM have register banks. Consist 32, 1-Byte registers divided into 4 blocks; register R0 to R7 in each block. MOV A, R0 ( R0from which bank?) 00  Bank 0 01  Bank 1 10  Bank 2 11  Bank 3 SET PSW.4, CLR PSW.4 Why not R0 to R31? Bank Address Data B3 R0 to R7 B2 R0 to R7 B1 R0 to R7 B0 R7 R6 R5 R4 R3 R2 R1 R0
  • 38.
    Dr. Dev NarayanYadav Department of CSE, National Institute of Technology Rourkela PSW PSW.7 PSW.6 PSW.5 PSW.4 PSW.3 PSW.2 PSW.1 PSW.0 CY AC F0 RS1 RS0 OVR X P F0 User defined flag (processor does not read or set this flag by there own) SETB PSW.5 CLR PSW.5

Editor's Notes

  • #7 i.e. multiplex theater (we need single parking, single stall etc. but can run multiple screens and movies).
  • #8 As we know that internal ROM is of 4K bytes: how many locations we will have in internal ROM? 0000H to 0FFFH.
  • #10  Individually say a light is connected, I do not need to disturb others, I can simply make changes on them. Light video can be included: light in serially and then, circular etc. One port key, one port LED, press key check light. Another port sound box, light along with sound.
  • #11 We have internal memory, if we do not connect those pins will be useless. Same for P2 as well.
  • #15 In the world almost 90% communication is done using serial communication. But why serial? We know that parallel communication is faster (i.e. 8 bit parallel communication is 8X faster as compare to a serial communication. Because: parallel more hardware, more wires, more power consumption etc. Example the pointing device: If we use parallel communication: 8 transmitter, 8 receiver: do I need that much speed for these device? What about power consumption? Is it important? Yes. Why do we not have any dedicated pins for this? Many applications does not require this functionality (i.e. oven, refrigerator, washing machine, etc.)
  • #16 Sense interrupt: fire alarm, airbags, external events to the system. Processor gets interrupt form external devices or programs. What happens when we receive an interrupt? The interrupt is forwarded to interrupt service routine, and then processor resume its task. For example: Say you are watching a movie: then you get an notification or call that is an interrupt  this is forwarded to ISR, once the interrupt service is finished you start your movie from where you left.
  • #17 Timer: T0, T1: timer needs clock. Every time car passes light sensor cuts the light (i.e. pulse) then timer will change the count. malls: people, number keeps changing, again, all the time I might not use timer, thus no need dedicated pins for this.
  • #21 What will happen in each clock cycle? We have already discussed this in 8085. What will be the time period if the frequency is 12MHz.
  • #22 What will happen in each clock cycle? We have already discussed this in 8085. What will be the time period if the frequency if 12MHz.
  • #23 What will happen in each clock cycle? We have already discussed this in 8085. What will be the time period if the frequency if 12MHz.
  • #24 What will happen in each clock cycle? We have already discussed this in 8085. What will be the time period if the frequency if 12MHz.
  • #25 What will happen in each clock cycle? We have already discussed this in 8085. What will be the time period if the frequency if 12MHz.
  • #26 What will happen in each clock cycle? We have already discussed this in 8085. What will be the time period if the frequency if 12MHz.
  • #30 AN example can be included here.
  • #31 AN example can be included here.
  • #32 AN example can be included here.
  • #37  Why not R0 to R31? to reduce the number of opcodes. Move A, R0  one opcode Move A, R0 to Move A, R7  total 8 opcodes. If we have R0 to R31  (32 opcodes Just for move). Now think 32 for ADD, 32 for SUB , 32 for each such operations.