This document proposes a software/hardware co-design framework called an SDSoC (system on a chip) to enable real-time computer vision processing at the edge for applications in the "Internet of Eyes". The framework uses a Xilinx Zynq chip containing an ARM processor and programmable logic. A prototype application for variable speed limit control on a motorway splits processing between the processor and programmable logic. Evaluation results found the framework can provide real-time processing with response times under 50ms while keeping power consumption under 2.5 watts.