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Department of
Computer Science and Engineering
10211CS109 – MICROPROCESSORS AND
MICROCONTROLLERS
School of Computing
Vel Tech Rangarajan Dr. Sagunthala R&D Institute of
Science and Technology
Course Category : Program Core
Credits : 2
Slot : Slot 7&12
Semester : Winter
Academic Year : 2023-2024
Faculty Name : Dr.S.YAZHINIAN
Department of Computer Science and Engineering
Course Introduction
01-02-2024 2
and Project
Management
(SEPM)
Preamble
The Purpose of the course is to provide students with the Knowledge of
Microprocessors and Microcontroller. To solve real world problems in an
efficient manner, this course also emphasis on architecture, Programming and
system design used in various day to day gadgets.
Pre-requisite
Sl. No Course Code Course Name
1 1151CS104 Digital Electronics
Department of Computer Science and Engineering
Course Introduction
01-02-2024 3
and Project
Management
(SEPM)
Correlation of Cos with POs and PSO
COs
PO
1
PO
2
PO
3
PO
4
PO
5
PO
6
PO
7
PO
8
PO
9
PO10 PO11 PO12
PSO
1
PSO 2
PSO
3
CO1 M H H M L
L M M
CO2 L L H M L
CO3 L M L M L L H
L
M
M
CO4 M L L
CO5 L L M L M
Department of Computer Science and Engineering
Course Introduction
01-02-2024 4
and Project
Management
(SEPM)
COURSE OUTCOMES
CO
Nos.
Course Outcomes
Level of learning
domain (Based on
revised Bloom’s)
CO1
Develop an ALP in 8086 microprocessor using the
internal organization for the given specification
K3
CO2
Understand the bus architecture of 8086
microprocessor and other advanced processors
K2
CO3
Describe the architecture and functional block of
8051 microcontroller
K2
CO4
Illustrate the various peripherals devices such as
8255, 8279, 8251, 8253,8259 and 8237
K2
CO5
Understand the microcontroller application and
basic architecture of PIC,ARM and ATMEGA
processors.
K2
Department of Computer Science and Engineering
Why Microprocessor & Controllers?
01-02-2024 5
and Project
Management
(SEPM)
Microprocessor is the heart of computer systems.
The complete mechanism and structure of the systems can be grasped
It is used to build a system which can perform multiple tasks by
avoiding the use of traditional transistor
It is the basic building block of the third generation computers that
makes them compact and versatile.
Department of Computer Science and Engineering
COURSE CONTENT
01-02-2024 6
and Project
Management
(SEPM)
COURSE CONTENT
UNIT I- THE 8086 MICROPROCESSOR (9)
Introduction to 8086 – Microprocessor architecture – Addressing modes - Instruction set and
assembler directives – Assembly language programming – Modular Programming - Linking
and Relocation - Stacks - Procedures – Macros – Interrupts and interrupt service routines –
Byte and String Manipulation.
UNIT II 8086 SYSTEM BUS STRUCTURE (9)
8086 signals – Basic configurations – System bus timing –System design using 8086 – IO
programming – Introduction to Multiprogramming – System Bus Structure – Multiprocessor
configurations – Coprocessor, closely coupled and loosely Coupled configurations –
Introduction to Pentium family processors.
UNIT III 8051 ARCHITECTURE (9)
Architecture – memory organization –I/O ports and circuits-Timers - Interrupts –serial
communication – Addressing modes –Instruction set.
Department of Computer Science and Engineering
COURSE CONTENT
01-02-2024 7
and Project
Management
(SEPM)
UNIT IV PERIPHERAL DEVICES (10)
Parallel peripheral Interface (8255) - Timer / Counter (8253) - Keyboard and Display Controller
(8279) - USART (8251) - Interrupt Controller (8259)- DMA Controller (8237).
UNITVMICROCONTROLLER APPLICATIONS & ADVANCED PROCESSOR (8)
Temperature control system- Motor speed control system – Traffic light System – Elevator system
- Introduction to architecture of PIC, ARM, ATMEGA processor
Total: 45 Periods
References:
1.Kenneth J Ayala, The 8051 Microcontroller Architecture Programming and
Application, third Edition, Penram International Publishers.
2.A.K Ray & K.M. Burchandi, Advanced Microprocessor and peripherals
Architectures, Programming and interfacing “, second edition, Tata McGraw-Hill .
Online resources
1.https://www.youtube.com/watch?v=liRPtvj7bFU&list=PL0E131A78ABFBFDD0
2.https://www.youtube.com/watch?v=95uGOJ1Ud2c&list=PLJGA4olwzpA-
3.rvcdWULcRuMn2495g0n8j
Department of Computer Science and Engineering
COURSE DESCRIPTION
01-02-2024 8
and Project
Management
(SEPM)
• To provide students with the Knowledge of
Microprocessors and Microcontroller.
• To solve real world problems in an efficient manner
• This course also emphasis on architecture, Programming
and system design used in various day to day gadgets.
Department of Computer Science and Engineering
LEARNING RESOURCES
01-02-2024 9
and Project
Management
(SEPM)
Text Books:
1.Yu-Cheng Liu, Glenn A.Gibson, “Microcomputer Systems: The 8086 / 8088
Family -Architecture, Programming and Design”, Second Edition, Prentice Hall of
India, 2007.
2. Muhammad Ali Mazidi, Janice GillispieMazidi and Rolin D McKinlay, The
8051 microcontroller and embedded systems using assembly and C, second
edition Pearson education Asia. (UNIT 2 & 3)
3.Fredrick J. Hill, Gerald R. Peterson, " Digital logic and microprocessors", Wiley
publication
Department of Computer Science and Engineering
UNIT- I
01-02-2024 10
and Project
Management
(SEPM)
THE 8086
MICROPROCESSOR
Department of Computer Science and Engineering
UNIT- I - Scenario
01-02-2024 11
and Project
Management
(SEPM)
Title: THE 8086 MICROPROCESSOR
Course Outcome – CO1:Develop an ALP in 8086 microprocessor using the internal
organization for the given specification
K-Level – K3
Hours Allotted : 09 Hours
Department of Computer Science and Engineering
COURSE DESCRIPTION
01-02-2024 12
and Project
Management
(SEPM)
• To provide students with the Knowledge of
Microprocessors and Microcontroller.
• To solve real world problems in an efficient manner
• This course also emphasis on architecture, Programming
and system design used in various day to day gadgets.
Department of Computer Science and Engineering
UNIT -1
13
and Project
Management
(SEPM)
THE 8086
MICOPROCESSOR
2/1/2024
Department of Computer Science and Engineering
Unit -1 -Scenario
14
and Project
Management
(SEPM)
Title: THE 8086 MICROPROCESSOR
Course Outcome – CO1:Develop an ALP in 8086 microprocessor
using the internal organization for the given specification
K-Level – K3
Hours Allotted : 09 Hours
2/1/2024
Department of Computer Science and Engineering
Unit -1 : Course Contents
15
and Project
Management
(SEPM)
THE 8086 MICROPROCESSOR
Introduction to 8086
Microprocessor architecture
Addressing modes
Instruction set and assembler directives
Assembly language programming & Modular Programming
 Linking and Relocation
Stacks & Procedures
Macros & Interrupts and interrupt service routines
Byte and String Manipulation.
2/1/2024
Department of Computer Science and Engineering
Session -I
16
and Project
Management
(SEPM)
Introduction to 8086
2/1/2024
Department of Computer Science and Engineering
Session 1-Introduction to 8086
17
and Project
Management
(SEPM)
Topics To be covered
Definition- Microprocessor
 Basic Terms & Types of Data practiced in Microprocessor
Definition of Bus & Types of Bus
Microprocessor History-Overview
General Block Diagram of Microprocessor
Applications of Microprocessor
Features of 8086
2/1/2024
Department of Computer Science and Engineering
Session 1-Introduction to 8086
18
and Project
Management
(SEPM)
Definition – Microprocessor
A Microprocessor is a semi conductor device ( or IC) manufactured
using VLSI technique which fetches ( from memory) , decodes and
executes instructions related to arithmetic and logical operation.
2/1/2024
Department of Computer Science and Engineering
Session 1-Introduction to 8086
19
and Project
Management
(SEPM)
Basic Terms & Types of Data practiced in Microprocessor
1. Data : The quantity ( Binary Number / Code) operated by an
instruction of a program.
2. Address: Address is an identification number in binary for
Memory location
3. Bit : A digit of a binary number or code.
4. Nibble:The 4-bit ( 4 –digit) binary number or code
5. Byte : The 8-bit ( 8 –digit) binary number or code
2/1/2024
Department of Computer Science and Engineering
Session 1-Introduction to 8086
20
and Project
Management
(SEPM)
Basic Terms & Types of Data practiced in Microprocessor
Word : The 16-bit ( 16 –digit) binary number or code
Double Word: The 32-bit ( 32 –digit) binary number or code
Clock: square wave used to synchronize various devices in ÂľP
Memory Capacity = 2^n ,n->no. of address lines
Clock Wave sample
2/1/2024
Department of Computer Science and Engineering
Session 1-Introduction to 8086
21
and Project
Management
(SEPM)
Bus & Types of Bus
A Bus is a group of Conducting lines that carries data, address and
control signals.
Types of Buses
Data Bus: The group of conducting lines that carries data.
Address Bus: The group of conducting lines that carries address
Control bus: The group of conducting lines that carries control
signals
CPU Bus: The group of conducting lines that are directly
connected to a microprocessor
System Bus: The group of conducting lines that carries data,
address and control signals.
2/1/2024
Department of Computer Science and Engineering
Session 1-Introduction to 8086
22
and Project
Management
(SEPM)
Microprocessor History-Overview
1. Generation I
2. Generation II
3. Generation III
4. Generation IV
5. Generation V
2/1/2024
Department of Computer Science and Engineering
Session 1-Introduction to 8086
23
and Project
Management
(SEPM)
Generation -I
Introduced in 1971.
It was the first microprocessor by Intel.
It was a 4-bit ¾P.
Its clock speed was 740KHz.
It had 2,300 transistors.
It could execute around 60,000 instructions
per second.
2/1/2024
Department of Computer Science and Engineering
Session 1-Introduction to 8086
24
and Project
Management
(SEPM)
Generation -II
 Introduced in 1976.
 It was also 8-bit ¾P.
 Its clock speed was 3 MHz.
 Its data bus is 8-bit and address bus is 16-
bit.
 It had 6,500 transistors.
 Could execute 7,69,230 instructions per
second.
 It could access 64 KB of memory.
 It had 246 instructions.
2/1/2024
Department of Computer Science and Engineering
Session 1-Introduction to 8086
25
and Project
Management
(SEPM)
Generation -III
 Introduced in 1978.
 It was first 16-bit ¾P.
 Its clock speed is 4.77 MHz, 8 MHz and
10 MHz, depending on the version.
 Its data bus is 16-bit and address bus is
20-bit.
 It had 29,000 transistors.
 Could execute 2.5 million instructions
per second.
 It could access 1 MB of memory.
 It had 22,000 instructions.
2/1/2024
Department of Computer Science and Engineering
Session 1-Introduction to 8086
26
and Project
Management
(SEPM)
Generation -IV
Introduced in 1986.
It was first 32-bit ¾P.
Its data bus is 32-bit and address bus is
32-bit.
It could address 4 GB of memory.
It had 2,75,000 transistors.
Its clock speed varied from 16 MHz to 33
MHz depending upon the various versions.
2/1/2024
Department of Computer Science and Engineering
Session 1-Introduction to 8086
27
and Project
Management
(SEPM)
Generation -V
 Introduced in 1993.
 It was also 32-bit ¾P.
 It was originally named 80586.
 Its clock speed was 66 MHz.
 Its data bus is 32-bit and address bus is
32-bit.
2/1/2024
Department of Computer Science and Engineering
Session 1-Introduction to 8086
28
and Project
Management
(SEPM)
General Block Diagram of Microprocessor
Input
Devices
Processing
Data into
Information
Output
Devices
Control
Unit
Secondary Storage Devices
Arithmetic-
Logic
Unit
Primary Storage
Unit
Central Processing Unit
Keyboard,
Mouse
etc
Monitor
Printer
Disks, Tapes, Optical Disks
2/1/2024
Department of Computer Science and Engineering
Session 1-Introduction to 8086
29
and Project
Management
(SEPM)
Applications of Microprocessor
Calculators
Accounting system
Games machine
Instrumentation
Traffic light Control
Multi user, multi-function environments
Military applications
Communication systems
2/1/2024
Department of Computer Science and Engineering
Session 1-Introduction to 8086
30
and Project
Management
(SEPM)
Features of 8086
INTEL launched 8086 in 1978
8086 is a 16-bit microprocessor with
16-bit Data Bus {D0-D15}
20-bit Address Bus {A0-A19}
[can access upto 2^20= 1 MB memory locations] .
It has multiplexed address and data bus
 AD0-AD15 and A16–A19.
It can support upto 64K I/O ports
2/1/2024
Department of Computer Science and Engineering
Session 1-Introduction to 8086
31
and Project
Management
(SEPM)
Features of 8086
It provides 14, 16-bit registers.
8086 requires one phase clock with a 33% duty cycle to
provide optimized internal timing.
– Range of clock:
• 5 MHz for 8086
• 8Mhz for 8086-2
• 10Mhz for 8086-1
2/1/2024
Department of Computer Science and Engineering
Session -2
32
and Project
Management
(SEPM)
Microprocessor
Architecture (8086)
2/1/2024
Department of Computer Science and Engineering
Microprocessor 8086 Architecture
33
and Project
Management
(SEPM)
2/1/2024
Execution Unit
• Main components are
• Instruction Decoder
• Control System
• Arithmetic Logic Unit
• General Purpose Registers
• Flag Register
• Pointer & Index registers
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Instruction Decoder
• Translates instructions fetched from memory into a
series of actions which EU carries out
Control System
 Generates timing and control signals to
perform the internal operations of the
microprocessor
Arithmetic Logic Unit
 EU has a 16-bit ALU which can ADD,
SUBTRACT, AND, OR, increment, decrement,
complement or shift binary numbers
35
Instruction Decoder
2/1/2024
General Purpose Registers
• EU has 8 general purpose
registers
• Can be individually used for
storing 8-bit data
• AL register is also called
Accumulator
• Two registers can also be
combined to form 16-bit
registers
• The valid register pairs are –
AX, BX, CX, DX
AH AL
BH BL
CH CL
DH DL
AH AL AX
BH BL BX
CH CL CX
DH DL DX
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Flag Register
• 8086 has a 16-bit flag register
• Contains 9 active flags
• There are two types of flags in 8086
• Conditional flags – six flags, set or reset by EU on the basis
of results of some arithmetic operations
• Control flags – three flags, used to control certain
operations of the processor
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U U U U OF DF IF TF SF ZF U AF U PF U CF
Flag Register
1. CF CARRY FLAG
Conditional Flags
(Compatible with 8085,
except OF)
2. PF PARITY FLAG
3. AF AUXILIARY CARRY
4. ZF ZERO FLAG
5. SF SIGN FLAG
6. OF OVERFLOW FLAG
7. TF TRAP FLAG
Control Flags
8. IF INTERRUPT FLAG
9. DF DIRECTION FLAG
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Flag Register
39
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
OF DF IF TF SF ZF AF PF CF
Carry Flag
This flag is set, when there is
a carry out of MSB in case of
addition or a borrow in case
of subtraction.
Parity Flag
This flag is set to 1, if the lower
byte of the result contains even
number of 1’s ; for odd number
of 1’s set to zero.
Auxiliary Carry Flag
This is set, if there is a carry from the
lowest nibble, i.e, bit three during
addition, or borrow for the lowest
nibble, i.e, bit three, during
subtraction.
Zero Flag
This flag is set, if the result of
the computation or comparison
performed by an instruction is
zero
Sign Flag
This flag is set, when the
result of any computation
is negative
Trap Flag
If this flag is set, the processor
enters the single step execution
mode by generating internal
interrupts after the execution of
each instruction
Interrupt Flag
Causes the 8086 to recognize
external mask interrupts; clearing IF
disables these interrupts.
Direction Flag
This is used by string manipulation instructions. If this flag bit
is ‘0’, the string is processed beginning from the lowest
address to the highest address, i.e., auto incrementing mode.
Otherwise, the string is processed from the highest address
towards the lowest address, i.e., auto incrementing mode.
Over flow Flag
This flag is set, if an overflow occurs, i.e, if the result of a signed
operation is large enough to accommodate in a destination
register. The result is of more than 7-bits in size in case of 8-bit
signed operation and more than 15-bits in size in case of 16-bit
sign operations, then the overflow will be set.
2/1/2024
40
Registers, Flag
Sl.No. Type Register width Name of register
1 General purpose
register
16 bit AX, BX, CX, DX
8 bit AL, AH, BL, BH, CL, CH, DL, DH
2 Pointer register 16 bit SP, BP
3 Index register 16 bit SI, DI
4 Instruction Pointer 16 bit IP
5 Segment register 16 bit CS, DS, SS, ES
6 Flag (PSW) 16 bit Flag register
8086 registers
categorized
into 4 groups
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
OF DF IF TF SF ZF AF PF CF
2/1/2024
41
Register Name of the Register Special Function
AX 16-bit Accumulator Stores the 16-bit results of arithmetic and logic operations
AL 8-bit Accumulator Stores the 8-bit results of arithmetic and logic operations
BX Base register Used to hold base value in base addressing mode to access memory
data
CX Count Register Used to hold the count value in SHIFT, ROTATE and LOOP instructions
DX Data Register Used to hold data for multiplication and division operations
SP Stack Pointer Used to hold the offset address of top stack memory
BP Base Pointer Used to hold the base value in base addressing using SS register to
access data from stack memory
SI Source Index Used to hold index value of source operand (data) for string
instructions
DI Data Index Used to hold the index value of destination operand (data) for string
operations
Registers and Special Functions
2/1/2024
Bus Interface Unit
• Main Components are
Instruction Queue
Segment Registers
Instruction Pointer
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Instruction Queue
• 8086 employs parallel processing.
• When EU is busy decoding or executing current
instruction, the buses of 8086 may not be in use.
• At that time, BIU can use buses to fetch upto six
instruction bytes.
• BIU stores these pre-fetched bytes in a FIFO register
called Instruction Queue.
• When EU is ready for its next instruction, it simply
reads the instruction from the queue in BIU.
43
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Pipelining
• EU of 8086 does not have to wait in between
for BIU to fetch next instruction byte from
memory
• So the presence of a queue in 8086 speeds
up the processing
• Fetching the next instruction while the
current instruction executes is called
pipelining
44
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Memory Segmentation
• 8086 has a 20-bit address bus.
• So it can address a maximum of 1MB of memory.
• 8086 can work with only four 64KB segments at a
time within this 1MB range.
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Segment Registers
• CS -is used for addressing memory location
in the code segment of the memory.
• DS-points to the data segment of the
memory where the data is stored.
• SS-is used for addressing stack segment of
the memory.
• ES- also refers to a segment in the memory
which is another data segment in the
memory.
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Instruction Pointer (IP) Register
• a 16-bit register.
• Holds 16-bit offset, of the next instruction byte in
the code segment
• BIU uses IP and CS registers to generate the 20-bit
address of the instruction to be fetched from
memory
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Other Pointer & Index Registers
• Base Pointer (BP) register
• Source Index (SI) register
• Destination Index (DI) register
• Can be used for temporary storage of data
• Main use is to hold a 16-bit offset of a data word in
one of the segments
48
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Department of Computer Science and Engineering
Session -3
49
and Project
Management
(SEPM)
Addressing Modes
2/1/2024
Addressing mode
• The way in which operand is specified in the
instruction is called addressing mode.
50
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Various Addressing Modes
1. Immediate Addressing Mode
2. Register Addressing Mode
3. Direct Addressing Mode
4. Register Indirect Addressing Mode
5. Index Addressing Mode
6. Based Addressing Mode
7. Based & Indexed Addressing Mode
8. Based & Indexed with displacement Addressing
Mode
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IMMEDIATE ADDRESSING MODE
• 8 or 16 bit data can be specified as part of the
instruction
Example
• MOV CL,03H Moves the 8 bit data 03 into CL
• MOV DX,0525H Moves the 16 bit data 0525 in to DX
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2/1/2024
REGISTER ADDRESSING MODE
• register is the source of an operand for an
instruction.
• Example
• MOV AX,DX Moves the 16 bit data DX into AX
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3. DIRECT ADDRESSING MODE
• The addressing mode in which the effective address
of the memory location is written directly in the
instruction.
• Example
MOV AH,[MEMBDS]
• But the memory address is not index or pointer
register
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4. REGISTER INDIRECT ADDRESSING MODE
• Memory address is supplied in an index or pointer register.
Example
MOV AX,[SI] ;
JMP [DI] ;
INC BYTE PTR [BP] ;
DEC WORD PTR [BX] ;
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5.Indexed Addressing Mode
• Memory address is the sum of index register
plus displacement
•Example
MOV AX,[SI+2]
JMP [DI+2]
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6. Based Addressing Mode
• Memory address is the sum of the BX or BP base
register plus a displacement within instruction
• Example
MOV AX,[BP+2]
JMP [BX+2]
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7.BASED & INDEX ADDRESSING MODES
• Memory address is the sum of the index register
& base register
Example
MOV AX,[BX+SI] ;
JMP [BX+DI] ;
INC BYTE PTR [BP+SI] ;
DEC WORD PTR [BP+DI] ;
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8. BASED & INDEXED WITH DISPLACEMENT ADDRESSING MODE
• Memory address is the sum of an index register , base
register and displacement within instruction.
• Example
MOV AX,[BX+SI+6] ;
JMP [BX+DI+6] ;
INC BYTE PTR [BP+SI+5] ;
DEC WORD PTR [BP+DI+5] ;
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2/1/2024
Department of Computer Science and Engineering
Session -4
60
and Project
Management
(SEPM)
Instruction sets of
8086
2/1/2024
• Instruction:- An instruction is a binary pattern
designed inside a microprocessor to perform a specific
function.
• Opcode:- It stands for operational code. It specifies the
type of operation to be performed by CPU. It is the
first field in the machine language instruction format.
• E.g. 08 is the opcode for instruction “MOV X,Y”.
• Operand:- We can also say it as data on which
operation should act. operands may be register values or
memory values.
Instruction set basics
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• Assembler:- it converts the instruction into sequence of
binary bits, so that this bits can be read by the processor.
• Mnemonics:- these are the symbolic codes for either
instructions or commands to perform a particular
function.
• E.g. MOV, ADD, SUB etc.
Instruction set basics
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Data Transfer Instructions
• These instructions are used to transfer the data
from the source operand to the destination
operand.
• Instruction to transfer a word
• MOV − Used to copy the byte or word from the
provided source to the provided destination.
• POP − Used to get a word from the top of the
stack to the provided location.
• PPUSH − Used to put a word at the top of the
stack.
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Data Transfer Instructions
• PUSHA − Used to put all the registers into the
stack.
• POPA − Used to get words from the stack to all
registers.
• XCHG − Used to exchange the data from two
locations.
• XLAT − Used to translate a byte in AL using a
table in the memory.
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Data Transfer Instructions
• Instructions for input and output port transfer
• IN − Used to read a byte or word from the
provided port to the accumulator.
• OUT − Used to send out a byte or word from
the accumulator to the provided port.
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Data Transfer Instructions
• Instructions to transfer the address
• LEA − Used to load the address of operand
into the provided register.
• LDS − Used to load DS register and other
provided register from the memory
• LES − Used to load ES register and other
provided register from the memory.
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1.DATA TRANSFER INSTRUCTIONS
Mnemonic Meaning Format Operation
MOV Move Mov D,S (S)  (D)
XCHG Exchange XCHG D,S (S) (D)
LEA Load Effective Address LEA
Reg16,EA
EA  (Reg16)
PUSH pushes the operand into top of
stack.
PUSH BX
POP pops the operand from top of
stack to Des.
POP BX
IN transfers the operand from
specified port to accumulator
register.
IN AX,0028
OUT transfers the operand from
accumulator to specified
port.
OUT 0028,AL
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Arithmetic Instructions
• These instructions are used to perform
arithmetic operations like addition, subtraction,
multiplication, division, etc.
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Instructions to perform addition
• ADD − Used to add the provided byte to
byte/word to word.
• ADC − Used to add with carry.
• INC − Used to increment the provided
byte/word by 1.
• AAA − Used to adjust ASCII after addition.
• DAA − Used to adjust the decimal after the
addition/subtraction operation.
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Instructions to perform subtraction
• SUB − Used to subtract the byte from byte/word from
word.
• SBB − Used to perform subtraction with borrow.
• DEC − Used to decrement the provided byte/word by
1.
• NPG − Used to negate each bit of the provided
byte/word and add 1/2’s complement.
• CMP − Used to compare 2 provided byte/word.
• AAS − Used to adjust ASCII codes after subtraction.
• DAS − Used to adjust decimal after subtraction.
70
2/1/2024
Multiplication Instruction
• MUL − Used to multiply unsigned byte by
byte/word by word.
• IMUL − Used to multiply signed byte by
byte/word by word.
• AAM − Used to adjust ASCII codes after
multiplication.
71
2/1/2024
Instructions to perform division
• DIV − Used to divide the unsigned word by
byte or unsigned double word by word.
• IDIV − Used to divide the signed word by byte
or signed double word by word.
72
2/1/2024
2. ARITHMETIC INSTRUCTIONS
Mnemonic Meaning Format Operation
SUB Subtract SUB D,S (D) - (S)  (D)
Borrow  (CF)
SBB Subtract with
borrow
SBB D,S (D) - (S) - (CF)  (D)
DEC Decrement by one DEC D (D) - 1  (D)
NEG Negate NEG D
DAS Decimal adjust for
subtraction
DAS Convert the result in AL to packed
decimal format
AAS ASCII adjust for
subtraction
AAS (AL) difference (AH) dec by 1 if
borrow
ADD Addition ADD D,S (S)+(D)  (D) carry  (CF)
ADC Add with carry ADC D,S (S)+(D)+(CF)  (D) carry  (CF)
INC Increment by one INC D (D)+1  (D)
AAA ASCII adjust for
addition
AAA If the sum is >9, AH
is incremented by 1
DAA Decimal adjust for DAA Adjust AL for decimal Packed BCD
73
2/1/2024
Department of Computer Science and Engineering
Mnemonic Meaning Format Operation
AND
OR
XOR
NOT
Logical AND
Logical Inclusive OR
Logical Exclusive OR
LOGICAL NOT
AND D,S
OR D,S
XOR D,S
NOT D
(S) · (D) → (D)
(S)+(D) → (D)
(S) (D)→(D)
(D) → (D)
+
3. Bit Manipulation Instructions
74
2/1/2024
Department of Computer Science and Engineering
4. Shift Instructions
Mnemonic Meaning Format
SAL/SHL
SHR
SAR
Shift arithmetic Left/
Shift Logical left
Shift logical right
Shift arithmetic
right
SAL/SHL D,
Count
SHR D, Count
SAR D, Count
75
2/1/2024
Department of Computer Science and Engineering 76
Department of Computer Science and Engineering 77
Mnemonic Meaning Format
ROL Rotate Left ROL D,Count
ROR Rotate Right ROR D,Count
RCL Rotate Left through Carry RCL D,Count
RCR Rotate right through Carry RCR D,Count
4. Rotate Instructions
2/1/2024
5. Branching Instructions
• CALL - call a subroutine
• RET - returns the control from procedure to calling
program
• JMP Des – Unconditional Jump
• Jxx Des – conditional Jump (ex: JC 8000)
• Loop Des
78
2/1/2024
79
6. STRING INSTRUCTIONS
• CMPS Des, Src - compares the string bytes
• SCAS String - scans a string
• MOVS / MOVSB / MOVSW - moving of byte or
word
• REP (Repeat) - repetition of the instruction
80
2/1/2024
7. PROCESSOR CONTROL INSTRUCTIONS
• STC – set the carry flag (CF=1)
• CLC – clear the carry flag (CF=0)
• STD – set the direction flag (DF=1)
• CLD – clear the direction flag (DF=0)
• HLT – stop fetching & execution
• NOP – no operation(no processing)
• LOCK - control of system bus is not taken by other µP
• WAIT - CPU will not do any processing
• ESC - µP does NOP or access a data from memory for coprocessor
81
2/1/2024
Department of Computer Science and Engineering
Session -4
82
and Project
Management
(SEPM)
Assembly Language
Programming (8086)
2/1/2024
Increment an 8-bit number
• MOV AL, 05H Move 8-bit data to AL.
• INC AL Increment AL.
Increment an 16-bit number
• MOV AX, 0005H Move 16-bit data to AX.
• INC AX Increment AX.
83
2/1/2024
Decrement an 8-bit number
• MOV AL, 05H Move 8-bit data to AL.
• DEC AL Decrement AL.
Decrement an 16-bit number
• MOV AX, 0005H Move 16-bit data to AX.
• DEC AX Decrement AX.
84
2/1/2024
1’s complement of an 8-bit number.
• MOV AL, 05H Move 8-bit data to AL.
• NOT AL Complement AL.
1’s complement of a 16-bit number.
• MOV AX, 0005H Move 16-bit data to AX.
• NOT AX Complement AX.
85
2/1/2024
2’s complement of an 8-bit number.
• MOV AL, 05H Move 8-bit data to AL.
• NOT AL Complement AL.
• INC AL Increment AL
2’s complement of a 16-bit number.
• MOV AX, 0005H Move 16-bit data to AX.
• NOT AX Complement AX.
• INC AX Increment AX
86
2/1/2024
Add two 8-bit numbers
MOV AL, 05H Move 1st 8-bit number to AL.
MOV BL, 03H Move 2nd 8-bit number to BL.
ADD AL, BL Add BL with AL.
Add two 16-bit numbers
MOV AX, 0005H Move 1st 16-bit number to AX.
MOV BX, 0003H Move 2nd 16-bit number to BX.
ADD AX, BX Add BX with AX.
87
2/1/2024
subtract two 8-bit numbers
MOV AL, 05H Move 1st 8-bit number to AL.
MOV BL, 03H Move 2nd 8-bit number to BL.
SUB AL, BL Subtract BL from AL.
subtract two 16-bit numbers
MOV AX, 0005H Move 1st 16-bit number to AX.
MOV BX, 0003H Move 2nd 16-bit number to BX.
SUB AX, BX subtract BX from AX.
88
2/1/2024
Multiply two 8-bit unsigned numbers
MOV AL, 04H Move 1st 8-bit number to AL.
MOV BL, 02H Move 2nd 8-bit number to BL.
MUL BL Multiply BL with AL and the result will
be in AX.
Multiply two 8-bit signed numbers
MOV AL, 04H Move 1st 8-bit number to AL
MOV BL, 02H Move 2nd 8-bit number to BL.
IMUL BL Multiply BL with AL and the result will
be in AX.
89
2/1/2024
Multiply two 16-bit unsigned numbers.
MOV AX, 0004H Move 1st 16-bit number to AX.
MOV BX, 0002H Move 2nd 16-bit number to BX.
MUL BX Multiply BX with AX and the result will
be in DX:AX
{4*2=0008=> 08=> AX , 00=> DX}
90
2/1/2024
Divide two 16-bit unsigned numbers.
91
MOV AX, 0004H Move 1st 16-bit number to AX.
MOV BX, 0002H Move 2nd 16-bit number to BX.
DIV BX Divide BX from AX
result will be in AX & DX
{4/2=0002=> 02=> AX ,00=>DX}
(ie: Quotient => AX,Reminder => DX )
2/1/2024
16 BIT ADDITION
92
2/1/2024
16 BIT SUBTRACTION
93
2/1/2024
Department of Computer Science and Engineering
Session -5
94
and Project
Management
(SEPM)
Assembler Directives
2/1/2024
Department of Computer Science and Engineering 95
• A statement to give direction to the assembler
to perform task of the assembly process.
Assembler directive
2/1/2024
Directives Expansion
96
2/1/2024
97
Directives Expansion
2/1/2024
• used to tell the assembler that the name of the
logical segment should be used for a specified
segment.
• Example
• ASSUME CS: CODE
• ASSUME DS: DATA
98
Assume Assembler directive
2/1/2024
DB Directive
• Its used to declare a byte type variable or to
store a byte in memory location
Example
• PRICE DB 49h, 98h, 29h ;
• Declare an array of 3 bytes, named as PRICE
and initialize.
99
2/1/2024
DW directive
• Its used to define a variable of type word or to
reserve storage location of type word in memory.
• Example:
• MULTIPLIER DW 437Ah ;
• this declares a variable of type word and named it as
MULTIPLIER.
100
2/1/2024
Assembler directive
• DD(define double word)-This directive is used to
declare a variable of type double word or restore
memory locations which can be accessed as type
double word.
• DQ (define quadword)-This directive is used to
tell the assembler to declare a variable 4 words in
length or to reserve 4 words of storage in memory .
• DT (define ten bytes)-It is used to inform the
assembler to define a variable which is 10 bytes in
length or to reserve 10 bytes of storage in memory.
101
2/1/2024
• END- End program .
• This directive indicates the assembler that this is the
end of the program module.
• The assembler ignores any statements after an END
directive.
• ENDP- End procedure:
• It indicates the end of the procedure (subroutine) to
the assembler.
102
Assembler directive
2/1/2024
Example
• SQUARE_NUM PROCE ;
• It start the procedure;
• Some steps to find the square root of a number
• SQUARE_NUM ENDP ;
• Hear it is the End for the procedure
103
2/1/2024
Assembler directive
• ENDS-End Segment:
• This directive is used with the name of the segment
to indicate the end of that logical segment.
104
2/1/2024
• EQU - This EQU directive is used to give a name to
some value or to a symbol.
• PROC - The PROC directive is used to identify the start
of a procedure.
• PTR -This PTR operator is used to assign a specific
type of a variable or to a label.
• ORG -Originate : The ORG statement changes the
starting offset address of the data.
105
Assembler directive
2/1/2024
Department of Computer Science and Engineering 106
and Project
Management
(SEPM)
Modular Programming
2/1/2024
• consist of thousands of lines of instructions or
operation code.
• The size of the modules are reduced to a humanly
comprehensible and manageable level.
• Program is composed from several smaller
modules.
107
Modular programming
2/1/2024
1. Each module is independent of other modules.
2. Each module has one input and one output.
3. A module is small in size.
4. Programming a single function per module is a goal
108
Characteristics of a module
2/1/2024
Advantages of Modular Programming
• It is easy to write, test and debug a module.
• Code can be reused.
• The programmer can divide tasks.
• Re-usable Modules can be re-used within a
program
109
2/1/2024
MODULAR PROGRAMMING
1.LINKING & RELOCATION
2.STACKS
3.Procedures
4.Interrupts & Interrupt Routines
5.Macros
110
2/1/2024
Department of Computer Science and Engineering
Session -6
111
and Project
Management
(SEPM)
Linking & Relocation
2/1/2024
LINKER
• A linker is a program used to join together several
object files into one large object file.
• The linker produces a link file which contains the
binary codes for all the combined modules.
The linker program is invoked using the following
options.
C> LINK
or
C>LINK MS.OBJ
112
2/1/2024
• The loader is a part of the operating system and
places codes into the memory after reading the
‘.exe’ file
• A program called locator reallocates the linked file
and creates a file for permanent location of codes in a
standard format.
113
Loader
2/1/2024
Creation and execution of a program
114
2/1/2024
Loader
->Loader is a utility program which takes object code as
input prepares it for execution and loads the
executable code into the memory .
->Loader is actually responsible for initializing the
process of execution.
115
2/1/2024
Functions of loaders:
1.It allocates the space for program in the
memory(Allocation)
2.It resolves the code between the object
modules(Linking)
3. some address dependent locations in the program,
address constants must be adjusted according to
allocated space(Relocation)
4. It also places all the machine instructions and data
of corresponding programs and subroutines into
the memory .(Loading)
116
2/1/2024
Relocating loader (BSS Loader)
• When a single subroutine is changed then all the
subroutine needs to be reassembled.
• The binary symbolic subroutine (BSS) loader used in
IBM 7094 machine is relocating loader.
• In BSS loader there are many procedure segments
• The assembler reads one sourced program and
assembles each procedure segment independently.
• The output of the relocating loader is the object
program
117
2/1/2024
ASM-86 assembler regulating the way segments with the same
name are concatenated & sometimes they are overlaid.
Form of segment directive:
Segment name SEGEMENT Combine-type
Possible combine-type are:
• PUBLIC
• COMMON
• STACK
• AT
• MEMORY
118
SEGMENT COMBINATION
2/1/2024
Department of Computer Science and Engineering
Session -7
119
and Project
Management
(SEPM)
Procedures
2/1/2024
Procedures
• Procedure is a part of code that can be called from
your program in order to make some specific task.
• Procedures make program more structural and
easier to understand.
120
2/1/2024
• syntax for procedure declaration:
name PROC
…………. ; here goes the code
…………. ; of the procedure ...
RET
name ENDP
here PROC is the procedure name.(used in top & bottom)
RET - used to return from OS. CALL-call a procedure
PROC & ENDP – complier directives
CALL & RET - instructions
121
Procedures
2/1/2024
EXAMPLE 1 (call a procedure)
ORG 100h
CALL m1
MOV AX, 2
RET ; return to operating system.
m1 PROC
MOV BX, 5
RET ; return to caller.
m1 ENDP
END
• The above example calls procedure m1, does MOV BX, 5 &
returns to the next instruction after CALL: MOV AX, 2.
122
2/1/2024
Example 2 : several ways to pass
parameters to procedure
ORG 100h
MOV AL, 1
MOV BL, 2
CALL m2
CALL m2
CALL m2
CALL m2
RET ; return to operating system.
m2 PROC
MUL BL ; AX = AL * BL.
RET ; return to caller.
m2 ENDP
END
value of AL register is updated every time the
procedure is called.
final result in AX register is 16 (or 10h)
123
2/1/2024
Department of Computer Science and Engineering
Session -7
124
and Project
Management
(SEPM)
Stacks
2/1/2024
Department of Computer Science and Engineering
2/1/2024 125
Stacks
• Stack is an area of memory for keeping temporary
data.
• STACK is used by CALL & RET instructions.
PUSH -stores 16 bit value in the stack.
POP -gets 16 bit value from the stack.
• PUSH and POP instruction are especially useful
because we don't have too much registers to operate
1. Store original value of the register in stack (using
PUSH).
2. Use the register for any purpose.
3. Restore the original value of the register from stack
(using POP).
126
2/1/2024
Stacks
Example-1 (store value in STACK using PUSH &
POP)
ORG 100h
MOV AX, 1234h
PUSH AX ; store value of AX in stack.
MOV AX, 5678h ; modify the AX value.
POP AX ; restore the original value of AX.
RET
END
127
2/1/2024
Program to exchange values
ORG 100h
MOV AX, 1212h ; store 1212h in AX.
MOV BX, 3434h ; store 3434h in BX
PUSH AX ; store value of AX in stack.
PUSH BX ; store value of BX in stack.
POP AX ; set AX to original value of BX.
POP BX ; set BX to original value of AX.
RET
END
push 1212h and then 3434h, on pop we will
first get 3434h and only after it 1212h
128
2/1/2024
Department of Computer Science and Engineering
Session -8
129
and Project
Management
(SEPM)
Macros
2/1/2024
Department of Computer Science and Engineering
2/1/2024 130
Macros
• Macros are just like procedures, but not really.
• Macros exist only until your code is compiled
• After compilation all macros are replaced with real
instructions
• several macros to make coding easier
(Reduce large & complex programs)
name MACRO [parameters,...]
<instructions>
ENDM
131
2/1/2024
Macros Example
Example1 : Macro Definitions
SAVE MACRO definition of MACRO name SAVE
PUSH AX
PUSH BX
PUSH CX
ENDM
RETREIVE MACRO Another definition of MACRO name RETREIVE
POP CX
POP BX
POP AX
ENDM
132
2/1/2024
Department of Computer Science and Engineering 133
2/1/2024
MACROS with Parameters
Example:
COPY MACRO x, y ; macro named COPY with 2 parameters{x, y}
PUSH AX
MOV AX, x
MOV y, AX
POP AX
ENDM
134
2/1/2024
Department of Computer Science and Engineering
Session -8
135
and Project
Management
(SEPM)
Interrupts and Interrupts
Service Routine (ISR)
2/1/2024
INTERRUPT & ISR ?
• ‘Interrupts’ is to break the sequence of operation.
• ‘interrupt’ breaks the normal sequence of execution
of instructions
• diverts its execution to some other program called
Interrupt Service Routine (ISR)
136
2/1/2024
Department of Computer Science and Engineering 137
2/1/2024
Department of Computer Science and Engineering 138
2/1/2024
Department of Computer Science and Engineering 139
2/1/2024
• Maskable Interrupt: An Interrupt that can be
disabled or ignored by the instructions of CPU are
called as Maskable Interrupt.
• Non- Maskable Interrupt: An interrupt that cannot
be disabled or ignored by the instructions of CPU are
called as Non- Maskable Interrupt.
• Software interrupts are machine instructions that
amount to a call to the designated interrupt
subroutine, usually identified by interrupt
number. Ex: INT0 - INT255
140
2/1/2024
INTERRUPT Types
Department of Computer Science and Engineering 141
2/1/2024
Department of Computer Science and Engineering
Type – 0 Divide Error Interrupt
Quotient is too large cant be fit in AL/AX or Divide By Zero {AX/0=∞}
Type –1 Single Step Interrupt
used for executing the program in single step mode by setting Trap Flag
To Set Trap Flag PUSHF
MOV BP,SP
OR [BP+0],0100H;SET BIT8
POPF
Type – 2 Non Maskable Interrupt
This Interrupt is used for executing ISR of NMI Pin (Positive Egde Signal). NMI
cant be masked by S/W
Type – 3 Break Point Interrupt
used for providing BREAK POINTS in the program
Type – 4 Over Flow Interrupt
used to handle any Overflow Error after signed arithmetic
142
2/1/2024
Department of Computer Science and Engineering
PRIORITY OF INTERRUPTS
Interrupt Type Priority
INT0, INT3-INT 255, Highest
NMI(INT2)
INTR
SINGLE STEP Lowest
143
2/1/2024
Department of Computer Science and Engineering
Session -9
144
and Project
Management
(SEPM)
Byte and String
Manipulation
2/1/2024
Move, compare, store, load, scan
145
2/1/2024
Byte Manipulation
Example 1:
MOV AX,[1000]
MOV BX,[1002]
AND AX,BX
MOV [2000],AX
HLT
Example 2:
MOV AX,[1000]
MOV BX,[1002]
OR AX,BX
MOV [2000],AX
HLT
Example 3:
MOV AX,[1000]
MOV BX,[1002]
XOR AX,BX
MOV [2000],AX
HLT
Example 4:
MOV AX,[1000]
NOT AX
MOV [2000],AX
HLT
146
2/1/2024
STRING MANIPULATION
1. Copying a string (MOV SB)
MOV CX,0003 copy 3 memory locations
MOV SI,1000
MOV DI,2000
L1 CLD
MOV SB
DEC CX decrement CX
JNZ L1
HLT
147
2/1/2024
Thank You
Department of Computer Science and Engineering

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  • 1. Department of Computer Science and Engineering 10211CS109 – MICROPROCESSORS AND MICROCONTROLLERS School of Computing Vel Tech Rangarajan Dr. Sagunthala R&D Institute of Science and Technology Course Category : Program Core Credits : 2 Slot : Slot 7&12 Semester : Winter Academic Year : 2023-2024 Faculty Name : Dr.S.YAZHINIAN
  • 2. Department of Computer Science and Engineering Course Introduction 01-02-2024 2 and Project Management (SEPM) Preamble The Purpose of the course is to provide students with the Knowledge of Microprocessors and Microcontroller. To solve real world problems in an efficient manner, this course also emphasis on architecture, Programming and system design used in various day to day gadgets. Pre-requisite Sl. No Course Code Course Name 1 1151CS104 Digital Electronics
  • 3. Department of Computer Science and Engineering Course Introduction 01-02-2024 3 and Project Management (SEPM) Correlation of Cos with POs and PSO COs PO 1 PO 2 PO 3 PO 4 PO 5 PO 6 PO 7 PO 8 PO 9 PO10 PO11 PO12 PSO 1 PSO 2 PSO 3 CO1 M H H M L L M M CO2 L L H M L CO3 L M L M L L H L M M CO4 M L L CO5 L L M L M
  • 4. Department of Computer Science and Engineering Course Introduction 01-02-2024 4 and Project Management (SEPM) COURSE OUTCOMES CO Nos. Course Outcomes Level of learning domain (Based on revised Bloom’s) CO1 Develop an ALP in 8086 microprocessor using the internal organization for the given specification K3 CO2 Understand the bus architecture of 8086 microprocessor and other advanced processors K2 CO3 Describe the architecture and functional block of 8051 microcontroller K2 CO4 Illustrate the various peripherals devices such as 8255, 8279, 8251, 8253,8259 and 8237 K2 CO5 Understand the microcontroller application and basic architecture of PIC,ARM and ATMEGA processors. K2
  • 5. Department of Computer Science and Engineering Why Microprocessor & Controllers? 01-02-2024 5 and Project Management (SEPM) Microprocessor is the heart of computer systems. The complete mechanism and structure of the systems can be grasped It is used to build a system which can perform multiple tasks by avoiding the use of traditional transistor It is the basic building block of the third generation computers that makes them compact and versatile.
  • 6. Department of Computer Science and Engineering COURSE CONTENT 01-02-2024 6 and Project Management (SEPM) COURSE CONTENT UNIT I- THE 8086 MICROPROCESSOR (9) Introduction to 8086 – Microprocessor architecture – Addressing modes - Instruction set and assembler directives – Assembly language programming – Modular Programming - Linking and Relocation - Stacks - Procedures – Macros – Interrupts and interrupt service routines – Byte and String Manipulation. UNIT II 8086 SYSTEM BUS STRUCTURE (9) 8086 signals – Basic configurations – System bus timing –System design using 8086 – IO programming – Introduction to Multiprogramming – System Bus Structure – Multiprocessor configurations – Coprocessor, closely coupled and loosely Coupled configurations – Introduction to Pentium family processors. UNIT III 8051 ARCHITECTURE (9) Architecture – memory organization –I/O ports and circuits-Timers - Interrupts –serial communication – Addressing modes –Instruction set.
  • 7. Department of Computer Science and Engineering COURSE CONTENT 01-02-2024 7 and Project Management (SEPM) UNIT IV PERIPHERAL DEVICES (10) Parallel peripheral Interface (8255) - Timer / Counter (8253) - Keyboard and Display Controller (8279) - USART (8251) - Interrupt Controller (8259)- DMA Controller (8237). UNITVMICROCONTROLLER APPLICATIONS & ADVANCED PROCESSOR (8) Temperature control system- Motor speed control system – Traffic light System – Elevator system - Introduction to architecture of PIC, ARM, ATMEGA processor Total: 45 Periods References: 1.Kenneth J Ayala, The 8051 Microcontroller Architecture Programming and Application, third Edition, Penram International Publishers. 2.A.K Ray & K.M. Burchandi, Advanced Microprocessor and peripherals Architectures, Programming and interfacing “, second edition, Tata McGraw-Hill . Online resources 1.https://www.youtube.com/watch?v=liRPtvj7bFU&list=PL0E131A78ABFBFDD0 2.https://www.youtube.com/watch?v=95uGOJ1Ud2c&list=PLJGA4olwzpA- 3.rvcdWULcRuMn2495g0n8j
  • 8. Department of Computer Science and Engineering COURSE DESCRIPTION 01-02-2024 8 and Project Management (SEPM) • To provide students with the Knowledge of Microprocessors and Microcontroller. • To solve real world problems in an efficient manner • This course also emphasis on architecture, Programming and system design used in various day to day gadgets.
  • 9. Department of Computer Science and Engineering LEARNING RESOURCES 01-02-2024 9 and Project Management (SEPM) Text Books: 1.Yu-Cheng Liu, Glenn A.Gibson, “Microcomputer Systems: The 8086 / 8088 Family -Architecture, Programming and Design”, Second Edition, Prentice Hall of India, 2007. 2. Muhammad Ali Mazidi, Janice GillispieMazidi and Rolin D McKinlay, The 8051 microcontroller and embedded systems using assembly and C, second edition Pearson education Asia. (UNIT 2 & 3) 3.Fredrick J. Hill, Gerald R. Peterson, " Digital logic and microprocessors", Wiley publication
  • 10. Department of Computer Science and Engineering UNIT- I 01-02-2024 10 and Project Management (SEPM) THE 8086 MICROPROCESSOR
  • 11. Department of Computer Science and Engineering UNIT- I - Scenario 01-02-2024 11 and Project Management (SEPM) Title: THE 8086 MICROPROCESSOR Course Outcome – CO1:Develop an ALP in 8086 microprocessor using the internal organization for the given specification K-Level – K3 Hours Allotted : 09 Hours
  • 12. Department of Computer Science and Engineering COURSE DESCRIPTION 01-02-2024 12 and Project Management (SEPM) • To provide students with the Knowledge of Microprocessors and Microcontroller. • To solve real world problems in an efficient manner • This course also emphasis on architecture, Programming and system design used in various day to day gadgets.
  • 13. Department of Computer Science and Engineering UNIT -1 13 and Project Management (SEPM) THE 8086 MICOPROCESSOR 2/1/2024
  • 14. Department of Computer Science and Engineering Unit -1 -Scenario 14 and Project Management (SEPM) Title: THE 8086 MICROPROCESSOR Course Outcome – CO1:Develop an ALP in 8086 microprocessor using the internal organization for the given specification K-Level – K3 Hours Allotted : 09 Hours 2/1/2024
  • 15. Department of Computer Science and Engineering Unit -1 : Course Contents 15 and Project Management (SEPM) THE 8086 MICROPROCESSOR Introduction to 8086 Microprocessor architecture Addressing modes Instruction set and assembler directives Assembly language programming & Modular Programming  Linking and Relocation Stacks & Procedures Macros & Interrupts and interrupt service routines Byte and String Manipulation. 2/1/2024
  • 16. Department of Computer Science and Engineering Session -I 16 and Project Management (SEPM) Introduction to 8086 2/1/2024
  • 17. Department of Computer Science and Engineering Session 1-Introduction to 8086 17 and Project Management (SEPM) Topics To be covered Definition- Microprocessor  Basic Terms & Types of Data practiced in Microprocessor Definition of Bus & Types of Bus Microprocessor History-Overview General Block Diagram of Microprocessor Applications of Microprocessor Features of 8086 2/1/2024
  • 18. Department of Computer Science and Engineering Session 1-Introduction to 8086 18 and Project Management (SEPM) Definition – Microprocessor A Microprocessor is a semi conductor device ( or IC) manufactured using VLSI technique which fetches ( from memory) , decodes and executes instructions related to arithmetic and logical operation. 2/1/2024
  • 19. Department of Computer Science and Engineering Session 1-Introduction to 8086 19 and Project Management (SEPM) Basic Terms & Types of Data practiced in Microprocessor 1. Data : The quantity ( Binary Number / Code) operated by an instruction of a program. 2. Address: Address is an identification number in binary for Memory location 3. Bit : A digit of a binary number or code. 4. Nibble:The 4-bit ( 4 –digit) binary number or code 5. Byte : The 8-bit ( 8 –digit) binary number or code 2/1/2024
  • 20. Department of Computer Science and Engineering Session 1-Introduction to 8086 20 and Project Management (SEPM) Basic Terms & Types of Data practiced in Microprocessor Word : The 16-bit ( 16 –digit) binary number or code Double Word: The 32-bit ( 32 –digit) binary number or code Clock: square wave used to synchronize various devices in ÂľP Memory Capacity = 2^n ,n->no. of address lines Clock Wave sample 2/1/2024
  • 21. Department of Computer Science and Engineering Session 1-Introduction to 8086 21 and Project Management (SEPM) Bus & Types of Bus A Bus is a group of Conducting lines that carries data, address and control signals. Types of Buses Data Bus: The group of conducting lines that carries data. Address Bus: The group of conducting lines that carries address Control bus: The group of conducting lines that carries control signals CPU Bus: The group of conducting lines that are directly connected to a microprocessor System Bus: The group of conducting lines that carries data, address and control signals. 2/1/2024
  • 22. Department of Computer Science and Engineering Session 1-Introduction to 8086 22 and Project Management (SEPM) Microprocessor History-Overview 1. Generation I 2. Generation II 3. Generation III 4. Generation IV 5. Generation V 2/1/2024
  • 23. Department of Computer Science and Engineering Session 1-Introduction to 8086 23 and Project Management (SEPM) Generation -I Introduced in 1971. It was the first microprocessor by Intel. It was a 4-bit ÂľP. Its clock speed was 740KHz. It had 2,300 transistors. It could execute around 60,000 instructions per second. 2/1/2024
  • 24. Department of Computer Science and Engineering Session 1-Introduction to 8086 24 and Project Management (SEPM) Generation -II  Introduced in 1976.  It was also 8-bit ÂľP.  Its clock speed was 3 MHz.  Its data bus is 8-bit and address bus is 16- bit.  It had 6,500 transistors.  Could execute 7,69,230 instructions per second.  It could access 64 KB of memory.  It had 246 instructions. 2/1/2024
  • 25. Department of Computer Science and Engineering Session 1-Introduction to 8086 25 and Project Management (SEPM) Generation -III  Introduced in 1978.  It was first 16-bit ÂľP.  Its clock speed is 4.77 MHz, 8 MHz and 10 MHz, depending on the version.  Its data bus is 16-bit and address bus is 20-bit.  It had 29,000 transistors.  Could execute 2.5 million instructions per second.  It could access 1 MB of memory.  It had 22,000 instructions. 2/1/2024
  • 26. Department of Computer Science and Engineering Session 1-Introduction to 8086 26 and Project Management (SEPM) Generation -IV Introduced in 1986. It was first 32-bit ÂľP. Its data bus is 32-bit and address bus is 32-bit. It could address 4 GB of memory. It had 2,75,000 transistors. Its clock speed varied from 16 MHz to 33 MHz depending upon the various versions. 2/1/2024
  • 27. Department of Computer Science and Engineering Session 1-Introduction to 8086 27 and Project Management (SEPM) Generation -V  Introduced in 1993.  It was also 32-bit ÂľP.  It was originally named 80586.  Its clock speed was 66 MHz.  Its data bus is 32-bit and address bus is 32-bit. 2/1/2024
  • 28. Department of Computer Science and Engineering Session 1-Introduction to 8086 28 and Project Management (SEPM) General Block Diagram of Microprocessor Input Devices Processing Data into Information Output Devices Control Unit Secondary Storage Devices Arithmetic- Logic Unit Primary Storage Unit Central Processing Unit Keyboard, Mouse etc Monitor Printer Disks, Tapes, Optical Disks 2/1/2024
  • 29. Department of Computer Science and Engineering Session 1-Introduction to 8086 29 and Project Management (SEPM) Applications of Microprocessor Calculators Accounting system Games machine Instrumentation Traffic light Control Multi user, multi-function environments Military applications Communication systems 2/1/2024
  • 30. Department of Computer Science and Engineering Session 1-Introduction to 8086 30 and Project Management (SEPM) Features of 8086 INTEL launched 8086 in 1978 8086 is a 16-bit microprocessor with 16-bit Data Bus {D0-D15} 20-bit Address Bus {A0-A19} [can access upto 2^20= 1 MB memory locations] . It has multiplexed address and data bus  AD0-AD15 and A16–A19. It can support upto 64K I/O ports 2/1/2024
  • 31. Department of Computer Science and Engineering Session 1-Introduction to 8086 31 and Project Management (SEPM) Features of 8086 It provides 14, 16-bit registers. 8086 requires one phase clock with a 33% duty cycle to provide optimized internal timing. – Range of clock: • 5 MHz for 8086 • 8Mhz for 8086-2 • 10Mhz for 8086-1 2/1/2024
  • 32. Department of Computer Science and Engineering Session -2 32 and Project Management (SEPM) Microprocessor Architecture (8086) 2/1/2024
  • 33. Department of Computer Science and Engineering Microprocessor 8086 Architecture 33 and Project Management (SEPM) 2/1/2024
  • 34. Execution Unit • Main components are • Instruction Decoder • Control System • Arithmetic Logic Unit • General Purpose Registers • Flag Register • Pointer & Index registers 34 2/1/2024
  • 35. Instruction Decoder • Translates instructions fetched from memory into a series of actions which EU carries out Control System  Generates timing and control signals to perform the internal operations of the microprocessor Arithmetic Logic Unit  EU has a 16-bit ALU which can ADD, SUBTRACT, AND, OR, increment, decrement, complement or shift binary numbers 35 Instruction Decoder 2/1/2024
  • 36. General Purpose Registers • EU has 8 general purpose registers • Can be individually used for storing 8-bit data • AL register is also called Accumulator • Two registers can also be combined to form 16-bit registers • The valid register pairs are – AX, BX, CX, DX AH AL BH BL CH CL DH DL AH AL AX BH BL BX CH CL CX DH DL DX 36 2/1/2024
  • 37. Flag Register • 8086 has a 16-bit flag register • Contains 9 active flags • There are two types of flags in 8086 • Conditional flags – six flags, set or reset by EU on the basis of results of some arithmetic operations • Control flags – three flags, used to control certain operations of the processor 37 2/1/2024
  • 38. U U U U OF DF IF TF SF ZF U AF U PF U CF Flag Register 1. CF CARRY FLAG Conditional Flags (Compatible with 8085, except OF) 2. PF PARITY FLAG 3. AF AUXILIARY CARRY 4. ZF ZERO FLAG 5. SF SIGN FLAG 6. OF OVERFLOW FLAG 7. TF TRAP FLAG Control Flags 8. IF INTERRUPT FLAG 9. DF DIRECTION FLAG 38 2/1/2024
  • 39. Flag Register 39 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 OF DF IF TF SF ZF AF PF CF Carry Flag This flag is set, when there is a carry out of MSB in case of addition or a borrow in case of subtraction. Parity Flag This flag is set to 1, if the lower byte of the result contains even number of 1’s ; for odd number of 1’s set to zero. Auxiliary Carry Flag This is set, if there is a carry from the lowest nibble, i.e, bit three during addition, or borrow for the lowest nibble, i.e, bit three, during subtraction. Zero Flag This flag is set, if the result of the computation or comparison performed by an instruction is zero Sign Flag This flag is set, when the result of any computation is negative Trap Flag If this flag is set, the processor enters the single step execution mode by generating internal interrupts after the execution of each instruction Interrupt Flag Causes the 8086 to recognize external mask interrupts; clearing IF disables these interrupts. Direction Flag This is used by string manipulation instructions. If this flag bit is ‘0’, the string is processed beginning from the lowest address to the highest address, i.e., auto incrementing mode. Otherwise, the string is processed from the highest address towards the lowest address, i.e., auto incrementing mode. Over flow Flag This flag is set, if an overflow occurs, i.e, if the result of a signed operation is large enough to accommodate in a destination register. The result is of more than 7-bits in size in case of 8-bit signed operation and more than 15-bits in size in case of 16-bit sign operations, then the overflow will be set. 2/1/2024
  • 40. 40 Registers, Flag Sl.No. Type Register width Name of register 1 General purpose register 16 bit AX, BX, CX, DX 8 bit AL, AH, BL, BH, CL, CH, DL, DH 2 Pointer register 16 bit SP, BP 3 Index register 16 bit SI, DI 4 Instruction Pointer 16 bit IP 5 Segment register 16 bit CS, DS, SS, ES 6 Flag (PSW) 16 bit Flag register 8086 registers categorized into 4 groups 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 OF DF IF TF SF ZF AF PF CF 2/1/2024
  • 41. 41 Register Name of the Register Special Function AX 16-bit Accumulator Stores the 16-bit results of arithmetic and logic operations AL 8-bit Accumulator Stores the 8-bit results of arithmetic and logic operations BX Base register Used to hold base value in base addressing mode to access memory data CX Count Register Used to hold the count value in SHIFT, ROTATE and LOOP instructions DX Data Register Used to hold data for multiplication and division operations SP Stack Pointer Used to hold the offset address of top stack memory BP Base Pointer Used to hold the base value in base addressing using SS register to access data from stack memory SI Source Index Used to hold index value of source operand (data) for string instructions DI Data Index Used to hold the index value of destination operand (data) for string operations Registers and Special Functions 2/1/2024
  • 42. Bus Interface Unit • Main Components are Instruction Queue Segment Registers Instruction Pointer 42 2/1/2024
  • 43. Instruction Queue • 8086 employs parallel processing. • When EU is busy decoding or executing current instruction, the buses of 8086 may not be in use. • At that time, BIU can use buses to fetch upto six instruction bytes. • BIU stores these pre-fetched bytes in a FIFO register called Instruction Queue. • When EU is ready for its next instruction, it simply reads the instruction from the queue in BIU. 43 2/1/2024
  • 44. Pipelining • EU of 8086 does not have to wait in between for BIU to fetch next instruction byte from memory • So the presence of a queue in 8086 speeds up the processing • Fetching the next instruction while the current instruction executes is called pipelining 44 2/1/2024
  • 45. Memory Segmentation • 8086 has a 20-bit address bus. • So it can address a maximum of 1MB of memory. • 8086 can work with only four 64KB segments at a time within this 1MB range. 45 2/1/2024
  • 46. Segment Registers • CS -is used for addressing memory location in the code segment of the memory. • DS-points to the data segment of the memory where the data is stored. • SS-is used for addressing stack segment of the memory. • ES- also refers to a segment in the memory which is another data segment in the memory. 46 2/1/2024
  • 47. Instruction Pointer (IP) Register • a 16-bit register. • Holds 16-bit offset, of the next instruction byte in the code segment • BIU uses IP and CS registers to generate the 20-bit address of the instruction to be fetched from memory 47 2/1/2024
  • 48. Other Pointer & Index Registers • Base Pointer (BP) register • Source Index (SI) register • Destination Index (DI) register • Can be used for temporary storage of data • Main use is to hold a 16-bit offset of a data word in one of the segments 48 2/1/2024
  • 49. Department of Computer Science and Engineering Session -3 49 and Project Management (SEPM) Addressing Modes 2/1/2024
  • 50. Addressing mode • The way in which operand is specified in the instruction is called addressing mode. 50 2/1/2024
  • 51. Various Addressing Modes 1. Immediate Addressing Mode 2. Register Addressing Mode 3. Direct Addressing Mode 4. Register Indirect Addressing Mode 5. Index Addressing Mode 6. Based Addressing Mode 7. Based & Indexed Addressing Mode 8. Based & Indexed with displacement Addressing Mode 51 2/1/2024
  • 52. IMMEDIATE ADDRESSING MODE • 8 or 16 bit data can be specified as part of the instruction Example • MOV CL,03H Moves the 8 bit data 03 into CL • MOV DX,0525H Moves the 16 bit data 0525 in to DX 52 2/1/2024
  • 53. REGISTER ADDRESSING MODE • register is the source of an operand for an instruction. • Example • MOV AX,DX Moves the 16 bit data DX into AX 53 2/1/2024
  • 54. 3. DIRECT ADDRESSING MODE • The addressing mode in which the effective address of the memory location is written directly in the instruction. • Example MOV AH,[MEMBDS] • But the memory address is not index or pointer register 54 2/1/2024
  • 55. 4. REGISTER INDIRECT ADDRESSING MODE • Memory address is supplied in an index or pointer register. Example MOV AX,[SI] ; JMP [DI] ; INC BYTE PTR [BP] ; DEC WORD PTR [BX] ; 55 2/1/2024
  • 56. 5.Indexed Addressing Mode • Memory address is the sum of index register plus displacement •Example MOV AX,[SI+2] JMP [DI+2] 56 2/1/2024
  • 57. 6. Based Addressing Mode • Memory address is the sum of the BX or BP base register plus a displacement within instruction • Example MOV AX,[BP+2] JMP [BX+2] 57 2/1/2024
  • 58. 7.BASED & INDEX ADDRESSING MODES • Memory address is the sum of the index register & base register Example MOV AX,[BX+SI] ; JMP [BX+DI] ; INC BYTE PTR [BP+SI] ; DEC WORD PTR [BP+DI] ; 58 2/1/2024
  • 59. 8. BASED & INDEXED WITH DISPLACEMENT ADDRESSING MODE • Memory address is the sum of an index register , base register and displacement within instruction. • Example MOV AX,[BX+SI+6] ; JMP [BX+DI+6] ; INC BYTE PTR [BP+SI+5] ; DEC WORD PTR [BP+DI+5] ; 59 2/1/2024
  • 60. Department of Computer Science and Engineering Session -4 60 and Project Management (SEPM) Instruction sets of 8086 2/1/2024
  • 61. • Instruction:- An instruction is a binary pattern designed inside a microprocessor to perform a specific function. • Opcode:- It stands for operational code. It specifies the type of operation to be performed by CPU. It is the first field in the machine language instruction format. • E.g. 08 is the opcode for instruction “MOV X,Y”. • Operand:- We can also say it as data on which operation should act. operands may be register values or memory values. Instruction set basics 61 2/1/2024
  • 62. • Assembler:- it converts the instruction into sequence of binary bits, so that this bits can be read by the processor. • Mnemonics:- these are the symbolic codes for either instructions or commands to perform a particular function. • E.g. MOV, ADD, SUB etc. Instruction set basics 62 2/1/2024
  • 63. Data Transfer Instructions • These instructions are used to transfer the data from the source operand to the destination operand. • Instruction to transfer a word • MOV − Used to copy the byte or word from the provided source to the provided destination. • POP − Used to get a word from the top of the stack to the provided location. • PPUSH − Used to put a word at the top of the stack. 63 2/1/2024
  • 64. Data Transfer Instructions • PUSHA − Used to put all the registers into the stack. • POPA − Used to get words from the stack to all registers. • XCHG − Used to exchange the data from two locations. • XLAT − Used to translate a byte in AL using a table in the memory. 64 2/1/2024
  • 65. Data Transfer Instructions • Instructions for input and output port transfer • IN − Used to read a byte or word from the provided port to the accumulator. • OUT − Used to send out a byte or word from the accumulator to the provided port. 65 2/1/2024
  • 66. Data Transfer Instructions • Instructions to transfer the address • LEA − Used to load the address of operand into the provided register. • LDS − Used to load DS register and other provided register from the memory • LES − Used to load ES register and other provided register from the memory. 66 2/1/2024
  • 67. 1.DATA TRANSFER INSTRUCTIONS Mnemonic Meaning Format Operation MOV Move Mov D,S (S)  (D) XCHG Exchange XCHG D,S (S) (D) LEA Load Effective Address LEA Reg16,EA EA  (Reg16) PUSH pushes the operand into top of stack. PUSH BX POP pops the operand from top of stack to Des. POP BX IN transfers the operand from specified port to accumulator register. IN AX,0028 OUT transfers the operand from accumulator to specified port. OUT 0028,AL 67 2/1/2024
  • 68. Arithmetic Instructions • These instructions are used to perform arithmetic operations like addition, subtraction, multiplication, division, etc. 68 2/1/2024
  • 69. Instructions to perform addition • ADD − Used to add the provided byte to byte/word to word. • ADC − Used to add with carry. • INC − Used to increment the provided byte/word by 1. • AAA − Used to adjust ASCII after addition. • DAA − Used to adjust the decimal after the addition/subtraction operation. 69 2/1/2024
  • 70. Instructions to perform subtraction • SUB − Used to subtract the byte from byte/word from word. • SBB − Used to perform subtraction with borrow. • DEC − Used to decrement the provided byte/word by 1. • NPG − Used to negate each bit of the provided byte/word and add 1/2’s complement. • CMP − Used to compare 2 provided byte/word. • AAS − Used to adjust ASCII codes after subtraction. • DAS − Used to adjust decimal after subtraction. 70 2/1/2024
  • 71. Multiplication Instruction • MUL − Used to multiply unsigned byte by byte/word by word. • IMUL − Used to multiply signed byte by byte/word by word. • AAM − Used to adjust ASCII codes after multiplication. 71 2/1/2024
  • 72. Instructions to perform division • DIV − Used to divide the unsigned word by byte or unsigned double word by word. • IDIV − Used to divide the signed word by byte or signed double word by word. 72 2/1/2024
  • 73. 2. ARITHMETIC INSTRUCTIONS Mnemonic Meaning Format Operation SUB Subtract SUB D,S (D) - (S)  (D) Borrow  (CF) SBB Subtract with borrow SBB D,S (D) - (S) - (CF)  (D) DEC Decrement by one DEC D (D) - 1  (D) NEG Negate NEG D DAS Decimal adjust for subtraction DAS Convert the result in AL to packed decimal format AAS ASCII adjust for subtraction AAS (AL) difference (AH) dec by 1 if borrow ADD Addition ADD D,S (S)+(D)  (D) carry  (CF) ADC Add with carry ADC D,S (S)+(D)+(CF)  (D) carry  (CF) INC Increment by one INC D (D)+1  (D) AAA ASCII adjust for addition AAA If the sum is >9, AH is incremented by 1 DAA Decimal adjust for DAA Adjust AL for decimal Packed BCD 73 2/1/2024
  • 74. Department of Computer Science and Engineering Mnemonic Meaning Format Operation AND OR XOR NOT Logical AND Logical Inclusive OR Logical Exclusive OR LOGICAL NOT AND D,S OR D,S XOR D,S NOT D (S) ¡ (D) → (D) (S)+(D) → (D) (S) (D)→(D) (D) → (D) + 3. Bit Manipulation Instructions 74 2/1/2024
  • 75. Department of Computer Science and Engineering 4. Shift Instructions Mnemonic Meaning Format SAL/SHL SHR SAR Shift arithmetic Left/ Shift Logical left Shift logical right Shift arithmetic right SAL/SHL D, Count SHR D, Count SAR D, Count 75 2/1/2024
  • 76. Department of Computer Science and Engineering 76
  • 77. Department of Computer Science and Engineering 77 Mnemonic Meaning Format ROL Rotate Left ROL D,Count ROR Rotate Right ROR D,Count RCL Rotate Left through Carry RCL D,Count RCR Rotate right through Carry RCR D,Count 4. Rotate Instructions 2/1/2024
  • 78. 5. Branching Instructions • CALL - call a subroutine • RET - returns the control from procedure to calling program • JMP Des – Unconditional Jump • Jxx Des – conditional Jump (ex: JC 8000) • Loop Des 78 2/1/2024
  • 79. 79
  • 80. 6. STRING INSTRUCTIONS • CMPS Des, Src - compares the string bytes • SCAS String - scans a string • MOVS / MOVSB / MOVSW - moving of byte or word • REP (Repeat) - repetition of the instruction 80 2/1/2024
  • 81. 7. PROCESSOR CONTROL INSTRUCTIONS • STC – set the carry flag (CF=1) • CLC – clear the carry flag (CF=0) • STD – set the direction flag (DF=1) • CLD – clear the direction flag (DF=0) • HLT – stop fetching & execution • NOP – no operation(no processing) • LOCK - control of system bus is not taken by other ÂľP • WAIT - CPU will not do any processing • ESC - ÂľP does NOP or access a data from memory for coprocessor 81 2/1/2024
  • 82. Department of Computer Science and Engineering Session -4 82 and Project Management (SEPM) Assembly Language Programming (8086) 2/1/2024
  • 83. Increment an 8-bit number • MOV AL, 05H Move 8-bit data to AL. • INC AL Increment AL. Increment an 16-bit number • MOV AX, 0005H Move 16-bit data to AX. • INC AX Increment AX. 83 2/1/2024
  • 84. Decrement an 8-bit number • MOV AL, 05H Move 8-bit data to AL. • DEC AL Decrement AL. Decrement an 16-bit number • MOV AX, 0005H Move 16-bit data to AX. • DEC AX Decrement AX. 84 2/1/2024
  • 85. 1’s complement of an 8-bit number. • MOV AL, 05H Move 8-bit data to AL. • NOT AL Complement AL. 1’s complement of a 16-bit number. • MOV AX, 0005H Move 16-bit data to AX. • NOT AX Complement AX. 85 2/1/2024
  • 86. 2’s complement of an 8-bit number. • MOV AL, 05H Move 8-bit data to AL. • NOT AL Complement AL. • INC AL Increment AL 2’s complement of a 16-bit number. • MOV AX, 0005H Move 16-bit data to AX. • NOT AX Complement AX. • INC AX Increment AX 86 2/1/2024
  • 87. Add two 8-bit numbers MOV AL, 05H Move 1st 8-bit number to AL. MOV BL, 03H Move 2nd 8-bit number to BL. ADD AL, BL Add BL with AL. Add two 16-bit numbers MOV AX, 0005H Move 1st 16-bit number to AX. MOV BX, 0003H Move 2nd 16-bit number to BX. ADD AX, BX Add BX with AX. 87 2/1/2024
  • 88. subtract two 8-bit numbers MOV AL, 05H Move 1st 8-bit number to AL. MOV BL, 03H Move 2nd 8-bit number to BL. SUB AL, BL Subtract BL from AL. subtract two 16-bit numbers MOV AX, 0005H Move 1st 16-bit number to AX. MOV BX, 0003H Move 2nd 16-bit number to BX. SUB AX, BX subtract BX from AX. 88 2/1/2024
  • 89. Multiply two 8-bit unsigned numbers MOV AL, 04H Move 1st 8-bit number to AL. MOV BL, 02H Move 2nd 8-bit number to BL. MUL BL Multiply BL with AL and the result will be in AX. Multiply two 8-bit signed numbers MOV AL, 04H Move 1st 8-bit number to AL MOV BL, 02H Move 2nd 8-bit number to BL. IMUL BL Multiply BL with AL and the result will be in AX. 89 2/1/2024
  • 90. Multiply two 16-bit unsigned numbers. MOV AX, 0004H Move 1st 16-bit number to AX. MOV BX, 0002H Move 2nd 16-bit number to BX. MUL BX Multiply BX with AX and the result will be in DX:AX {4*2=0008=> 08=> AX , 00=> DX} 90 2/1/2024
  • 91. Divide two 16-bit unsigned numbers. 91 MOV AX, 0004H Move 1st 16-bit number to AX. MOV BX, 0002H Move 2nd 16-bit number to BX. DIV BX Divide BX from AX result will be in AX & DX {4/2=0002=> 02=> AX ,00=>DX} (ie: Quotient => AX,Reminder => DX ) 2/1/2024
  • 94. Department of Computer Science and Engineering Session -5 94 and Project Management (SEPM) Assembler Directives 2/1/2024
  • 95. Department of Computer Science and Engineering 95 • A statement to give direction to the assembler to perform task of the assembly process. Assembler directive 2/1/2024
  • 98. • used to tell the assembler that the name of the logical segment should be used for a specified segment. • Example • ASSUME CS: CODE • ASSUME DS: DATA 98 Assume Assembler directive 2/1/2024
  • 99. DB Directive • Its used to declare a byte type variable or to store a byte in memory location Example • PRICE DB 49h, 98h, 29h ; • Declare an array of 3 bytes, named as PRICE and initialize. 99 2/1/2024
  • 100. DW directive • Its used to define a variable of type word or to reserve storage location of type word in memory. • Example: • MULTIPLIER DW 437Ah ; • this declares a variable of type word and named it as MULTIPLIER. 100 2/1/2024
  • 101. Assembler directive • DD(define double word)-This directive is used to declare a variable of type double word or restore memory locations which can be accessed as type double word. • DQ (define quadword)-This directive is used to tell the assembler to declare a variable 4 words in length or to reserve 4 words of storage in memory . • DT (define ten bytes)-It is used to inform the assembler to define a variable which is 10 bytes in length or to reserve 10 bytes of storage in memory. 101 2/1/2024
  • 102. • END- End program . • This directive indicates the assembler that this is the end of the program module. • The assembler ignores any statements after an END directive. • ENDP- End procedure: • It indicates the end of the procedure (subroutine) to the assembler. 102 Assembler directive 2/1/2024
  • 103. Example • SQUARE_NUM PROCE ; • It start the procedure; • Some steps to find the square root of a number • SQUARE_NUM ENDP ; • Hear it is the End for the procedure 103 2/1/2024
  • 104. Assembler directive • ENDS-End Segment: • This directive is used with the name of the segment to indicate the end of that logical segment. 104 2/1/2024
  • 105. • EQU - This EQU directive is used to give a name to some value or to a symbol. • PROC - The PROC directive is used to identify the start of a procedure. • PTR -This PTR operator is used to assign a specific type of a variable or to a label. • ORG -Originate : The ORG statement changes the starting offset address of the data. 105 Assembler directive 2/1/2024
  • 106. Department of Computer Science and Engineering 106 and Project Management (SEPM) Modular Programming 2/1/2024
  • 107. • consist of thousands of lines of instructions or operation code. • The size of the modules are reduced to a humanly comprehensible and manageable level. • Program is composed from several smaller modules. 107 Modular programming 2/1/2024
  • 108. 1. Each module is independent of other modules. 2. Each module has one input and one output. 3. A module is small in size. 4. Programming a single function per module is a goal 108 Characteristics of a module 2/1/2024
  • 109. Advantages of Modular Programming • It is easy to write, test and debug a module. • Code can be reused. • The programmer can divide tasks. • Re-usable Modules can be re-used within a program 109 2/1/2024
  • 110. MODULAR PROGRAMMING 1.LINKING & RELOCATION 2.STACKS 3.Procedures 4.Interrupts & Interrupt Routines 5.Macros 110 2/1/2024
  • 111. Department of Computer Science and Engineering Session -6 111 and Project Management (SEPM) Linking & Relocation 2/1/2024
  • 112. LINKER • A linker is a program used to join together several object files into one large object file. • The linker produces a link file which contains the binary codes for all the combined modules. The linker program is invoked using the following options. C> LINK or C>LINK MS.OBJ 112 2/1/2024
  • 113. • The loader is a part of the operating system and places codes into the memory after reading the ‘.exe’ file • A program called locator reallocates the linked file and creates a file for permanent location of codes in a standard format. 113 Loader 2/1/2024
  • 114. Creation and execution of a program 114 2/1/2024
  • 115. Loader ->Loader is a utility program which takes object code as input prepares it for execution and loads the executable code into the memory . ->Loader is actually responsible for initializing the process of execution. 115 2/1/2024
  • 116. Functions of loaders: 1.It allocates the space for program in the memory(Allocation) 2.It resolves the code between the object modules(Linking) 3. some address dependent locations in the program, address constants must be adjusted according to allocated space(Relocation) 4. It also places all the machine instructions and data of corresponding programs and subroutines into the memory .(Loading) 116 2/1/2024
  • 117. Relocating loader (BSS Loader) • When a single subroutine is changed then all the subroutine needs to be reassembled. • The binary symbolic subroutine (BSS) loader used in IBM 7094 machine is relocating loader. • In BSS loader there are many procedure segments • The assembler reads one sourced program and assembles each procedure segment independently. • The output of the relocating loader is the object program 117 2/1/2024
  • 118. ASM-86 assembler regulating the way segments with the same name are concatenated & sometimes they are overlaid. Form of segment directive: Segment name SEGEMENT Combine-type Possible combine-type are: • PUBLIC • COMMON • STACK • AT • MEMORY 118 SEGMENT COMBINATION 2/1/2024
  • 119. Department of Computer Science and Engineering Session -7 119 and Project Management (SEPM) Procedures 2/1/2024
  • 120. Procedures • Procedure is a part of code that can be called from your program in order to make some specific task. • Procedures make program more structural and easier to understand. 120 2/1/2024
  • 121. • syntax for procedure declaration: name PROC …………. ; here goes the code …………. ; of the procedure ... RET name ENDP here PROC is the procedure name.(used in top & bottom) RET - used to return from OS. CALL-call a procedure PROC & ENDP – complier directives CALL & RET - instructions 121 Procedures 2/1/2024
  • 122. EXAMPLE 1 (call a procedure) ORG 100h CALL m1 MOV AX, 2 RET ; return to operating system. m1 PROC MOV BX, 5 RET ; return to caller. m1 ENDP END • The above example calls procedure m1, does MOV BX, 5 & returns to the next instruction after CALL: MOV AX, 2. 122 2/1/2024
  • 123. Example 2 : several ways to pass parameters to procedure ORG 100h MOV AL, 1 MOV BL, 2 CALL m2 CALL m2 CALL m2 CALL m2 RET ; return to operating system. m2 PROC MUL BL ; AX = AL * BL. RET ; return to caller. m2 ENDP END value of AL register is updated every time the procedure is called. final result in AX register is 16 (or 10h) 123 2/1/2024
  • 124. Department of Computer Science and Engineering Session -7 124 and Project Management (SEPM) Stacks 2/1/2024
  • 125. Department of Computer Science and Engineering 2/1/2024 125 Stacks • Stack is an area of memory for keeping temporary data. • STACK is used by CALL & RET instructions. PUSH -stores 16 bit value in the stack. POP -gets 16 bit value from the stack.
  • 126. • PUSH and POP instruction are especially useful because we don't have too much registers to operate 1. Store original value of the register in stack (using PUSH). 2. Use the register for any purpose. 3. Restore the original value of the register from stack (using POP). 126 2/1/2024 Stacks
  • 127. Example-1 (store value in STACK using PUSH & POP) ORG 100h MOV AX, 1234h PUSH AX ; store value of AX in stack. MOV AX, 5678h ; modify the AX value. POP AX ; restore the original value of AX. RET END 127 2/1/2024
  • 128. Program to exchange values ORG 100h MOV AX, 1212h ; store 1212h in AX. MOV BX, 3434h ; store 3434h in BX PUSH AX ; store value of AX in stack. PUSH BX ; store value of BX in stack. POP AX ; set AX to original value of BX. POP BX ; set BX to original value of AX. RET END push 1212h and then 3434h, on pop we will first get 3434h and only after it 1212h 128 2/1/2024
  • 129. Department of Computer Science and Engineering Session -8 129 and Project Management (SEPM) Macros 2/1/2024
  • 130. Department of Computer Science and Engineering 2/1/2024 130 Macros • Macros are just like procedures, but not really. • Macros exist only until your code is compiled • After compilation all macros are replaced with real instructions • several macros to make coding easier (Reduce large & complex programs)
  • 132. Example1 : Macro Definitions SAVE MACRO definition of MACRO name SAVE PUSH AX PUSH BX PUSH CX ENDM RETREIVE MACRO Another definition of MACRO name RETREIVE POP CX POP BX POP AX ENDM 132 2/1/2024
  • 133. Department of Computer Science and Engineering 133 2/1/2024
  • 134. MACROS with Parameters Example: COPY MACRO x, y ; macro named COPY with 2 parameters{x, y} PUSH AX MOV AX, x MOV y, AX POP AX ENDM 134 2/1/2024
  • 135. Department of Computer Science and Engineering Session -8 135 and Project Management (SEPM) Interrupts and Interrupts Service Routine (ISR) 2/1/2024
  • 136. INTERRUPT & ISR ? • ‘Interrupts’ is to break the sequence of operation. • ‘interrupt’ breaks the normal sequence of execution of instructions • diverts its execution to some other program called Interrupt Service Routine (ISR) 136 2/1/2024
  • 137. Department of Computer Science and Engineering 137 2/1/2024
  • 138. Department of Computer Science and Engineering 138 2/1/2024
  • 139. Department of Computer Science and Engineering 139 2/1/2024
  • 140. • Maskable Interrupt: An Interrupt that can be disabled or ignored by the instructions of CPU are called as Maskable Interrupt. • Non- Maskable Interrupt: An interrupt that cannot be disabled or ignored by the instructions of CPU are called as Non- Maskable Interrupt. • Software interrupts are machine instructions that amount to a call to the designated interrupt subroutine, usually identified by interrupt number. Ex: INT0 - INT255 140 2/1/2024 INTERRUPT Types
  • 141. Department of Computer Science and Engineering 141 2/1/2024
  • 142. Department of Computer Science and Engineering Type – 0 Divide Error Interrupt Quotient is too large cant be fit in AL/AX or Divide By Zero {AX/0=∞} Type –1 Single Step Interrupt used for executing the program in single step mode by setting Trap Flag To Set Trap Flag PUSHF MOV BP,SP OR [BP+0],0100H;SET BIT8 POPF Type – 2 Non Maskable Interrupt This Interrupt is used for executing ISR of NMI Pin (Positive Egde Signal). NMI cant be masked by S/W Type – 3 Break Point Interrupt used for providing BREAK POINTS in the program Type – 4 Over Flow Interrupt used to handle any Overflow Error after signed arithmetic 142 2/1/2024
  • 143. Department of Computer Science and Engineering PRIORITY OF INTERRUPTS Interrupt Type Priority INT0, INT3-INT 255, Highest NMI(INT2) INTR SINGLE STEP Lowest 143 2/1/2024
  • 144. Department of Computer Science and Engineering Session -9 144 and Project Management (SEPM) Byte and String Manipulation 2/1/2024
  • 145. Move, compare, store, load, scan 145 2/1/2024
  • 146. Byte Manipulation Example 1: MOV AX,[1000] MOV BX,[1002] AND AX,BX MOV [2000],AX HLT Example 2: MOV AX,[1000] MOV BX,[1002] OR AX,BX MOV [2000],AX HLT Example 3: MOV AX,[1000] MOV BX,[1002] XOR AX,BX MOV [2000],AX HLT Example 4: MOV AX,[1000] NOT AX MOV [2000],AX HLT 146 2/1/2024
  • 147. STRING MANIPULATION 1. Copying a string (MOV SB) MOV CX,0003 copy 3 memory locations MOV SI,1000 MOV DI,2000 L1 CLD MOV SB DEC CX decrement CX JNZ L1 HLT 147 2/1/2024
  • 148. Thank You Department of Computer Science and Engineering