A multilevel paging system is proposed to address the problem of large page tables consuming too much memory. With a 32-bit machine and 4KB pages, each program would need a 4MB page table, and 100 programs would need 400MB of memory just for page tables. A multilevel page table system stores page tables across multiple levels, with higher-level tables referencing lower-level tables. This allows lower-level tables to be paged out to disk since the higher-level table provides the location to find them. Now only the top-level table needs to remain in memory, reducing page table memory usage significantly.
2. Unit 7: Memory Management 2
Multilevel Paging
For 32-bit machine with 4kb pages we need:
• 1M page table entries (32 bits – 12 bits for page offset = 20
bits, 220 =1M)
• Each PTE is about 4 bytes
• Total 4MB for each program
Each program needs its own page table
• If we have 100 programs running, we need 400MB of page
table
And here is the tough part
• We can’t swap the page tables out to disk.
• If the page table is not in RAM, we have no way to access it to
find it!
How can we fix this?
3. Unit 7: Memory Management 3
Multilevel Page table
Disk
0x0003
0x0004
0x0006
0x00AA
0x00f6
----------
First Level
4KB Page (1024 PTEs)
Second Level
4KB Each (1024 PTEs)
Disk
0x0003
0x0004
0x0006
0x00AA
0x00f6
----------
Disk
0x0003
0x0004
0x0006
0x00AA
0x00f6
----------
Disk
0x0009
0x0007
0x0009
0x00AF
0x00f6
----------
4. Unit 7: Memory Management 4
Multilevel Page table
Disk
0x0003
0x0004
0x0006
0x00AA
0x00f6
----------
First Level
4KB Page (1024 PTEs)
Main Memory
Disk
0x0003
0x0004
0x0006
0x00AA
0x00f6
--------
Disk
0x0003
0x0004
0x0006
0x00AA
0x00f6
--------
Disk
0x0003
0x0004
0x0006
0x00AA
0x00f6
--------
2nd level page tables can
be paged out to disk
because we can find them
via the first level table.
Disk
0x0003
0x0004
0x0006
0x00AA
0x00f6
----------
Now as long as the 1st level page
table is always in memory we
can find the others and page
them to disk like any other
memory.
5. Unit 7: Memory Management 5
Single-level table Multilevel Page table
P d
4 B 4 B
Page Table
0
1
2
.
.
15
P1 P2 d
2 B 2 B 4 B
Outer Table
0
1
2
3
Inner Table
0
1
2
3
Inner Table
0
1
2
3
Inner Table
0
1
2
3
Inner Table
0
1
2
3
6. Unit 7: Memory Management 6
GATE Questions
1. Consider a virtual memory system with physical memory of 8GB,
a page size of 8KB and 46 bit virtual address. Assume every page
table exactly fits into a single page. If page table entry size is 4B
then how many levels of page tables would be required.
Page size = 8KB = 213 B
Virtual address space size = 246 B
PTE = 4B = 22 B
Number of pages or number of entries in page table,
= (virtual address space size) / (page size)
= 246 B/213 B
= 233
7. Unit 7: Memory Management 7
GATE Questions Continue
Size of page table,
To create one more level,
Size of page table > page size
Number of page tables in last level,
= 235 B / 213 B = 222
Size of page table [second last level]
= 222*22B = 224B
= (number of entries in page table)*(size of PTE)
= 233*22 B = 235 B
8. Unit 7: Memory Management 8
GATE Questions Continue
To create one more level,
Base address of these tables are stored in page table [third last
level]
Size of page table [third last level]
= 211*22 B
= 213 B = page size
Size of page table [second last level] > page size
Number of page tables in second last level
= 224 B/213 B = 211
9. Unit 7: Memory Management 9
GATE Questions
2. A computer has a 32-bit virtual address space and 4K-byte pages.
A page table entry takes 4 bytes. A multi-level page table is used
because each table must be contained within a page. How many
levels are required?
Logical Address bit=32,
Number of page will be= 2^32/4K = 2^32/2^12 = 2^20
Pages we have entry size of page table= 4 Byte ,
Number of Entry in 1 Page will be= 2^12/2^2=2^10,
bit To represent one Entry=Log(1024)=10bit,
and bit for Page is= 20bit
Therefore Number of Level =20/10=>2 Level Page Table
10. Unit 7: Memory Management 10
GATE Questions
3. A computer has a 44-bit virtual address space and 16K-byte
pages. A page table entry takes 16 bytes. A multi-level page table
is used because each table must be contained within a page. How
many levels are required?
Logical Address bit=44,
Number of page will be= 2^44/16K = 2^44/2^14 = 2^30
Pages we have entry size of page table= 16 Byte ,
Number of Entry in 1 Page will be= 2^14/2^4=2^10,
bit To represent one Entry=Log(1024)=10bit,
and bit for Page is= 30bit
Therefore Number of Level =30/10=>3 Level Page Table
11. Unit 7: Memory Management 11
GATE Questions
4. With multi-level page tables, what is the smallest amount of page
table data we need to keep in memory for each 32-bit program?
If we have 100 programs in memory then, how much memory
needed for page tables?
• 800KB
4KB+4KB
We always need first level page table so we can find second level page
table.
But, the first level page table only helps us to find other page tables. It
isn’t enough by itself to translate any program address. So We need at
least one second level page table to actually translate memory address.
12. Unit 7: Memory Management 12
GATE Questions
5. A computer has a 64-bit virtual address space and 2K-byte pages.
A page table entry takes 4 bytes. A multi-level page table is used
because each table must be contained within a page. How many
levels are required?
Logical Address bit=64,
Number of page will be= 2^64/2K = 2^64/2^11 = 2^53
Pages we have entry sine of page table= 4 Byte ,
Number of Entry in 1 Page will be= 2048/4=>512,
bit To represent one Entry=Log(512)=9bit,
and bit for Page is= 53bit
Therefore Number of Level =53/9=>6 Level Page Table
13. Unit 7: Memory Management 13
Segmentation
Global
Var
main()
{
…….
…....
}
proc1()
{
…….
…….
}
proc2()
{
…….
…….
}
Local Var
proc1
Local Var
proc2
Page0
Page1
Page2
Page3
Logical Address Space
14. Unit 7: Memory Management 14
Segmentation
Global
Var
main()
{
…….
…....
}
proc1()
{
…….
…….
}
proc2()
{
…….
…….
}
Local Var
proc1
Local Var
proc2
Logical Address Space
Segment0
Segment2
Segment1
Physical Memory
Segment1
Segment2
Segment0
…….
…….
…….
…….
100
300
500
900
1000
1100
15. Unit 7: Memory Management 15
Segmentation
Segment 1
Segment 2
Segment 0
Segment N
Physical Memory
300
……
400
……
100
……
SN Base
Address
Limit
0 1000 100
1 500 400
2 100 300
N NM X
16. Unit 7: Memory Management 16
Translating Logical Address into Physical Address
CPU SN Offset
Segment0
Segment2
Segment1
Main Memory
Error
Logical Address
SN Limit BA
0 100 1000
1 400 500
2 300 100
N X NM
d<Limit ⊕
Segment Table
Yes
No
Physical Address
17. Unit 7: Memory Management 17
Segmented Paging
Segment 1
Segment 2
Segment 0
Segment N
Physical Memory
100
200
300
……
500
600
700
800
……
1000
……
SN Base
Address
Limit
0 1000 100
1 500 400
2 100 300
N NM X
19. Unit 7: Memory Management 19
Translating Logical Address into Physical Address
CPU SN PN Offset
SN FN
0 10
1 30
2 90
PN FN
0 150
1 1
2 20
⊕
FN Offset
Page0
Page2
Page1
Main Memory
Segment Table Page Table
Logical Address Physical Address
20. Unit 7: Memory Management 20
GATE Question
7. Consider the following segment table in segmentation scheme:
What happens if the logical address requested is -Segment Id 2 and
offset 1000?
1. Fetches the entry at the physical address 2527 for segment Id2
2. A trap is generated
3. Deadlock
4. Fetches the entry at offset 27 in Segment Id 3
Segment ID Base Limit
0 200 200
1 500 12510
2 1527 498
3 2500 50
21. Unit 7: Memory Management 21
References
https://www.youtube.com/watch?v=59rEMnKWoS4
https://www.geeksforgeeks.org/multilevel-paging-in-operating-
system/
Study Material Prepared by Darshan Institute of Engineering and
Technology.