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iPad mini 1 full Schematic Diagram

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U2600 U2601 R1950 R1951 R8227 R8231 R8232 R8235 R8239 R8240 U1900 C8166 C8191 L2808 L2802 L2804 L2807 L2801 L2803 L45013_RF STD9302 STD9301 STD9300 L45012 L45011 L39007 L46007 L46013 U2710 U8100 FL40001 FL43002_RF FL39002_RF FL46002_RF J5700 U47004_WIFI U41002_RF U44001_RF J46003_RF U45001_RF U42001_RF DZ5710 DZ31001 J2960 Q5701 Q5700 Q8104 J31001_RF U47005 FL42002_RF U40001_RF U39001_RFU43001_RF U2720 U0701 L2200 L2201 L8112 Q1301 C8124 R8219 R8100 U1300 DZ5701 D8228 D8100 U1350 U2200U1700 Q1300 R5704 R2050 R2040 U2050 U2040 XW8203 L2050 L2040 FL44001_RF L38026_RF FL46001_RF U46001_RF L41001_RF U41001_RF SL9305 SL9302 SL9304 J46004_RF J47001_WIFI J47002_WIFI L5700 L47011_WIFI DZ5700 D5700 D5701 FL2040 FL2041 FL2051 FL2050 DZ5702 DZ5703 DZ5704 J2201 U47006 U47002_WIFI U40002_RF FL43001_RF XW1902 XW1903 XW1900 J7500 L8225 L8229 C5750 C8236 D8230 J2950 DZ0600 U47001_WIFI U1400 U1310 U37002_RF L39012 L40011_RF L47015_WIFI L39013 L46027_RF L46026_RF L41006_RF L39005_RF L46016 L38015 L38020_RF L38022 L38021 L38024_RF L38016_RF L46024_RF L42006_RF L41004_RF L47013 L4 70 12 _W IFI L47014 L44011_RF L43023_RF L40010_RF L46023_RF L46010_RF L46004_RF L46003_RF L46002_RF L46021_RF L46020_RF L5701 L5702 L1900 L1901 L1902 L1903 L38001 L38004_RF L38003 L38023_RF L46017 L38017_RF L43009_RF L40005 L40004_RF DZ2962 DZ2960 DZ2961 DZ2963 C1951 C41022_RF C41020_RF C34003_RF C34020_RF C34027_RF C34015_RF C34013_RF C34014_RF C34023_RFC34026_RFC34001_RFC34005_RFC34008_RFC34007_RF C34028_RF C34016_RF C34011_RF C34012_RF C34025_RF C34004_RF C34006_RF C34022_RF C32031_RF C32014_RF C32034_RF C32012_RF C32013 C34024 C34002_RF C34009 C34019_RF C32018 C32017 C32016 C32015 C34018 C34017 C32019 C1911 C1903 C8131 C8195 C39022_RF C44012 C38027 C38003 C38024_RF C38010 C38018_RF C40008_RF C1303 C1360 C2710 C8199 C1752 C1707 C1704 C0930 C1450 C1451 C0640 C0963 C8138 C2601 C2604 C2607 L2233 L5703L5704 L2202L2212L2222L2232 L2611L2610 L2912L2911L2910 R8222 R8216 R8218 RT33001 R1952 R42011_RF R1350 R45003_RF R5702 R8202 R2205 R5700 R2041 R2051 R1750 R1454 R1901 R1000 R1001 R0642 R8203 R1954 R1953 R46008_RF R45010_RF R46007 R7300 R7301 R1914 R41002_RF R39002_RF R5703 R5701 R5760 R2260 R1931 R1930 R1270 R8299 R1753 R45009 R45008 R45007_RF R45006_RF R45005 R45004_RF R40005 R40004 R1850 R1780 R4 30 06 R4 30 05 R0750 R1370 R2053 R2052 R2043R2042 R47015 R31005 R47008_WIFI R1752 R40001_RF R0624 R34004_RF R33017 R33019 R0622 R0625 R0621 R0620 R42003 R43 004 _RF R42007 R42002 R42001 R1751 R1321 R5705 R33008_RF R47017 R47016 R33007 R2950 R1455 R0645 R0832 R0831 R0736 R0688 R0646 R0647 R0739 R0738 R0737R0735 R2601 R2801 R5706 R47013 R47009 R47011_WIFI R47007_WIFI R35002_RF R34006_RFR34007_RF R31103_RF R31104_RF R31101_RF R31102_RF R2724 R0617 R8291 R8290 R2055 R2054 R2045 R2044 R47005 R42010_RF R1320 R35001 R47012_WIFI R0655 R1311 R1310 R1322 R0771 R0770 R0765 R1790 R8292 R35005_RFR35004_RF R2900 R2901 R2902 R2903 R1056 R1055 R1053 R1054 R0640 R46005_RF R36001 R1260 R1210 R1211 R31004_RF R34002_RF R34008 R34001_RF R33010_RF R0941 R33004_RF R33002_RF R34005 R33018 R33001R33003 R1920 R1913 R1912 R1910 R1911 R1940 R1461R1460 R0932 R0704 R0705 R1204 R0930 R1200 R1205 R1201 R1202 R1208 R1209 R1203 R1213 R1207 R0933 R0701 R0931 R0700 R1206 R1051 R1052 R1006 R1005 R0651 R2800 R0720 R0721 R0689 R0702 R0703 R42009_RFR42008_RF R42006_RF R42005 R36004 R40003_RF R0940 R36003 R36005 L38014_RF FL7500 L1702 L1750 L2963 L2701 L2700 L1920 L2702 L2960 L2961 L2962 L1800 L2602 L2800 L38018_RF L38019_RF L1701 L1700 L2600 L2601 L2902 L2900 L2903 L2901 FL0911 Y8138 C47020 C8207 C8206 C8208 C2080 C2060 C41021_RF C41018_RF C47013_WIFI C47003_WIFI C40005_RF C1128 C0608 C35006_RF C1460 C7350 C1461 C1148 C1052 C0611 C0627 C0641 C0610 C0630C1147 C1056 C0646 C0648 C0652 C0651 C1145 C1035C1146 C1054 C1026 C1000 C41004_RF C43017_RF C45001_RF C44013_RF C39020_RF C1002 C1130 C1001 C1129 C1915 C0701 C1310 C1300 C0903 C0908 C2711 C32023 C1410 C1404 C1902 C0907 C0962 C1301 C2801 C2804 C1822 C1821C1820 C41003_RF C45002_RF C37002 C46007_RF C1761 C1850 C1802 C1494 C1493 C1492 C1491 C1490 C2242 C2230 C47004_WIFI C7525 C2232 C47002_WIFI C1760 C1706 C1703 C1700 C7327 C0683 C7310 C7320 C7323 C7321 C7301 C7322 C7312 C7309 C7308 C7314 C7302 C0682 C7303 C7300 C7311 C0961 C0681 C0684 C0680 C7319 C7315 C7317 C7331 C7306 C7324 C7326 C7316 C7325 C7330 C7318 C7305 C7313 C8163 C8299 C7329 C7328 C2600 C2603 C1800 C2973C2909C2906 C2606 C2903C2900 C2970 C2972 C2971 C43023 C42002_RF C42001_RF C43024 C36004 C37005 C37004 C38020_RF C7304 C7307 C1322 C1321 C1320 C5705 C5707 C8223 C8221 C8220 C8217 C8215 C1991 C1990 C2088 C2087 C2068 C2067 C2071 C2073 C2072 C2070 C43005_RF C43006_RF C40009_RF C40010 C40018_RF C41008_RF C41007_RF C45003_RFC45004_RFC45005_RF C42010_RF C42009_RF C42005_RF C44005_RF C42007_RF C42008_RF C39009C39011 C39007_RF C38043 C37003 C39008_RF C36001 C1362 C2086 C2083 C2066C2063 C2084 C2081 C2064 C2061 C2049 C2059 C2040 C2050 C46020_RF C44010_RF C39016 C39014 C36003 C0613 C0607 C46023_RF C39001_RF C43002 C4 30 22 C4 30 21 C39006_RF C37006 C41001_RF C44015 C40004_RF C43010 C40002 C43028_RF C7522C7523 C41017_RF C44003_RF C39004 C44007 C40003_RF C35009_RF C34021 C35001_RF C32006 C42006_RF C41006_RF C37001 C38029 C38031_RF C38019 C38023 C38017_RF C38042_RF C38038_RF C38039_RF C38015 C35007_RF C33008 C41015 C33006 C8214 C2602 C2605 C2902 C2608 C2911C2908 C2905 C0618 C7526 C8164 C2806 C2805 C43026_RF C44011 C39021_RF C40007_RF C36005 C38036_RF C38037_RF C43011_RF C41016_RF C41009_RF C45013 C45014 C39005_RF C41011_RF C44008 C44009 C39018 C39019 C40001 C43009_RF C44001_RF C43001_RF C4 30 20 C4 30 15 C39003_RF C39024_RF C38013_RF C36002_RF C8190 C8155 C8154 C8122 C1106 C1302 C2045 C2055 C8226 C8232 C8126 C8125 C8233 C8231 C8238 C8118 C8117 C8101 C8100 C32007_RF C32011_RF C32008_RF C32009_RF C32010_RF C8102 C8107 C8120 C8119 C8108 C8121 C8103 C8288 C8237 C2053 C2052 C2051 C2043C2041 C32004_RFC32003_RFC32026_RF C32002C32001 C1909 C38090 C1131 C1132 C1133 C2048 C2047 C2058 C2057 C47009_WIFI C1009 C1015 C1151 C1149 C1042 C1135 C1134 C1034 C8152 C8148 C1109 C41005_RF C1107 C1104 C1108 C1105 C1024 C38034_RF C8159 C2241 C1950 C41019_RF C41002 C1901 C1912 C1905 C1906 C1907 C1908 C1910 C1361 C8201 C8235C8234 C1701 C2904 C2901 C2910 C2907 C5701 C37007_RF C1918 C8145 C8168 C8146 C8150 C8153 C8149 C8147 C8167 C2800 C8239 C8129 C8151 C8136 C8209 C8135 C8141 C8139 C8140 C38032_RF C35008_RF C45015_RF C1751 C1920 C8295 C46030 C46027 C5700 C5702 C2807 C47018 C47017 C46029_RF C46028_RF C46022 C46026_RF C2250 C1801 C2046 C2056 C1350 C38022_RF C2701 C2725 C2702 C2721 C8212 C8204 C46025_RF C41012_RF C8210 C38044_RF C1113 C1007 C1414 C1406 C1405 C1413 C0642 C1028 C1039 C1004 C0643 C1027 C1043 C1142 C1143 C1141 C1140 C1139 C1137 C1138 C1136 C1126 C1116 C1122 C1118 C1040 C1006 C1144 C1036 C1032 C1037 C1019 C1038 C1117 C1031 C8169 C1120 C47010_WIFI C38025 C38021 C1041C1119 C1114 C1115 C1124 C1123 C1127 C1112 C1110 C1111 C1005 C1125 C1121 C1030 C1029 C2240 C2203 C1750 C38040_RF C2054 C2044 C2093 C2092 C1904 C1914 C1913 C46013_RF C47016 C47015 C 47 01 2 C47014 C5704 C5703 C2220 C2233 C1932 C1930 C1931 C2206 C1708 C1705 C1702 C7524 C47007_WIFI C40017_RF C2726 C2960 C2961 C2962 C2963 C1917 C1916 C8137 C2802 C0902 C0920 C8171 C8189C8175 C8174 C8173 C8176 C8178 C8177 C8180C8179 C8188 C8172 C8197 C8198 C8196 C8142 C8143 C41010_RF C42013_RF C44014_RF C39012 C39013_RF C46021_RF C2803 C43016 C43027_RF C40011_RF C32040_RF C32033_RF C1411 C47001_WIFI C32037_RF C32030_RF C32029_RF C32022_RF C32021_RF C32036_RF C32035_RF C32020_RF C7380 C8130 C8132 C8144 C8156 C8157 C8158 C8160 C8161 C8162 C2700 C1400 C2723 C1412 C1401 C1402 C2095 C2094 C2090 C2091 C38016_RF C38041_RF C38079_RF C2202 C1753 L8128 L8100 L8101 L8105 L8107 L8110 L8115 L8119 L8121 Y0602 U0652 U2700 J1700 L46028_RF L36001_RF L37006 L38025 L38008 L38009 L38006 L38013 L38010 L38011_RF L2950 L2660 L1904 L1905 L1760 L41007_RF U7300 L32007_RF L32008_RF L32010_RF L32009_RF U35001_RF DZ31002_RF Y33001_RF U32001_RF L32011_RF U34001_RF L39001_RF L45006 L40012_RF L40002_RF L45009 L45005 L40007 L43021_RF L39009L40009 L46018_RF L41003_RF L39006 L45002 L4 30 03 L44010 L39011_RF L43008_RF L4 30 13 L41005_RF L43002_RF L4 30 16 L4 30 20 L44008 L44002 L43017_RF L45010 L45008 L40008 L40006 L37003 L37002 L42 002 _RF L44007 L37005 L37004 L42005 L42004 L42001 L46009 L46006 L45004 L44005 L44006 L43007_RF L43001 L45007_RFL45003_RF L4 30 05 L4 30 14 L4 30 12 L39003_RF L39010_RF L39002_RF L43024 L43022 L41008_RF L46019 L46022_RF L40003_RF L44009_RF U36001_RF U37001 FL39001_RF FL42001 J1800J2601 J46002_RF J2800 U2800 www.witesomtesla.comwww.witesomtesla.com Diesel57Diesel57 Diesel57Diesel57 www.witesomtesla.comwww.witesomtesla.com www.mobile-files.com
TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM REFERENCE DESIGNATOR(S) BOM OPTION TABLE_5_HEAD QTY DESCRIPTIONPART# TABLE_5_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_5_ITEM TABLE_TABLEOFCONTENTS_HEAD DRAWING TABLE_TABLEOFCONTENTS_HEAD 2. ALL CAPACITANCE VALUES ARE IN MICROFARADS. PROPRIETARY PROPERTY OF APPLE INC. 3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ. DESCRIPTION OF REVISION CK APPD 2 1 1245678 B D 6 5 4 3 C A NOTICE OF PROPRIETARY PROPERTY: PAGE THE INFORMATION CONTAINED HEREIN IS THE C A D DATE R SHEET Apple Inc. THE POSESSOR AGREES TO THE FOLLOWING: DRAWING TITLE D SIZE REVISION DRAWING NUMBER BRANCH REV ECN 7 B 3 II NOT TO REPRODUCE OR COPY IT I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE IV ALL RIGHTS RESERVED III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART 1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%. 8 MAIN LOGIC BOARD X123 SCH AND BOARD PART NUMBERS DVT 1 OF 102 000152046213 051-9374 13.0.0 2012-07-02ENGINEERING RELEASED 1 OF 46 AUDIO: CS35L19A AMPS2015 KAVITHA 01/18/2012 FF CAM & MIC CONNECTORS N/A17 N/A26 BUTTON & REAR CAMERA CONN N/A20 N/A29 PROX SENSOR N/A19 N/A28 INERTIAL SENSORS N/A18 N/A27 VIDEO: MIPI CONNECTOR N/A16 N/A22 AUDIO: L81 CODEC KAVITHA14 01/18/201219 AUDIO JACK FLEX CONN N/A13 03/31/201118 TOUCH: FLEX CONNECTOR N/A12 06/21/201017 NAND STORAGE MLB11 05/04/201214 E75 SUPPORT N/A10 N/A13 AP: MISC & ALIASES N/A9 04/11/201112 AP: PWR N/A8 04/18/201111 AP: PWR N/A7 04/18/201110 AP: TV/DP/MIPI/CAMERA MLB6 05/04/20129 AP: FLASH MEMORY INTERFACE N/A5 04/18/20118 AP: I/Os N/A4 05/05/20117 04/18/2011N/AAP: MAIN3 6 BLOCK DIAGRAM: SYSTEM N/A2 N/A2 CONSTRAINTS: MLB RULES46 102 N/AN/A 45 CONSTRAINTS: ASSIGNMENTS101 N/AN/A 44 CONSTRAINTS: ASSIGNMENTS100 N/AN/A 43 MECHANCIAL PARTS93 N/AN/A 42 POWER: PMU82 05/09/2011N/A 41 Power: PMU81 N/AN/A 40 POWER: BATTERY CONNECTOR75 N/AN/A 39 Power: Aliases73 N/AN/A 38 IO FLEX: DOCK COMPONENTS57 04/18/2011N/A 37 WIFI/BT47 06/27/2012JORGE 36 GPS46 06/27/2012JORGE 35 RX DIVERSITY45 06/27/2012JORGE 34 BAND2 PAD44 06/27/2012JORGE 33 BAND 1/4 PAD43 06/27/2012JORGE 32 DCS RX, ASM42 06/27/2012JORGE 31 2G PA, DCDC CONVERTER41 06/27/2012JORGE 30 BAND 13 PA40 06/27/2012JORGE 29 BAND 5/8 PAD39 06/27/2012JORGE 28 RF TRANSCEIVER (3 OF 3)38 06/27/2012JORGE 27 RF TRANSCEIVER (2 OF 3)37 06/27/2012JORGE 26 RF TRANSCEIVER (1 0F 3)36 06/27/2012JORGE 25 MOBILE DATA MODEM (2 OF 2)35 06/27/2012JORGE 24 BASEBAND (1 OF 2)34 06/27/2012JORGE 23 BASEBAND PMU (2 OF 2)33 06/27/2012JORGE 22 BASEBAND PMU (1 0F 2)32 06/27/2012JORGE PCB,MLB,X123 PCB1820-3243 1 TABLE OF CONTENTS N/A1 N/A1 21 SYSTEM & DEBUG CONNECTORS31 06/27/2012JORGE SCH,MLB,X123 SCH1051-9374 1 CSAPDF DATECONTENTS SYNC MASTER LAST_MODIFIED=Wed Jun 27 16:39:53 2012 DATECONTENTSCSAPDF SYNC MASTER SCH,MLB,X123
Apple Inc. THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. 124578 B D 8 7 6 5 4 3 C B A NOTICE OF PROPRIETARY PROPERTY: PAGE 12 D A C PAGE TITLE SHEET IV ALL RIGHTS RESERVED R D SIZEDRAWING NUMBER REVISION BRANCH 6 3 THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT SENSOR PANEL REAR CAMERA ARM A5 CPU CANADA FLEX MLC CSA 21 LVDS AUDIO JACK FLEX HS JACK CSA 81-82 RF ANT I2S0 I2S2 SPI2 XSP ASP SPI SPEAKER CSA 20 CSA 20 AMP GYRO CSA 27 ACCELEROMETER ALS VGA FLEX CSA 28 PROX COMPASS CSA 27 CSA 20 AMP CUMULUS CSA 75 I2C1I2C2 SGX543-MP UART5_RTXD FMI0 FMI1 CSA 14 NAND FLASH CSA 47 WIFI/BT BT_I2SI2S3 UART3 HSIC2 UART1 TRISTAR DISPLAY/ CSA 32-46 UART4 RF/GPS HSIC1 WIFI/BT ANT E75 IO FLEX I2S1 CSA 19 L81 2X32-BIT 400MHZ/800MB/S AUDIO FF CAMERA GPU DWI MIPI0D I2C0 ISP_I2C0 SPI1 MIPI1C MIPI0C TOUCH PANEL ISP_I2C1 BACKLIGHT AUDIO CODEC H4A 1GHZ DUAL-CORE ARM CORTEX-A9 W/ SMP LPDDR2 DUAL-CORE IMG AE2 ALISON PMU SLAVE (POR) CABERNET BRD BATTERY CSA 27 AP3DSH (NEW)AP3GDL20 (NEW) (SAME AS K93A)(SAME AS J2) MASTER CABERNET BRD CUMULUS (SAME AS K93A) CSA 13 UART0 UART2 USB2.0 JTAG UART4 BB USB MIKEY BLOCK DIAGRAM: SYSTEM SYNC_DATE=N/ASYNC_MASTER=N/A 051-9374 13.0.0 2 OF 102 2 OF 46
OUT OUT BI BI BI BI IN OUT IN IN OUT OUT BI BI CFSB RESET* XO0 XI0 WDOG USB11_DP USB11_DM USB_VSSA0 USB_VDD330 USB_VBUS USB_REXT USB_DVDD USB_DP USB_DM USB_BRICKID_DM_MON USB_BRICKID USB_ASW_VSS18 USB_ASW_VDD18 USB_ANALOGTEST PLL4_AVSS11PLL4_AVDD11 PLL3_AVSS11PLL3_AVDD11 PLL2_AVSS11PLL2_AVDD11 PLL1_AVSS11PLL1_AVDD11 PLL0_AVSS11PLL0_AVDD11 PLL_USB_AVSS11PLL_USB_AVDD11 HSIC2_DVSSHSIC2_DVDD102 HSIC1_DVSSHSIC1_DVDD101 HSIC_VSS122 HSIC_VSS121 HSIC_VDD122 HSIC_VDD121 DDR1_CKEIN DDR0_CKEIN HSIC1_DATA JTAG_SEL HSIC1_STB HSIC2_DATA HSIC2_STB JTAG_TRTCK JTAG_TRST* JTAG_TDO JTAG_TDI JTAG_TMS JTAG_TCK PVDDP_UART4 PVDDP_TESTS PVDDP_FMI0 PVDDP_CFSB VSEL30_UART4 VSEL30_TST VSEL30_FMI USB_ID TST_CLKOUT TST_STPCLK FUSE1_FSRC TESTMODE FAST_SCAN_CLK HOLD_RESET (1 OF 12) TABLE_ALT_ITEM TABLE_ALT_ITEM PART NUMBER ALTERNATE FORPART NUMBER BOM OPTION REF DES COMMENTS: TABLE_ALT_HEAD TABLE_5_ITEM CRITICAL BOM OPTION TABLE_5_HEAD PART# DESCRIPTIONQTY REFERENCE DESIGNATOR(S) Apple Inc. THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. 124578 B D 8 7 6 5 4 3 C B A NOTICE OF PROPRIETARY PROPERTY: PAGE 12 D A C PAGE TITLE SHEET IV ALL RIGHTS RESERVED R D SIZEDRAWING NUMBER REVISION BRANCH 6 3 THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT HYNIX ELPIDA SAMSUNG 4MA 4MA 2MA 17MA 6MA 4MA 25MA 4MA 4MA 35MA NOTE FOR VSEL... 0 - 1.8V IO 1.8V - 3V IO 10MA 25MA 4MA 4MA 10MA 10MA 1MA R0647 01005 MF 1/32W 1% 100K 1044 944 C0610 0.01UF 6.3V 10% X5R 01005 C0611 01005 10% X5R 6.3V 0.01UF 2144 2144 2144 2144 R0651 01005 68.1K 1% 1/32W MF 9 R0646 100K 1% 1/32W MF 01005 R0645 01005 MF 1/32W 1% 100K C0682 27PF 16V 5% 01005 NP0-C0G C0681 27PF 16V 5% 01005 NP0-C0G C0680 27PF 16V 5% 01005 NP0-C0G C0684 27PF 16V 5% 01005 NP0-C0G C0627 10% 01005 6.3V X5R 0.01UF C0630 0.01UF 6.3V X5R 10% 01005 R0617 01005 1/32W MF 10K 1% C0613 5% 15PF 01005 NP0-C0G-CERM 16V R0655 1% 01005 1.00M MF 1/32W R0688 01005 MF 100K 1% 1/32W R0642 1% 1/20W 201 MF 43.2 C0640 1UF 6.3V X5R 20% 0201 C0646 X5R 10% 0.01UF 01005 6.3V C0648 0.01UF 6.3V 01005 X5R 10% DZ0600 GDZ-0201 GDZT2R5.1B NOSTUFF 10 102142 44 1044 944 10 44 10 44 R0689 01005 MF 1% 221K 1/32W C0651 X5R 01005 0.01UF 6.3V 10% C0652 10% 01005 0.01UF 6.3V X5R CRITICAL Y0602 24.000MHZ-16PF-60PPM SM-2 C0607 16V 01005 5% NP0-C0G-CERM 15PF R0640 01005 1.00K MF 1/32W 1% R0622 MF 01005 1/32W 0% 0.00 R0621 MF 0.00 1/32W 01005 0% R0620 0.00 01005 0% MF 1/32W R0625 MF 0% 0.00 1/32W 01005 C0643 0.22UF X5R 6.3V 0201 20% C0618 NOSTUFF 1000PF 10% 6.3V X5R 01005 CRITICAL OMIT U0652 H4A POP-512MB-DDR BGA R0624 01005 0% 1/32W MF 0.00 C0608 10% X5R 6.3V 0.01UF 01005 C0683 27PF 16V 5% 01005 NP0-C0G C0642 0201 X5R 20% 6.3V 0.22UF C0641 0.01UF X5R 6.3V 01005 10% AP: MAIN SYNC_DATE=04/18/2011SYNC_MASTER=N/ACRITICAL1 COMMON339S0179 H4A B0,35NM,1.15MM HEIGHT U0652 339S0187 U0652339S0179 339S0188 339S0179 U0652 SOC_TESTMODE SOC_HOLD_RESET PP1V0_PLL01_F VOLTAGE=1.1V MIN_LINE_WIDTH=0.2MM MIN_NECK_WIDTH=0.1MM NET_SPACING_TYPE=PWR MAX_NECK_LENGTH=3 MM VOLTAGE=1.1V MIN_NECK_WIDTH=0.1MM MIN_LINE_WIDTH=0.2MM NET_SPACING_TYPE=PWR MAX_NECK_LENGTH=3 MM PP1V0_PLL_USB_F VOLTAGE=1.1V MAX_NECK_LENGTH=3 MM NET_SPACING_TYPE=PWR MIN_LINE_WIDTH=0.2MM MIN_NECK_WIDTH=0.1MM PP1V0_PLL4_F PP1V0_PLL3_F MAX_NECK_LENGTH=3 MM NET_SPACING_TYPE=PWR MIN_NECK_WIDTH=0.1MM MIN_LINE_WIDTH=0.2MM VOLTAGE=1.1V PP1V0_PLL2_F NET_SPACING_TYPE=PWR MAX_NECK_LENGTH=3 MM MIN_NECK_WIDTH=0.1MM MIN_LINE_WIDTH=0.2MM VOLTAGE=1.1V NC_USB_BRICKID_DM_MON NC_USB_BRICKID_DP_MON =PP1V0_USB_H4 SOC_DDR_CKEIN HSIC2_WLAN_STB =PP1V2_HSIC_H4 HSIC1_BB_STB SOC_USB_D_P SOC_USB_D_N NC_USB_ANALOGTEST =PP1V0_PLL_H4 XTAL_SOC_24M_O_R SOC_FAST_SCAN_CLK SOC_TST_STPCLK NC_USB_FS_D_P NC_JTAG_SOC_TRTCK NC_USB_ID TP_SOC_TST_CLKOUT PPVBUS_USB USB_SOC_VBUS NC_USB_FS_D_N HSIC2_WLAN_DATA USB_REXT =PP1V8_PVDDP_H4 XTAL_SOC_24M_I SOC_WDOG =PP1V8_USB_H4 XTAL_SOC_24M_O HSIC1_BB_DATA =PP1V0_USB_H4 =PP1V8_H4 RST_SYSTEM_L JTAG_SOC_TMS JTAG_SOC_TCK =PP1V8_H4 JTAG_SOC_TDI JTAG_SOC_SEL JTAG_SOC_TRST_L JTAG_SOC_TDO =PP3V3_USB_H4 051-9374 3 OF 46 13.0.0 6 OF 102 1 2 2 1 2 1 1 2 1 2 1 2 2 1 2 1 2 1 2 1 2 1 2 1 1 2 2 1 12 1 2 1 2 2 1 2 1 2 1 A K 1 2 2 1 2 1 31 2 4 2 1 1 2 1 2 1 2 1 2 1 2 2 1 2 1 J23 G23 A16 A15 C27 T29 U29 R27 R26 T27 N28 T25 R25 M31 N31 T26 U27 P28P27 U26 D21E21 D20E20 D18E18 D17E17 D16E16 D19E19 W25V24 W29V27 V26 W28 V25 W26 T9 K12 W30 A25 W31 R31 U31 E26 E25 D26 D25 B25 C26 AH25 F27 AC27 J18 H21 J21 G21 M28 A29 A26 H26 G20 F22 H23 1 2 2 1 2 1 2 1 2 1 9 9 3 39 39 39 9 9 9 41 9 39 45 39 45 339 346939 346939 8 39
OUT BI BI OUT BI OUT OUT OUT IN OUT IN IN IN IN IN OUT IN IN IN IN IN IN OUT IN OUT OUT OUT OUT IN OUT OUT OUT IN OUT OUT OUT IN OUT OUT IN OUT IN OUT IN IN IN (2 OF 12) UART4_TXD UART4_RXD UART4_RTSN UART4_CTSN UART3_TXD UART3_RXD UART3_RTSN UART3_CTSN UART2_TXD UART2_RXD UART2_RTSN UART2_CTSN UART1_TXD UART1_RXD UART1_RTSN UART1_CTSN UART0_TXD UART0_RXD GPIO9 GPIO8 GPIO7 GPIO6 GPIO5 GPIO4 GPIO36 GPIO35 GPIO34 GPIO33 GPIO32 GPIO31 GPIO30 GPIO3 GPIO29 GPIO28 GPIO27 GPIO26 GPIO25 GPIO24 GPIO23 GPIO22 GPIO21 GPIO20 GPIO2 GPIO19 GPIO18 GPIO17 GPIO16 GPIO15 GPIO14 GPIO13 GPIO12 GPIO11 GPIO10 GPIO1 GPIO0 VSS EHCI_PORT_PWR0 EHCI_PORT_PWR1 EHCI_PORT_PWR2 TMR32_PWM2 TMR32_PWM1 TMR32_PWM0 UART5_RTXD (3 OF 12) SWI_DATA SPI2_SSIN SPI2_SCLK SPI2_MOSI SPI2_MISO SPI1_SSIN SPI1_SCLK SPI1_MOSI SPI0_MOSI SPI0_MISO SDIO0_DATA0 SDIO0_CMD SDIO0_CLK I2S3_MCK I2S3_LRCK I2S3_DOUT I2S3_DIN I2S3_BCLK I2S2_MCK I2S2_LRCK I2S2_DOUT I2S2_DIN I2S2_BCLK I2S1_LRCK I2S1_DOUT I2S1_DIN I2C2_SDA I2C2_SCL I2C1_SDA I2C1_SCL I2C0_SDA I2C0_SCL DWI_DO DWI_DI I2S1_MCK I2S1_BCLK I2S0_DOUT I2S0_DIN I2S0_LRCK I2S0_BCLK I2S0_MCK SDIO0_DATA1 SDIO0_DATA2 SDIO0_DATA3 DWI_CLK VSS SPI1_MISO SPI0_SSIN SPI0_SCLK IN IN IN OUT IN IN IN BI IN OUT OUT OUT OUT IN OUT OUT OUT OUT IN OUT OUT IN IN OUT IN IN IN IN IN OUT IN IN OUT OUT IN IN OUT OUT IN OUT IN OUT OUT OUT IN OUT IN OUT IN OUT OUT OUT OUT IN IN IN IN IN IN OUT OUT OUT A DIR VCCB GND B VCCA IN Apple Inc. THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. 124578 B D 8 7 6 5 4 3 C B A NOTICE OF PROPRIETARY PROPERTY: PAGE 12 D A C PAGE TITLE SHEET IV ALL RIGHTS RESERVED R D SIZEDRAWING NUMBER REVISION BRANCH 6 3 THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT H4A I/OS (SCREEN ROTATION LOCK) R0700 1/32W 5% 2.2K MF 01005 R0701 1/32W 5% 2.2K 01005 MF R0702 5% 1/32W 1.8K 01005 MF R0703 5% 1/32W 1.8K 01005 MF R0705 1/32W 5% 2.2K MF 01005 R0704 5% 1/32W 2.2K MF 01005 4 10 15 42 44 4 10 15 42 44 4 18 19 44 4 18 19 44 4 17 18 44 4 17 18 44 1244 1244 1244 1244 9 9 9 R0771 MF 220K 1/32W 5% 01005 R0770 5% MF 1/32W 220K 01005 R0765 5% MF 1/32W 220K 01005 R0738 01005 MF 1% 100K 1/32W R0737 01005 MF 1% 100K 1/32W R0736 MF 01005 1% 1/32W 100K R0735 01005 MF 1% 1/32W 100K 41242 42042 21 18 21 18 9 9 10 44 10 44 21 44 21 44 1444 1444 1444 1444 1444 1444 1444 1444 2144 2144 2144 2144 42 44 42 44 42 44 21 14 R0720 1% MF 01005 33.2 1/32W 1444 9 9 9 U0652 OMIT POP-512MB-DDR BGA H4AU0652 OMIT POP-512MB-DDR BGA H4A 20 20 42042 415 9 4 49 40 42 44 1544 1544 1544 1544 1444 1444 1444 1444 R0721 1% MF 33.2 1/32W 01005 1544 15 15 21 442 42 9 21 21 21 21 21 21 12 12 21 44 21 44 21 44 21 44 10 44 15 10 44 21 44 21 44 10 21 44 10 21 44 16 4 21 21 19 17 9 R0739 MF 01005 1% 1/32W 100K 21 24 44 21 24 44 21 24 44 10 10 1042 18 18 21 21 24 44 21 24 44 12 44 16 NOSTUFF C0701 01005 20% X5R-CERM 0.1UF 6.3V NOSTUFF U0701 SN74LVC1T45YZPR BGA 4 01005 R0750 0% 0.00 1/32W MF AP: I/Os SYNC_DATE=05/05/2011SYNC_MASTER=N/A GPIO_MLC_RST_1V8_L GPIO_MLC_RST_L AP_CLK_32K_CUMULUS I2S0_CODEC_ASP_BCLK I2S0_CODEC_ASP_DIN BB_JTAG_TDI BB_JTAG_TDO GPIO_ACCEL_IRQ1_L GPIO_GYRO_IRQ2 UART1_BT_CTS_L UART0_DEBUG_TXD GPIO_ACC_SW_EN BB_JTAG_TRST_L BB_JTAG_TMS BB_JTAG_TCK GPIO_SPKAMP_RST_L GPIO_PMU_KEEPACT GPIO_BTN_SRL_L GPIO_BTN_POWER_L GPIO_BTN_HOME_L =PP1V8_H4 I2C0_SDA I2C1_SDA I2C1_SCL I2C0_SCL I2C2_SCL =PP1V8_S2R_MISC =PP1V8_ALWAYS =PP1V8_S2R_MISC SPI2_CODEC_CS_L SPI2_CODEC_SCLK SPI2_CODEC_MISO SPI2_CODEC_MOSI SPI1_GRAPE_CS_L SPI1_GRAPE_SCLK SPI1_GRAPE_MISO GPIO_BOARD_ID1 GPIO_BOARD_ID2 I2S3_BT_DIN I2S3_BT_DOUT DWI_CLK I2S0_CODEC_ASP_DOUT I2S1_SPKAMP_BCLK DWI_DO I2C0_SCL I2C0_SDA I2C1_SCL I2C1_SDA I2C2_SDA I2S1_SPKAMP_DIN I2S1_SPKAMP_LRCK I2S2_CODEC_XSP_DIN NC_SWI_AP I2S0_CODEC_ASP_MCK GPIO_MLC_RST_1V8_L GPIO_BB_HSIC_DEV_RDY GPIO_BOARD_REV2 GPIO_BOARD_REV1 GPIO_BOARD_REV0 GPIO_MLC_RST_1V8_L GPIO_FORCE_DFU GPIO_DFU_STATUS GPIO_BTN_HOME_L GPIO_BTN_POWER_L GPIO_BTN_VOL_UP_L GPIO_BTN_VOL_DOWN_L GPIO_BTN_SRL_L GPIO_SPKAMP_RST_L GPIO_CODEC_IRQ_L GPIO_BT_WAKE GPIO_BB_RST_L GPIO_BB_GSM_TXBURST GPIO_BB_IPC_GPIO GPIO_BB_DIAGS_RDY GPIO_BB_GPS_SYNC GPIO_BB_RST_DET_L GPIO_BB_HSIC_HOST_RDY GPIO_BOOT_CONFIG0 GPIO_PMU_IRQ_L GPIO_PMU_KEEPACT GPIO_GRAPE_RST_L GPIO_GRAPE_IRQ_L GPIO_BB_RADIO_ON_L GPIO_BOOT_CONFIG1 GPIO_FORCE_DFU GPIO_BOOT_CONFIG3 GPIO_ACCEL_IRQ2_L GPIO_GYRO_IRQ1 GPIO_MLC_PWR_EN UART0_DEBUG_RXD UART1_BT_RTS_L GPIO_ALS_IRQ_L GPIO_SPKAMP_LEFT_IRQ_L UART2_ACC_RXD GPIO_WLAN_HSIC_HOST_RDY UART4_BB_RTS_L UART4_BB_TXD UART4_BB_RXD UART4_BB_CTS_L GPIO_BOARD_ID3 I2S0_CODEC_ASP_MCK_R I2S1_SPKAMP_DOUT DWI_DI I2C2_SCL I2S2_CODEC_XSP_DOUT I2S2_CODEC_XSP_BCLK SPI1_GRAPE_MOSI I2S3_BT_LRCK I2S3_BT_BCLK UART5_BATT_RTXD UART2_ACC_TXD GPIO_WLAN_HSIC_DEV_RDY UART3_WLAN_RXD UART3_WLAN_TXD GPIO_ACC_SW_POK_L PMU_GPIO_TRISTAR_IRQ UART1_BT_RXD UART1_BT_TXD GPIO_DFU_STATUS GPIO_PROX_IRQ_L GPIO_WLAN_HSIC_RESUME GPIO_BOOT_CONFIG2 NC_GPIO31 I2S1_SPKAMP_MCK I2S2_CODEC_XSP_LRCK I2S1_SPKAMP_MCK_R I2S0_CODEC_ASP_LRCK GPIO_BOARD_ID0 NC_SPI0_SSIN I2C2_SDA =PP3V0_MLC_RST_LEVELSHIFTER=PP1V8_IO_H4 GPIO_SPKAMP_RIGHT_IRQ_L GPIO_SPKAMP_KEEPALIVE 051-9374 13.0.0 7 OF 102 4 OF 46 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 AK27 AK26 AJ25 AJ26 AF1 AE1 AG2 AF2 R1 M1 T1 N1 AK1 AL1 AH5 AG5 C29 B29 H2 G1 L4 K3 G2 G3 AH3 R3 P2 AE4 AB3 AF4 T2 G4 AF5 AD3 AE5 AA3 V3 AC4 L2 H4 AD5 Y4 F2 AB4 N2 AB5 M3 W4 W3 J1 J3 J2 N3 H1 K4 A10 A9 A8 A5 A4 A3 A2 A1 T3 V2 U2 AN5 AP4 AP5 D28 A6 A7 AN6 AM21 AN22 AM12 AN13 AH4 AP13 AM3 AB1 AP21 AK25 AJ24 AH28 AM1 AN20 AK5 AH1 AL16 AM9 AK2 AM2 AN17 AM16 AP8 AM20 AL14 E29 D29 AG3 AM7 AM6 AL4 AN18 U1 B1 A31 A30 A27 A14 A13 A12 A11 AM13 AK3 AM22 AP17 AP14 AM19 AM18 AH24 AJ27 AK24 AM11 A17 A24 AP23 AM4 AM15 1 2 1 2 2 1 A2 C2 A1 B1 B2 C1 1 2 4 15 4 42 4 20 42 4 20 42 4 12 42 36939 410154244 4181944 4181944 410154244 4171844 491039 39 491039 4 4 9 4 44 44 4171844 396839
OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI (4 OF 12) FMI1_WEN FMI1_IO7 FMI1_IO6 FMI1_IO5 FMI1_IO4 FMI1_IO3 FMI1_IO2 FMI1_CLE FMI1_CEN1 FMI1_ALE VSS FMI0_IO7 FMI0_ALE FMI0_CLE FMI0_WEN FMI0_IO0 FMI0_IO1 FMI0_IO2 FMI0_IO3 FMI0_IO4 FMI0_CEN0 FMI0_CEN2 FMI0_CEN3 FMI0_CEN1 FMI0_IO6 FMI0_IO5 FMI1_CEN0 FMI0_DQS FMI0_REN FMI1_IO1 FMI1_IO0 FMI1_CEN3 FMI1_CEN2 FMI1_DQS FMI1_REN Apple Inc. THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. 124578 B D 8 7 6 5 4 3 C B A NOTICE OF PROPRIETARY PROPERTY: PAGE 12 D A C PAGE TITLE SHEET IV ALL RIGHTS RESERVED R D SIZEDRAWING NUMBER REVISION BRANCH 6 3 THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT 1144 1144 1144 1144 1144 1144 1144 1144 1144 1144 1144 1144 1144 1144 1144 1144 1144 1144 1144 1144 1144 1144 1144 1144 1144 1144 U0652 OMIT H4A POP-512MB-DDR BGA R0832 MF 01005 1% 1/32W 100K R0831 01005 MF 1% 100K 1/32W AP: FLASH MEMORY INTERFACE SYNC_DATE=04/18/2011SYNC_MASTER=N/A NC_FMI1_CEN1 NC_FMI1_CEN2 NC_FMI0_CEN3 NC_FMI0_CEN2 NC_FMI0_CEN1 FMI1_CE0_L FMI0_RE_N FMI0_WE_L FMI0_AD<7> FMI0_AD<6> FMI0_AD<5> FMI0_DQS_P =PP1V8_NAND_H4 =PP1V8_NAND_H4 FMI0_CE0_L FMI1_DQS_P FMI0_AD<3> FMI0_AD<2> FMI0_AD<1> FMI0_AD<0> FMI0_AD<4> FMI0_ALE FMI0_CLE FMI1_AD<1> FMI1_AD<2> FMI1_AD<3> FMI1_AD<5> FMI1_AD<4> FMI1_AD<7> FMI1_AD<6> FMI1_ALE FMI1_CLE FMI1_WE_L FMI1_RE_N NC_FMI1_CEN3 FMI1_AD<0> 051-9374 13.0.0 8 OF 102 5 OF 46 Y25 AB29 AA29 AB28 AA28 AA31 Y26 AA26 AB26 AB31 B17 B16 B15 B13 B12 B11 B9 B8 B2 AG27 AD25 AE28 AC25 AC28 AC26 AD29 AD26 AE25 AF28 AF25 AF26 AE26 AG26 AG28 AB30 AE27 AD28 Y28 W27 AB25 AA25 B6 B5 B3 AA27 Y29 1 2 1 2 1144 5839 5839 1144
OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT BI IN IN OUT OUT MIPI0C_DPDATA0 MIPI0C_DNDATA0 MIPI0C_DPDATA1 MIPI0C_DNDATA1 MIPI0C_DPDATA2 MIPI0C_DNDATA2 MIPI0C_DPDATA3 MIPI0C_DNDATA3 MIPI0C_DPCLK MIPI0C_DNCLK MIPI0D_DPDATA0 MIPI0D_DNDATA0 MIPI0D_DPDATA1 MIPI0D_DNDATA1 MIPI0D_DPDATA2 MIPI0D_DNDATA2 MIPI0D_DPDATA3 MIPI0D_DNDATA3 MIPI0D_DPCLK MIPI0D_DNCLK ISP0_FLASH ISP0_PRE_FLASH SENSOR0_CLK SENSOR0_RST ISP1_FLASH ISP1_PRE_FLASH SENSOR1_CLK SENSOR1_RST ISP0_SCL ISP0_SDA ISP1_SCL ISP1_SDA MIPI_VDD10 MIPI0D_VDD10_PLL MIPI0D_VDD MIPI0D_VREG_0P4V MIPI1C_DNCLK MIPI1C_DNDATA0 MIPI1C_DNDATA1 MIPI1C_DPCLK MIPI1C_DPDATA0 MIPI1C_DPDATA1 MIPI1D_DNCLK MIPI1D_DNDATA0 MIPI1D_DNDATA1 MIPI1D_DPCLK MIPI1D_DPDATA0 MIPI1D_DPDATA1 MIPI1D_VDD10_PLL MIPI1D_VREG_0P4V MIPI_VSS MIPI_VSYNC (5 OF 12)(6 OF 12) DAC_AVDD18A DAC_AVDD18D DAC_AVSS18A DAC_AVSS18D DAC_COMP DAC_IREF DAC_OUT1 DAC_OUT2 DAC_OUT3 DAC_VREF DP_HPD DP_PAD_AUXN DP_PAD_AUXP DP_PAD_AVDD_AUX DP_PAD_AVDD0 DP_PAD_AVDD1 DP_PAD_AVDDP0 DP_PAD_AVDDX DP_PAD_AVSS_AUX DP_PAD_AVSS0 DP_PAD_AVSS1 DP_PAD_AVSSP0 DP_PAD_AVSSX DP_PAD_DC_TP DP_PAD_DVDD DP_PAD_DVSS DP_PAD_R_BIAS DP_PAD_TX0N DP_PAD_TX0P DP_PAD_TX1N DP_PAD_TX1P OUT OUT OUT BI OUT OUT OUT IN IN IN IN OUT PART NUMBER ALTERNATE FORPART NUMBER BOM OPTION REF DES COMMENTS: TABLE_ALT_HEAD TABLE_ALT_ITEM Apple Inc. THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. 124578 B D 8 7 6 5 4 3 C B A NOTICE OF PROPRIETARY PROPERTY: PAGE 12 D A C PAGE TITLE SHEET IV ALL RIGHTS RESERVED R D SIZEDRAWING NUMBER REVISION BRANCH 6 3 THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT 6.6MA 45MA 4MA MIPI TV/DISPLAYPORT MIN_NECK_MIDTH SHOULD BE 0.2MM 15MA 77MA 77MA 5MA 11MA 8MA 12MA C0902 X5R-CERM 10V 2.2NF 10% 0201 6.3V X5R-CERM 01005 0.1UF 20% C0903 6.3V 0.1UF X5R-CERM 20% 01005 C0907 6.3V X5R-CERM 01005 20% 0.1UF C0908 1645 1645 1645 1645 1645 1645 1645 1645 1645 17 44 17 17 44 17 44 C0920 X5R-CERM 10% 2.2NF 10V 0201 0201 20% X5R 1UF 6.3V C0930 17 45 17 45 49.9 R0940 01005 MF 1/32W 2.2K 5% 01005 R0933 MF 1/32W 2.2K 5% 01005 R0932 17 45 17 45 POP-512MB-DDR BGA H4A OMIT U0652 H4A POP-512MB-DDR BGA OMIT U0652 FL0911 0201-1 80-OHM-0.2A-0.4-OHM 6.3V 1UF X5R 20% 0201 C0963 27PF 16V 01005 5% NP0-C0G C0961 6.3V X5R-CERM 01005 0.1UF 20% C0962 1645 R0941 01005 100 20 44 20 MF 1/32W 2.2K 5% 01005 R0930 MF 1/32W 5% 2.2K 01005 R0931 20 44 20 44 2045 2045 2045 2045 2045 2045 12 SYNC_MASTER=MLB SYNC_DATE=05/04/2012 AP: TV/DP/MIPI/CAMERA RADAR: 11363497FL0911155S0359155S0725 =PP1V0_DPORT_H4 NC_DP_PAD_TX0N NC_DP_PAD_TX0P NC_DP_PAD_AUXN NC_DP_PAD_TX1P NC_DP_PAD_TX1N NC_DP_PAD_R_BIAS NC_DP_PAD_DC_TP NC_DP_PAD_AUXP NC_DP_HPD NC_DAC_VREF NC_DAC_OUT3 NC_DAC_OUT2 NC_DAC_OUT1 NC_DAC_IREF NC_DAC_COMP =PP1V8_IO_H4 =PP1V8_DPORT_H4 ISP1_CAM_FRONT_SDA ISP0_CAM_REAR_SCL ISP0_CAM_REAR_SDA ISP1_CAM_FRONT_SCL NC_ISP1_FLASH NC_ISP1_PRE_FLASH MIPI1C_CAM_FRONT_CLK_P MAX_NECK_LENGTH=3 MM NET_SPACING_TYPE=PWR MIN_NECK_WIDTH=0.1MM MIN_LINE_WIDTH=0.2MM VOLTAGE=0.4V PP_AP_MIPI1D_0P4V =PP1V8_H4 =PP1V8_MIPI_H4 =PP1V0_MIPI_PLL_H4 NC_MIPI1C_CAM_FRONT_DATA_P<1> NC_MIPI1D_AP_DATA_P<1> MIPI0D_DATA_N<0> MIPI0D_CLK_P MIPI0D_DATA_N<1> MIPI0D_DATA_P<1> ISP0_CAM_REAR_SHUTDOWN MIPI0C_CAM_REAR_DATA_N<0> NC_MIPI1D_AP_CLK_N NC_MIPI1D_AP_CLK_P NC_MIPI1D_AP_DATA_N<1> NC_MIPI1C_CAM_FRONT_DATA_N<1> MIPI1C_CAM_FRONT_CLK_N NC_MIPI0C_CAM_REAR_DATA_P<3> NC_MIPI0C_CAM_REAR_DATA_N<2> MIPI0C_CAM_REAR_DATA_N<1> MIPI0D_DATA_P<0> MIPI0C_CAM_REAR_CLK_N MIPI0C_CAM_REAR_CLK_P NC_MIPI0C_CAM_REAR_DATA_N<3> NC_MIPI1D_AP_DATA_P<0> ISP1_CAM_FRONT_SHUTDOWN NC_ISP0_PRE_FLASH NC_ISP0_FLASH PP1V0_MIPID_PLL_F MIN_LINE_WIDTH=0.2MM MAX_NECK_LENGTH=3 MM MIN_NECK_WIDTH=0.1MM VOLTAGE=1.1V NET_SPACING_TYPE=PWR MAX_NECK_LENGTH=3 MM MIN_NECK_WIDTH=0.1MM MIN_LINE_WIDTH=0.2MM VOLTAGE=0.4V NET_SPACING_TYPE=PWR PP_AP_MIPI0D_0P4V =PP1V0_MIPI_H4 NC_MIPI1D_AP_DATA_N<0> MIPI0D_DATA_N<3> MIPI0D_CLK_N MIPI0D_DATA_P<3> MIPI0D_DATA_N<2> MIPI0D_DATA_P<2> NC_MIPI0C_CAM_REAR_DATA_P<2> MIPI0C_CAM_REAR_DATA_P<1> MIPI0C_CAM_REAR_DATA_P<0> DISPLAY_SYNC ISP1_CAM_FRONT_CLK_R ISP1_CAM_FRONT_CLK ISP0_CAM_REAR_CLK_R ISP0_CAM_REAR_CLK MIPI1C_CAM_FRONT_DATA_N<0> MIPI1C_CAM_FRONT_DATA_P<0> 051-9374 13.0.0 9 OF 102 6 OF 46 2 1 2 1 2 1 2 1 2 1 2 1 1 2 1 2 1 2 AM30 AM31 AL30 AL31 AJ30 AJ31 AH30 AH31 AK30 AK31 AN25 AP25 AN26 AP26 AN28 AP28 AN29 AP29 AN27 AP27 AL17 AL13 AP19 AN8 AL19 AL10 AP11 AP18 AP7 AC1 AN3 AL20 AG17 AG18 AG19 AG20 AG21 AG22 AG23 AH22 AH23 AJ17 AJ19 AJ18 AF31 AG31 AE31 AF30 AG30 AE30 AK29 AL29 AJ29 AK28 AL28 AJ28 AJ21 AJ23 AJ22 AH21 AH20 AH19 AH18 AH17 AM10 E23 E22 D23 D22 C23 C24 A23 A22 A21 H24 E27 J31 K31 M27 L24 K26 M25 N25 N24 M24 L25 M26 N26 P24 P25 P26 N27 F31 G31 C31 D31 21 2 1 2 1 2 1 1 2 1 2 1 2 39 4839 39 3 4 9 39 39 39 9 9 9 9 9 9 9 9 9 9 39 9 9 44 44
(7 OF 12) VDDQ VDDCA VDD2 VDD1 VSS DDR1_ZQ DDR0_VREF_CA DDR1_VDDQ_CKE DDR0_VDDQ_CKE DDR0_ZQ DDR1_VREF_DQ DDR0_VREF_DQ DDR1_VREF_CA (9 OF 12) VDDIOD VDDIO18_GRP3 VDDIO18_GRP2 VDDIO18_GRP1 VSS Apple Inc. THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. 124578 B D 8 7 6 5 4 3 C B A NOTICE OF PROPRIETARY PROPERTY: PAGE 12 D A C PAGE TITLE SHEET IV ALL RIGHTS RESERVED R D SIZEDRAWING NUMBER REVISION BRANCH 6 3 THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT 20MA 500MA 320MA (DRAM CORE) (DDR IMPEDANCE CONTROL) <1MA <1MA 80MA 500MA (DON’T DOUBLE COUNT) (VDDQ = VDDIOD) EHCI (UNUSED) ISP FLASH (UNUSED) I2S[0-3] (1 UNUSED) SPI[0-2] (0,2 UNUSED) 75MA SENSOR[0-1] DWI GPIO UART[1-3] (1-2 UNUSED) I2C[0-1] ISP[0-1] 2MA - XI/0 11MA - VSEL30_X,CFSB,TEST (DRAM CORE - CHARGE PUMP) C1056 NOSTUFF 0.01UF X5R 6.3V 10% 01005 R1056 01005 1.00K MF 1% 1/32W R1055 01005 1/32W MF 1% 1.00K C1054 NOSTUFF X5R 6.3V 10% 01005 0.01UF R1053 01005 MF 1% 1.00K 1/32W R1054 01005 1% 1/32W 1.00K MF U0652 OMIT BGA H4A POP-512MB-DDR U0652 OMIT BGA POP-512MB-DDR H4A CRITICAL C1015 402 4.7UF 6.3V 20% X5R-CERM1 CRITICAL C1019 6.3V X5R 0201 20% 0.22UF CRITICAL C1024 402 4.7UF 6.3V 20% X5R-CERM1 CRITICAL C1029 20% 0.22UF 0201 X5R 6.3V CRITICAL C1028 6.3V X5R 0201 0.22UF 20% CRITICAL C1027 20% 0.22UF 0201 X5R 6.3V C1035 01005 10% 0.01UF 6.3V X5R CRITICAL C1034 402 20% X5R-CERM1 4.7UF 6.3V CRITICAL C1041 6.3V X5R 0201 0.22UF 20% CRITICAL C1040 6.3V X5R 0201 0.22UF 20% CRITICAL C1039 0.22UF 6.3V X5R 0201 20% CRITICAL C1038 6.3V X5R 0201 0.22UF 20% CRITICAL C1037 20% 0.22UF 0201 X5R 6.3V CRITICAL C1036 6.3V X5R 0201 0.22UF 20% CRITICAL C1042 402 20% X5R-CERM1 4.7UF 6.3V CRITICAL C1043 20% 0.22UF 0201 X5R 6.3V C1001 01005 10% 0.01UF X5R 6.3V C1000 01005 10% 0.01UF X5R 6.3V C1002 NOSTUFF X5R 6.3V 10% 01005 0.01UF CRITICAL C1007 0.22UF 20% 6.3V X5R 0201 R1001 240 1% 1/20W 201MF R1000 240 MF1/20W1% 201 CRITICAL C1006 6.3V X5R 0201 0.22UF 20% CRITICAL 20% C1005 6.3V X5R 0201 0.22UF CRITICAL C1004 6.3V X5R 0201 0.22UF 20% CRITICAL C1009 402 20% X5R-CERM1 4.7UF 6.3V C1026 01005 10% 0.01UF 6.3V X5R CRITICAL C1032 6.3V X5R 0201 0.22UF 20% CRITICAL C1031 6.3V X5R 0201 0.22UF 20% CRITICAL C1030 6.3V X5R 0201 0.22UF 20% R1005 01005 1/32W MF 2.21K 1% R1006 01005 MF 2.21K 1% 1/32W C1052 NOSTUFF 0.01UF X5R 6.3V 10% 01005 R1051 01005 MF 2.21K 1% 1/32W R1052 01005 MF 1/32W 1% 2.21K AP: PWR SYNC_DATE=04/18/2011SYNC_MASTER=N/A =PP1V8_S2R_H4 PPVREF_DDR0_CA VOLTAGE=0.6V MAX_NECK_LENGTH=3 MM MIN_NECK_WIDTH=0.2MM MIN_LINE_WIDTH=0.3MM NET_SPACING_TYPE=VREF =PP1V2_S2R_H4 PPVREF_DDR0_DQ MAX_NECK_LENGTH=3 MM VOLTAGE=0.6V MIN_NECK_WIDTH=0.2MM MIN_LINE_WIDTH=0.3MM NET_SPACING_TYPE=VREF =PP1V2_VDDQ_H4 PPVREF_DDR1_CA VOLTAGE=0.6V MIN_NECK_WIDTH=0.2MM MIN_LINE_WIDTH=0.3MM NET_SPACING_TYPE=VREF MAX_NECK_LENGTH=3 MM =PP1V2_S2R_H4 PPVREF_DDR1_DQ MAX_NECK_LENGTH=3 MM VOLTAGE=0.6V MIN_NECK_WIDTH=0.2MM MIN_LINE_WIDTH=0.3MM NET_SPACING_TYPE=VREF =PP1V2_VDDQ_H4 =PP1V2_S2R_H4 =PP1V8_VDDIO18_H4 =PP1V2_S2R_H4 PPVREF_DDR0_CA PPVREF_DDR0_DQ PPVREF_DDR1_DQ PPVREF_DDR1_CA DDR0_ZQ DDR1_ZQ =PP1V2_VDDQ_H4 =PP1V2_VDDIOD_H4 051-9374 13.0.0 10 OF 102 7 OF 46 2 11 2 1 2 2 1 1 2 1 2 E2 C30 B27 B24 B20 B18 B14 AN7 B10 AN4 AL2 AH2 AE2 W2 R2 M2 K2 J30 F30 B7 B4 AN16 AN12 AC30 Y30 P30 AJ1 AD30 AA30 Y1 W1 L30 AP9 AN23 AN14 A19 AN24 AN10 AJ2 AE29 AA2 M30 C1 B28 A20 F3 F1 E31 E30 E28 E24 E15 E14 E13 E12 E11 E10 E9 E8 E7 E6 E5 E4 E3 E1 D30 D27 D24 D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 C28 C25 C22 C21 C20 C19 C18 C17 C16 C15 C14 C13 C12 C11 C10 C9 C8 C7 C6 C5 C4 C3 B31 B30 B26 B23 B22 B21 AD31 A28 C2 AN21 A18 AP15 T10 L12 AP10 Y2 B19 Y31 H14 H12 H10 H8 H6 AA8 AA7 Y8 Y6 W8 G15 W7 V8 V6 U8 U7 T8 T6 R8 R7 P8 G13 P6 N8 L7 K8 K6 J16 G11 J15 J14 J13 J12 J11 J10 J8 J7 G9 G7 H19 H20 AE10 AE11 AE12 AE13 AE14 AE15 AE16 AD9 AE9 AC9 AB9 R6 R5 R4 P31 P29 P23 P21 P19 P17 P15 P13 P11 P9 P7 P5 P4 P3 P1 N30 N29 N22 N20 N18 N16 N14 N12 N10 N6 N5 N4 M29 M23 M21 M19 M17 M15 M13 M11 M9 M7 M5 M4 L31 L29 L28 L27 L26 L22 L20 L18 L16 L14 L10 L6 L5 L3 L1 K30 K29 K28 K27 K24 K23 K21 K19 K17 K15 K13 K11 K10 K9 K7 L8 M6 M8 N7 H16 J9 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 1 2 1 2 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 1 2 1 2 2 1 1 2 1 2 39 7 44 739 7 44 739 7 44 739 7 44 739 739 39 739 744 744 744 744 739 39
(8 OF 12) VDDIOD3 VDDIOD2 VDDIOD1 VDDIO30_USB11_DM VDD_CPU VSS (10 OF 12) VDDVDD (11 OF 12) VSSVSS (12 OF 12) VSSVSS Apple Inc. THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. 124578 B D 8 7 6 5 4 3 C B A NOTICE OF PROPRIETARY PROPERTY: PAGE 12 D A C PAGE TITLE SHEET IV ALL RIGHTS RESERVED R D SIZEDRAWING NUMBER REVISION BRANCH 6 3 THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT 10MA 4.2A GRAPHICS LOWPERF APPLE MC HPERF NRT HPERF RT CDIO DISP_OUT AUDIO COMPLEX AUDIENCE DSP USB PMGR 2.4A A9 CORES L2 CACHE BIU 5MA UNUSED VDDIOD3 35MA I2C2 UART0 UART5_RTXD DP_HPD TST_CLKOUT TST_STPCLK WDOG JTAG 35MA (NAND) (SDIO <= WIFI) (UART4 <= GPIOS) CRITICAL 4.7UF X5R-CERM1 C1105 402 6.3V 20% CRITICAL C1106 20% 6.3V X5R 10UF 603 CRITICAL C1109 402 4.7UF 6.3V 20% X5R-CERM1 402 CRITICAL C1108 6.3V 4.7UF 20% X5R-CERM1 CRITICAL C1107 402 4.7UF 6.3V 20% X5R-CERM1 CRITICAL C1115 0201 6.3V X5R 0.22UF 20% C1114 0.22UF X5R CRITICAL 0201 6.3V 20% CRITICAL C1112 0201 6.3V X5R 20% 0.22UF CRITICAL C1121 0201 6.3V X5R 0.22UF 20% CRITICAL C1120 0201 6.3V X5R 0.22UF 20% CRITICAL C1119 0201 6.3V X5R 20% 0.22UF CRITICAL C1118 0.22UF X5R 0201 20% 6.3V CRITICAL C1117 0201 X5R 20% 0.22UF 6.3V CRITICAL C1116 0.22UF 0201 X5R 20% 6.3V CRITICAL C1127 0201 20% 0.22UF X5R 6.3V CRITICAL C1126 0201 20% X5R 6.3V 0.22UF CRITICAL C1125 0201 20% 0.22UF X5R 6.3V CRITICAL C1124 0201 0.22UF X5R 6.3V 20% CRITICAL C1123 0201 20% 0.22UF X5R 6.3V CRITICAL C1122 0.22UF 0201 6.3V X5R 20% C1128 01005 6.3V 10% 0.01UF X5R 402 4.7UF 20% X5R-CERM1 6.3V C1133 CRITICAL CRITICAL C1104 402 6.3V 4.7UF 20% X5R-CERM1 402 4.7UF 20% X5R-CERM1 6.3V C1132 CRITICAL 402 4.7UF 20% X5R-CERM1 6.3V C1131 CRITICAL CRITICAL C1135 402 6.3V 4.7UF 20% X5R-CERM1X5R-CERM1 20% 6.3V 4.7UF 402 C1134 CRITICAL CRITICAL C1141 0201 20% 0.22UF X5R 6.3V CRITICAL C1140 0201 20% 0.22UF X5R 6.3V CRITICAL C1139 0201 20% 0.22UF X5R 6.3V CRITICAL C1138 0201 20% 0.22UF X5R 6.3V CRITICAL C1137 0201 20% 0.22UF X5R 6.3V CRITICAL C1136 0201 6.3V X5R 20% 0.22UF CRITICAL C1144 0201 20% 0.22UF X5R 6.3V CRITICAL C1143 0201 20% 0.22UF X5R 6.3V CRITICAL C1142 0201 20% 0.22UF X5R 6.3V CRITICAL C1111 X5R 0201 6.3V 0.22UF 20% C1129 01005 6.3V 10% 0.01UF X5R C1130 01005 6.3V 10% 0.01UF X5R C1146 01005 X5R 0.01UF 10% 6.3V C1145 01005 X5R 0.01UF 10% 6.3V CRITICAL C1149 402 20% X5R-CERM1 6.3V 4.7UF CRITICAL C1151 402 20% X5R-CERM1 6.3V 4.7UF CRITICAL C1110 0.22UF 20% X5R 6.3V 0201 CRITICAL C1113 0201 6.3V X5R 0.22UF 20% C1148 01005 X5R 6.3V 10% 0.01UF U0652 OMIT H4A POP-512MB-DDR BGA U0652 OMIT BGA POP-512MB-DDR H4A U0652 OMIT POP-512MB-DDR BGA H4A U0652 OMIT BGA POP-512MB-DDR H4A C1147 01005 X5R 6.3V 10% 0.01UF SYNC_DATE=04/18/2011 AP: PWR SYNC_MASTER=N/A =PP1V8_VDDIOD3_H4 =PP1V8_NAND_H4 =PP1V8_IO_H4 =PP3V3_USB_H4 =PPVDD_CPU_H4 =PPVDD_SOC_H4 051-9374 13.0.0 11 OF 102 8 OF 46 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 K25 J25 Y24 AE24 AD24 AC24 AB24 AA24 AH27 U25 N11 M16 M12 M10 V16 L15 V14 V12 V10 T16 T14 T12 L13 R15 R13 R11 R9 P16 P14 P12 N15 F5 F4 K5 J29 J28 J27 J26 J24 G17 F20 J20 J19 J6 J5 J4 H31 H30 H29 H28 H27 H25 F19 H22 AP20 AN19 H18 H15 H13 H11 H9 H7 H5 H3 G30 G29 G28 G27 G26 G25 G24 AN11 G22 AL3 G18 G16 G14 G12 G10 G8 G6 G5 F29 F28 F26 F25 F24 F23 F21 F18 F17 F16 F15 F14 F13 F12 F11 F10 F9 F8 F7 F6 U9 U11 U13 U15 M14 N9 N13 P10 L9 L11 AF22 AF20 AF18 AE23 AE21 AE19 AE17 AD22 AD20 AD18 AD16 AD14 AD12 AD10 AC23 AC21 AC19 AC17 AC15 AC13 AC11 AB22 AB20 AB18 AB16 AB14 AB12 AB10 AA23 AA21 AA19 AA17 AA15 AA13 AA11 AA9 Y22 Y20 Y18 Y16 Y14 Y12 Y10 W23 W21 K22 W19 W17 W15 W13 W11 W9 V22 V20 V18 U23 K20 U21 U19 U17 T24 T22 T20 T18 R23 R21 R19 K18 R17 P22 P20 P18 N23 N21 N19 N17 M22 M20 K16 L23 M18 K14 L17 L19 L21 AH29 AH26 AH16 AH15 AH14 AH13 AH12 AH11 AH10 AH9 AH8 AH7 AH6 AG29 AG25 AG24 AG16 AG15 AG14 AG13 AG12 AG11 AG10 AG9 AG8 AG7 AG6 AG4 AG1 AF29 AF27 AF24 AF23 AF21 AF19 AF17 AF16 AF15 AF14 AF13 AF12 AF11 AF10 AF9 AF8 AF7 AF6 J22 AF3 AE22 AE20 AE18 AE8 AE7 AE6 AE3 AD27 AD23 AD21 AD19 AD17 AD15 AD13 AD11 AD8 AD7 AD6 AD4 AD2 AD1 AC31 AC29 AC22 AC20 AC18 AC16 AC14 AC12 AC10 AC8 AC7 AC6 AC5 AC3 AC2 AB27 AB23 AB21 AB19 AB17 AB15 AB13 AB11 AB8 AB7 AB6 AB2 AA22 AA20 AA18 AA16 AA14 AA12 AA10 AA6 AA5 AA4 AA1 Y27 Y23 Y21 Y19 Y17 Y15 Y13 Y11 Y9 Y7 Y5 Y3 W24 W22 W20 W18 W16 W14 W12 W10 W6 W5 V29 V28 V23 V21 V19 V17 V15 V13 V11 V9 V7 V5 V1 J17 H17 U28 U24 U22 U20 U18 U16 U14 U12 U10 U6 U5 U4 U3 T30 G19 T28 T23 T21 T19 T17 T15 T13 T11 T7 T5 T4 R30 R29 R28 R24 R22 R20 R18 R16 U30 V4 R14 R12 R10 AP31 AP30 AP24 AP22 AP16 AP12 AP6 AP3 AP2 AP1 AN31 AN30 AN15 AN9 AN2 AN1 AM29 AM28 AM27 AM26 AM25 AM24 AM23 V31 AM17 AM14 V30 AM8 AM5 AL27 AL26 AL25 AL24 AL23 AL22 AL21 AL18 AL15 AL12 AL11 AL9 AL8 AL7 AL6 AL5 T31 AK23 AK22 AK21 AK20 AK19 AK18 AK17 AK16 AK15 AK14 AK13 AK12 AK11 AK10 AK9 AK8 AK7 AK6 K1 AK4 AJ20 AJ16 AJ14 AJ13 AJ12 AJ11 AJ10 AJ9 AJ8 AJ7 AJ4 AJ6 AJ5 AJ3 AJ15 2 1 39 539 4639 339 39 39
OUT OUT Apple Inc. THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. 124578 B D 8 7 6 5 4 3 C B A NOTICE OF PROPRIETARY PROPERTY: PAGE 12 D A C PAGE TITLE SHEET IV ALL RIGHTS RESERVED R D SIZEDRAWING NUMBER REVISION BRANCH 6 3 THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT EVT PROTO 2 PROTO 1 PROTO 0 BRD_REV[2-0] SINGLE-PIN NETS 1011 P105 DEV BOARD_ID[1] BOARD_ID[2] BOARD_ID[3] 3. READ S/W READ FLOW 1. SET GPIO AS INPUT 1110 FMI0/1 4/4 CS W/TEST 1011 RESERVED BOARD ID BOOT_CONFIG[2] (GPIO28) BOOT_CONFIG[0] (GPIO18) BOOT_CONFIG[1] (GPIO25) S/W READ FLOW BOOT_CONFIG[3:0] 0100 FMI0 2CS 0111 RESERVED FOR REFERENCE 0010 SPI0 W/TEST 0001 SPI3 0011 SPI3 W/TEST 1. SET GPIO AS INPUT 2. ENABLE PU AND DISABLE PD 3. READ DVT 000 010 100 011 001 JTAG 3. READ BOOT_CONFIG[3] (GPIO29) 2. DISABLE PU AND ENABLE PD NOTE: PADS USED FOR DEBUG BOOT CONFIG ID BOOT_CONFIG[3-0] 2. DISABLE PU AND ENABLE PD 1. SET GPIO AS INPUT ID[3-0] SYSTEM BOARD_ID[0] X123A X123B 1100 P106 AP 1101 P106 DEV 1110 P107 AP 1111 P107 DEV 1010 P105 AP 1111 RESERVED S/W READ FLOW BOARD REVISION 1101 FMI0/1 4/4 CS 1100 FMI0/1 2/2 CS 1010 FMI1 4CS W/TEST 0110 FMI0 4CS W/TEST 1001 FMI1 4 CS 1000 FMI1 2 CS 0101 FMI0 4CS 0000 SPI0 CURRENT SETTING -> 1100 FMI0/1 2/2 CS 5% 2.2K 01005 1/32W MF BOARD_ID_P105_P107 R1205 3 44 R1201 MF 1/32W 01005 2.2K 5% MF 1/32W 2.2K 5% 01005 R1200 5% 2.2K 01005 1/32W MF R1203 FMI_4CS_NOTEST MF 1/32W 01005 2.2K 5% BOARD_ID_DEV R1206 BOARD_ID_P106_P107 5% 2.2K 01005 1/32W MF R1204 SHORT-01005 XW0602 SHORT-01005 XW0601 SHORT-01005 XW0603 01005 1/32W MF 100 5% R1260 1/20W 5% MF 1K 201 NOSTUFF R1270 01005 1/32W 2.2K 5% MF R1213 3 01005 MF 1/32W 5% 100 R1210 R1202 2.2K 5% MF 1/32W 01005 FMI_4CS_TEST 01005 MF 1/32W 5% 100 R1211 NOSTUFF 5% 2.2K 01005 1/32W MF R1207 NOSTUFF 2.2K MF 1/32W 01005 5% R1208 5% 2.2K 01005 1/32W MF R1209 AP: MISC & ALIASES SYNC_DATE=04/11/2011SYNC_MASTER=N/A GPIO_BOOT_CONFIG1 GPIO_BOARD_REV2 GPIO_BOOT_CONFIG3 =PP1V8_H4 GPIO_BOOT_CONFIG2 GPIO_BOOT_CONFIG0 FMI0_RE_P FMI1_DQS_N NC_FMI0_DQS_NEG MAKE_BASE=TRUE NC_FMI0_RE_POS MAKE_BASE=TRUE NC_FMI1_DQS_NEG MAKE_BASE=TRUE NC_FMI1_RE_POS MAKE_BASE=TRUE NC_PMU_SHDWN MAKE_BASE=TRUE NC_JTAG_SOC_TDO MAKE_BASE=TRUE JTAG_SOC_TDO PMU_SHDWN FMI1_RE_P FMI0_DQS_N GPIO_BOARD_REV1 GPIO_BOARD_ID2 GPIO_BOARD_ID1 =PP1V8_H4 GPIO_BOARD_ID0 SOC_TST_STPCLK SOC_HOLD_RESET SOC_FAST_SCAN_CLK SOC_TESTMODE JTAG_SOC_SEL JTAG_SOC_TRST_L GPIO_BOARD_REV0 =PP1V8_S2R_MISC GPIO_FORCE_DFU GPIO_BOARD_ID3 NC_MIPI0C_CAM_REAR_DATA_N<2>NC_AP_MIPI0C_DNDATA2 MAKE_BASE=TRUE NC_MIPI0C_CAM_REAR_DATA_P<2>NC_AP_MIPI0C_DPDATA2 MAKE_BASE=TRUE NC_MIPI0C_CAM_REAR_DATA_N<3>NC_AP_MIPI0C_DNDATA3 MAKE_BASE=TRUE NC_MIPI0C_CAM_REAR_DATA_P<3>NC_AP_MIPI0C_DPDATA3 MAKE_BASE=TRUE NC_MIPI1D_AP_CLK_PNC_AP_MIPI1D_DPCLK MAKE_BASE=TRUE NC_MIPI1D_AP_CLK_NNC_AP_MIPI1D_DNCLK MAKE_BASE=TRUE NC_MIPI1D_AP_DATA_P<0>NC_AP_MIPI1D_DPDATA0 MAKE_BASE=TRUE NC_MIPI1D_AP_DATA_N<0>NC_AP_MIPI1D_DNDATA0 MAKE_BASE=TRUE NC_USB_FS_D_PNC_AP_USB11_DPD MAKE_BASE=TRUE NC_USB_FS_D_NNC_AP_USB11_DND MAKE_BASE=TRUE NC_AP_MIPI1D_DNDATA1 MAKE_BASE=TRUE NC_AP_MIPI1D_DPDATA1 MAKE_BASE=TRUE NC_MIPI1D_AP_DATA_N<1> NC_MIPI1D_AP_DATA_P<1> NC_MIPI1C_CAM_FRONT_DATA_P<1> NC_MIPI1C_CAM_FRONT_DATA_N<1>MAKE_BASE=TRUE NC_AP_MIPI1C_DPDATA1 MAKE_BASE=TRUE NC_AP_MIPI1C_DNDATA1 051-9374 13.0.0 12 OF 102 9 OF 46 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 4 4 4 346939 4 4 11 11 3 44 42 11 11 4 4 4 346939 4 3 3 3 3 4 41039 4 4 6 6 6 6 6 6 6 6 3 3 6 6 6 6
OUT IN OUT NC OUT IN IN OUT BYPASS SCL INT SDA SWITCH_EN HOST_RESET OVP_SW_EN* CON_DET_L DN2 DP2 DN1 DP1 ACC2 ACC1 P_IN VDD_1V8 VDD_3V0 ACC_PWR JTAG_DIO UART2_RX JTAG_CLK UART1_RX UART2_TX UART0_RX UART1_TX USB0_DN UART0_TX BRICK_ID USB0_DP USB1_DN USB1_DP DIG_DN DVSS DVSS DVSS DIG_DP IN IN S G D G SYM_VER_1 D S OUT OUT ACC_DET* ENABLE POK* ACC_PWR GND VCC Apple Inc. THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. 124578 B D 8 7 6 5 4 3 C B A NOTICE OF PROPRIETARY PROPERTY: PAGE 12 D A C PAGE TITLE SHEET IV ALL RIGHTS RESERVED R D SIZEDRAWING NUMBER REVISION BRANCH 6 3 THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT PART NUMBER ALTERNATE FORPART NUMBER BOM OPTION REF DES COMMENTS: TABLE_ALT_HEAD TABLE_ALT_ITEM TABLE_5_ITEM CRITICAL BOM OPTION TABLE_5_HEAD PART# DESCRIPTIONQTY REFERENCE DESIGNATOR(S) NXP TI IC,ASIC,TRISTAR,THS7383,A1,WLCSP36 EITHER TRISTAR OR AP CAN RESET PMU TRISTAR BYPASS FOR 3V LDO AP DEBUG UART ACCESSORY UART AP USB (T’S OFF TO H4A UART4) BB DEBUG UART TRISTAR LAYOUT NOTE: ADD THERMAL GND VIAS TO U1350 TO USB BB MUX 38 3 21 42 10 0201-1 20% 10V X5R-CERM 1.0UF C1303 CRITICAL X5R-CERM 10% 4.7UF 0603 25V C1302 CRITICAL X5R-CERM 20% 0.1UF 6.3V 01005 C1300 CRITICAL 01005 X5R-CERM 0.1UF 6.3V 20% C1301 CRITICAL 01005 MF 1/32W 5% 220K R1310 74LVC1G32 SOT891 U1310 CRITICAL 01005 MF 1/32W 5% R1311 220K X5R-CERM 01005 20% 6.3V 0.1UF C1310 4 42 3 10 42 OMIT U1300 THS7383IYKAR CRITICAL WCSP 10% 201 X5R 6.3V 0.1UF C1350 CRITICAL 10 38 4 1/32W 1.00M MF 01005 1% R1320 01005 100K MF 1/32W 1% R1321 CSD68803W15 BGA Q1301CRITICAL DFN DMN26D0UFB4 Q1300 CRITICAL MF 220K 01005 1/32W 5% R1322 CRITICAL 410 NP0-C0G-CERM 8.2PF +/-0.5PF C1321 01005 16V +/-0.5PF 8.2PF NP0-C0G-CERM C1320 16V 01005 C1322 NP0-C0G-CERM +/-0.5PF 8.2PF 16V 01005 1% 0.00 1/20W MF 0201 NOSTUFF R1350 01005 1/32W 0% 0.00 MF R1370 14 0201-1 X5R-CERM 20% 1.0UF 10V C1360 CRITICAL 25V X5R 402 1UF 10% C1361 CRITICAL C1362 01005 10V X5R 470PF 10% USMD LM34904 U1350 CRITICAL IC,ASIC,TRISTAR,CBTL1608,A1,WLCSP36343S0614 1 CRITICAL COMMONU1300 343S0620 U1300COMMON343S0614 SYNC_MASTER=N/A SYNC_DATE=N/A E75 SUPPORT JTAG_SOC_TMS JTAG_SOC_TCK UART0_DEBUG_TXD UART0_DEBUG_RXD TS_HOST_RESET =PP3V0_S2R_TRISTAR PPVBUS_PROT TS_E75_DPAIR2_N NC_U1310_5 =PP1V8_S2R_TRISTAR USB_BB_D_N USB_BRICKID MIKEY_TS_N UART4_BB_TXD UART2_ACC_RXD UART2_ACC_TXD SOC_WDOG PMU_RESET_IN =PP1V8_S2R_MISC MAX_NECK_LENGTH=3 MM NET_SPACING_TYPE=PWR MIN_NECK_WIDTH=0.2MM MIN_LINE_WIDTH=0.6MM VOLTAGE=3.3V PP3V3_ACC_FET GPIO_ACC_SW_POK =PP3V3_ACC GPIO_ACC_SW_POK_L I2C0_SCL PMU_GPIO_TRISTAR_IRQ I2C0_SDA RST_SYSTEM_L TS_HOST_RESET OVP_SW_EN_L TS_CON_DET_L TS_E75_DPAIR1_N TS_ACC2 TS_ACC1 SOC_USB_D_N SOC_USB_D_P MIKEY_TS_P L81_MBUS_REF =PPVCC_MAIN_ACC_SW GPIO_ACC_SW_POK_L GPIO_ACC_SW_EN TS_E75_DPAIR2_P =PP1V8_S2R_TRISTAR MAX_NECK_LENGTH=0.5MM MIN_NECK_WIDTH=0.1MM MIN_LINE_WIDTH=0.2MM VOLTAGE=3V NET_SPACING_TYPE=PWR TRISTAR_ADD0 TS_CON_DET_L USB_BB_D_P UART4_BB_RXD TS_E75_DPAIR1_P PP3V3_ACC_FET 051-9374 13.0.0 13 OF 102 10 OF 46 2 1 2 1 2 1 2 1 1 2 2 6 1 4 35 1 2 2 1 E6 D4 C6 D3 E4 B6 D6 E3 B4 A4 B2 A2 E5 C5 F6 F3 F4 D5 B5 D1 A5 F1 D2 E1 F2 B3 E2 C2 A3 B1 A1 C4 A6 C1 F5 C3 2 1 1 2 1 2 A2 B1 C3 C2 A3 A1 B2 C1 B3 3 1 2 1 2 2 1 2 1 2 1 1 2 1 2 2 1 2 1 2 1 C2 B2 C1 A2 B1A1 344 344 444 444 39 38 38 44 1039 2144 42 1445 42144 444 444 4939 1039 410 4 15 42 44 4 15 42 44 10 38 38 44 38 38 344 344 1445 39 38 44 1039 2144 42144 38 44 10
IN IN IN IN IN IN IN IN IN IN IN IN BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI IO0-1 IO7-1 IO6-1 IO3-1 IO4-1 IO5-1 IO1-1 IO2-1 IO7-0 IO5-0 IO6-0 IO4-0 IO2-0 IO3-0 IO1-0 IO0-0 VCC CLE1 CE1* CLE0 CE0* WE0* ALE0 RE0 RE0* DQS0* R/B0* DQS0 ALE1 WE1* RE1 RE1* DQS1 DQS1* R/B1* ZQ VREF VSSQVSS VCCQ VDDI TMSC TCKC TABLE_ALT_ITEM TABLE_ALT_ITEM PART NUMBER ALTERNATE FORPART NUMBER BOM OPTION REF DES COMMENTS: TABLE_ALT_HEAD TABLE_5_ITEM REFERENCE DESIGNATOR(S) BOM OPTION TABLE_5_HEAD QTY DESCRIPTIONPART# TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM Apple Inc. THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. 124578 B D 8 7 6 5 4 3 C B A NOTICE OF PROPRIETARY PROPERTY: PAGE 12 D A C PAGE TITLE SHEET IV ALL RIGHTS RESERVED R D SIZEDRAWING NUMBER REVISION BRANCH 6 3 THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT FLASH CONFIGURATIONS X5R 20% 0.22UF 6.3V 0201 C1414 CRITICAL 20% 0.22UF 0201 X5R 6.3V C1413 CRITICAL 01005 MF 1/32W 100K 1% R1455 CERM-X5R 10UF 6.3V 20% 0402-2 C1412 CRITICAL 6.3V 20% 10UF CERM-X5R 0402-1 C1411 CRITICAL 6.3V X5R-CERM 20% 0.1UF 01005 C141001005 0.1UF 6.3V 20% X5R-CERM C1404 20% C1402 0402-2 CERM-X5R 6.3V 10UF CRITICAL 10UF 0402-2 6.3V CERM-X5R C1401 20% CRITICAL 0402-2 CERM-X5R C1400 10UF 20% 6.3V CRITICAL 20% 0.22UF 0201 X5R 6.3V C1406 20% 0.22UF 0201 X5R 6.3V C1405 5 44 5 44 5 44 5 44 5 44 5 44 5 44 5 44 5 44 5 44 5 44 5 44 201 243 1% 1/20W MF R1454 20% X5R 6.3V 1UF 0201 C1450 CRITICAL 544 20% 0201 1UF 6.3V X5R C1451 CRITICAL 544 544 544 544 544 544 544 544 544 544 544 544 544 544 544 XXNM-XGBX8-MLC-PPN1.5-ODP OMIT LGA-12X17 U1400 CRITICAL R1460 01005 1% 1/32W MF 50K R1461 01005 1% 1/32W MF 50K 6.3V 01005 C1460 X5R 0.01UF 10% 6.3V 01005 C1461 X5R 0.01UF 10% 27PF 16V 5% 01005 NP0-C0G C1491 16V 5% 01005 NP0-C0G 27PF C1490 NP0-C0G 01005 5% 16V 27PF C1492 NP0-C0G 01005 5% 16V 27PF C1494 27PF NP0-C0G 01005 5% 16V C1493 SYNC_MASTER=MLB NAND STORAGE SYNC_DATE=05/04/2012 U1400335S0890 8GB HYNIX 20NM PPN1.5 8GB335S0889 64GB SAMSUNG 21NM PPN1.5 64GB335S0883 U1400335S0880 SAMSUNG 21NM PPN1.5 32GB32GB335S0882 U1400335S0880 SAMSUNG 21NM PPN1.5 16GB16GB335S0881 U1400335S0880 16GB SANDISK 19NM PPN1.5 16GB335S0900 U1400335S0880 U1400335S0880 64GB HYNIX 20NM PPN1.5 64GB335S0873 1 U1400335S0880 TOSHIBA 19NM PPN1.5 64GB 64GB U14001335S0879 TOSHIBA 19NM PPN1.5 32GB 32GB U14001335S0878 TOSHIBA 19NM PPN1.5 16GB 16GB 1 U1400335S0890 TOSHIBA 19NM PPN1.5 8GB 8GB U1400335S0878 16GB HYNIX 20NM PPN1.5 16GB335S0871 U1400335S0879 32GB HYNIX 20NM PPN1.5 32GB335S0872 =PP1V8_NAND NAND_RDYBSY_L =PP1V8_NAND VREF_NAND_U1400 MIN_LINE_WIDTH=0.2MM NET_SPACING_TYPE=PWR MAX_NECK_LENGTH=3MM MIN_NECK_WIDTH=0.1MM VOLTAGE=1.2V PPVDDI_NAND_U1400 =PP3V3_NAND FMI_ZQ_U1400 FMI1_CLE FMI1_CE0_L FMI0_CLE FMI0_CE0_L FMI0_WE_L FMI0_ALE FMI0_RE_P FMI0_RE_N FMI0_DQS_N FMI0_DQS_P FMI1_ALE FMI1_WE_L FMI1_RE_P FMI1_RE_N FMI1_DQS_P FMI1_DQS_N TP_TMSC_U1400 TP_TCKC_U1400 FMI0_AD<2> FMI0_AD<3> FMI0_AD<6> FMI0_AD<7> FMI1_AD<0> FMI1_AD<1> FMI1_AD<2> FMI1_AD<3> FMI1_AD<4> FMI1_AD<5> FMI1_AD<6> FMI1_AD<7> FMI0_AD<5> FMI0_AD<0> FMI0_AD<1> FMI0_AD<4> 051-9374 13.0.0 14 OF 102 11 OF 46 2 1 2 1 1 2 2 1 2 1 2 12 1 2 1 2 1 2 1 2 1 2 1 1 2 2 1 2 1 G1 G7 J7 N3 N5 L7 J1 L1 H6 K6 J5 L5 J3 K2 H2 G3 F2 M6 B6 C3 C5 A3 A5 E3 C1 B4 C7 F4 E5 H4 D2 E1 D4 D6 M4 K4 E7 A1 G5 OA8 OF8 G0 OE0 OD8 OC8 N7 OE8 OD0 OC0 A7 M2 L3 F6 B2 OF0 G8 N1 OB8 OB0 OA0 1 2 1 2 2 1 2 1 2 1 2 1 2 1 2 1 2 1 11 39 11 39 39 9 9 9 9
CAP ON S D VDD GND Apple Inc. THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. 124578 B D 8 7 6 5 4 3 C B A NOTICE OF PROPRIETARY PROPERTY: PAGE 12 D A C PAGE TITLE SHEET IV ALL RIGHTS RESERVED R D SIZEDRAWING NUMBER REVISION BRANCH 6 3 THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT LAYOUT NOTE: PUT THERMAL VIAS AROUND U2200 IN CASE OF SHORTED CONDITION (PLUG - FLEX 998-4527) TOUCH SUBSYSTEM RCPT - MLB 998-4526 -> 516S1054 01005 MF 1/32W 0% 0.00 R1752 F-ST-SM-1 CRITICAL 503304-2010 J1700 01005 1% 1.00K 1/32W R1790 MF MF R1780 0% 1/32W 01005 0.00 0.00 1/32W 0% MF R1753 01005 01005 16V NP0-C0G 5% 27PF NOSTUFF C1761 C1702 16V 1000PF 201 X7R 10% C1701 402 1UF 10% 10V X5R C1700 5% NP0-C0G 16V 01005 27PF 240OHM-350MA 0201 L1700 C1705 10% 16V X7R 201 1000PF C1704 0201 1UF 20% 6.3V X5R C1708 10% 16V X7R 201 1000PF C1707 0201 1UF 20% 6.3V X5R 01005 C1703 NP0-C0G 16V 27PF 5% 240OHM-350MA 0201 L1701 L1702 0201 240-OHM-0.2A-0.8-OHM C1706 16V NP0-C0G 27PF 5% 01005 L1750 NOSTUFF 240-OHM-0.2A-0.8-OHM 0201 CRITICAL C1752 0201 20% 1UF X5R 6.3VCRITICAL SLG5AP302 TDFN U1700 CRITICAL 16V X5R-CERM 0.1UF 10% 0201 C1750 201 4700PF 10V X7R 10% C1751 CRITICAL 01005 1/32W MF R1751 100K 1% CRITICAL 10V X5R-CERM 0402-2 20% C1753 10UF NOSTUFF R1750 169K 1/20W MF 1% 201 L1760 150OHM-25%-200MA-0.7DCR 01005 01005 16V NP0-C0G 5% 27PF C1760 SYNC_MASTER=N/A TOUCH: FLEX CONNECTOR SYNC_DATE=06/21/2010 PMU_GPIO_HALL_IRQ_2 PMU_GPIO_HALL_IRQ_4 GPIO_BTN_HOME_FILT_L SPI1_GRAPE_SCLK_RSPI1_GRAPE_SCLK GPIO_BTN_HOME_R_L DISPLAY_SYNC_RDISPLAY_SYNC =PP1V8_GRAPE PP3V0_S2R_HALL_FILT PMU_GPIO_HALL_IRQ_1 GPIO_BTN_HOME_FILT_L SPI1_GRAPE_MISO PP5V25_GRAPE_FILT VOLTAGE=5.25V MIN_LINE_WIDTH=0.6 mm MIN_NECK_WIDTH=0.2 mm NET_SPACING_TYPE=PWR MAX_NECK_LENGTH=3 MM =PP5V25_GRAPE =PP1V8_S2R_GRAPE PP1V8_GRAPE_FILT MAX_NECK_LENGTH=3 MM NET_SPACING_TYPE=PWR VOLTAGE=1.8V MIN_NECK_WIDTH=0.2 mm MIN_LINE_WIDTH=0.6 mm VCC_MAIN_GRAPE_RAMP MAX_NECK_LENGTH=3 MM NET_SPACING_TYPE=PWR MIN_LINE_WIDTH=0.6 mm MIN_NECK_WIDTH=0.2 mm PP3V0_S2R_HALL_FILT VOLTAGE=3.0V =PP3V0_S2R_HALL GPIO_BTN_HOME_L PP5V25_GRAPE_FILT PP1V8_GRAPE_FILT SPI1_GRAPE_CS_L SPI1_GRAPE_MOSI PP1V8_S2R2GRAPE VOLTAGE=1.8V MIN_LINE_WIDTH=0.30 MM MIN_NECK_WIDTH=0.20 MM NET_SPACING_TYPE=PWR MAX_NECK_LENGTH=3 MM PMU_GPIO_HALL_IRQ_3 GPIO_GRAPE_IRQ_L GPIO_GRAPE_RST_L AP_CLK_32K_CUMULUS =PPVCC_MAIN_GRAPE =PP1V8_GRAPE =PP5V25_GRAPE MAIN2GRAPE_ON 051-9374 13.0.0 17 OF 102 12 OF 46 1 2 13 17 24 23 19 11 15 9 7 5 1 3 18 20 12 14 16 8 10 6 4 2 22 21 1 2 1 2 1 2 2 1 2 1 2 1 2 1 21 2 1 2 1 2 1 2 1 2 1 21 21 2 1 21 2 1 7 2 5 3 18 2 1 2 11 2 2 1 1 2 21 2 1 42 42 12 44444 6 1239 12 42 12 444 121239 39 12 1239 442 12 12 444 444 42 4 4 444 39 1239 1239
Apple Inc. THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. 124578 B D 8 7 6 5 4 3 C B A NOTICE OF PROPRIETARY PROPERTY: PAGE 12 D A C PAGE TITLE SHEET IV ALL RIGHTS RESERVED R D SIZEDRAWING NUMBER REVISION BRANCH 6 3 THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT AUDIO_JACK_FLEX MIC2 AUDIO_JACK_FLEX MIC1 AUDIO_JACK_FLEX RET2 AUDIO_JACK_FLEX RET1 PER DAVE BREECE P/N 510S0760 - MLB (P/N 510S0761 - FLEX) CRITICAL F-ST-SM-COMBO AA07-S016VA1 J1800 L1800 240-OHM-0.2A-0.8-OHM 0201 01005 5% 27PF 16V NP0-C0G C1800 C1801 201 X5R 6.3V 10% 0.1UF NP0-C0G 16V 27PF 5% 01005 C1802 1/32W MF 0.00 0% R1850 01005 NOSTUFF C1850 01005 5% 27PF 16V NP0-C0G C1821 56PF NP0-C0G 16V 5% 0100501005 C1820 56PF NP0-C0G 16V 5% 01005 C1822 56PF NP0-C0G 16V 5% AUDIO JACK FLEX CONN SYNC_MASTER=N/A SYNC_DATE=03/31/2011 =PP1V8_DMIC DMIC1_FF_SCLK CONN_HP_HEADSET_DET CONN_HP_LEFT_FILT CONN_HP_RIGHT_FILT CONN_HP_HS3_FILT CONN_HP_HS4_FILT MAX_NECK_LENGTH=3 MM MIN_NECK_WIDTH=0.2 mm VOLTAGE=1.8V PP1V8_DMIC_CONN MIN_LINE_WIDTH=0.6 mm NET_SPACING_TYPE=PWR DMIC1_FF_SCLK_CONN DMIC1_FF_SD CONN_HP_HS3_REF_FILT CONN_HP_HS4_REF_FILT VOLTAGE=2.65V MIN_NECK_WIDTH=0.06 MMPP_LDO14_2P65 ANT_PORTB_1 ANT_PORTB_2 ANT_PORTB_3 051-9374 13.0.0 18 OF 102 13 OF 46 20 19 18 17 15 13 11 9 7 1 16 14 12 10 8 6 4 2 5 3 21 2 1 2 1 2 1 1 2 2 1 2 1 2 1 2 1 39 1445 14 14 14 14 14 45 1445 14 14 2122273235 2125 2125 2125
IN IN IN IN IN IN IN IN IN IN IN OUT OUT IN OUT IN OUT OUT IN IN IN OUT IN BI BI OUT OUT SYM 2 OF 2 DMIC1_SCLK DMIC2_SD MCLK GND13 GND0 TSTI2 TSTI1 TSTI0 GND18 GND17 GND16 GND15 GND14 GND12 GND11 GND10 GND9 GND8 GND7 GND6 GND5 GND4 GND3 GND2 GND1 RESET* WAKE* INT* CDOUT CDIN CCLK XSP_SDOUT XSP_SDIN_DAC2_MUTE XSP_LRCK_FSYNC XSP_SCLK ASP_SDOUT ASP_SDIN ASP_LRCK ASP_SCLK DMIC2_SCLK DMIC1_SD CS* MBUS_REF SYM 1 OF 2 FLYP MIC4_BIAS_FILT AIN3+ AIN1- FLYN GNDA MIC1_BIAS MIC2_BIAS_FILT_IN MIC2_BIAS_FILT MIC2_BIAS AIN2+ AIN2M MIC2_BIAS_IN AIN3- MIC3_BIAS MIC3_BIAS_FILT AIN4+ AIN4- MIC4_BIAS GNDP GNDD GNDHS +VCP_FILT FILT- FILT+ LINEOUT_REF LINEOUTB LINEOUTA HPDETECT HS4_REF HS3_REF HS4 HS3 HPOUTB HPOUTA DN DP AOUT2- AOUT2+ AOUT1_M AOUT1+ GNDCP -VCP_FILT VA VCP1 VD VP0 VL VP1 VPROG_CP VPROG_MB SPEAKER_VQ AIN1+ MIC1_BIAS_FILT GNDHS FLYC VCP0 IN IN PART NUMBER ALTERNATE FORPART NUMBER BOM OPTION REF DES COMMENTS: TABLE_ALT_HEAD TABLE_ALT_ITEM Apple Inc. THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. 124578 B D 8 7 6 5 4 3 C B A NOTICE OF PROPRIETARY PROPERTY: PAGE 12 D A C PAGE TITLE SHEET IV ALL RIGHTS RESERVED R D SIZEDRAWING NUMBER REVISION BRANCH 6 3 THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT DIGITAL MIC TO HEADPHONE JACK PLACE L1900 TO 1905 CLOSE TO THE HP CONNECTOR U1900 DECAPS CHANGED ON 5/24/12 PER RADAR #11485846 NOTE: PLACE R1930 & R1931 CLOSE TO U3600 MIKEY BUS FILTER 13 CRITICAL 4.7UF 402 20% 6.3V X5R C1910 NOSTUFF SHORT-8L-0.25MM-SM XW1900 CRITICAL 20% X5R 4.7UF C1907 402 6.3V CRITICAL 4.7UF X5R 20% 402 6.3V C1908 R1912 MF1/32W 5% 01005 22 R1913 010055%1/32W MF 22 1345 1345 444 444 R19101/32W 5% MF 01005 22 1/32W R1911 22 5% 01005MF 444 444 444 444 444 444 444 444 444 444 444 4 42 42 4.7UF 402 20% 6.3V X5R C1912 R1901 1% 2.21K 201 1/20W MF 20% X5R 1.0UF 6.3V 0201-MUR C1911 R1940 NOSTUFF 01005 MF 1/32W 5% 1.00K 13 13 NOSTUFF 5% MF 1/20W 201 0 R1914 10 14 1014 CRITICAL X5R 6.3V 10% 402 NOSTUFF 2.2UF C1918 SHORT-8L-0.25MM-SM NOSTUFF XW1902 10% 201 X5R 0.01UF 10V C1916 10V 201 10% X5R 0.01UF C1917 NOSTUFF SHORT-8L-0.25MM-SM XW1903 1/20W 201 12 MF 5% R1931 12 1/20W 201 MF 5% R1930 SIGNAL_MODEL=EMPTY 100PF NP0-CERM 0201 25V 5% C1932 NOSTUFF 25V NP0-CERM 0201 100PF 5% C1931 SIGNAL_MODEL=EMPTY 0201 100PF 25V NP0-CERM 5% C1930 10 45 10 45 0201 FERR-33-OHM-0.8A-0.09-OHM L1900 0201 FERR-33-OHM-0.8A-0.09-OHM L1901 0201 FERR-33-OHM-0.8A-0.09-OHM L1902 0201 FERR-33-OHM-0.8A-0.09-OHM L1903 120-OHM-210MA 01005 L1904 01005 120-OHM-210MA L1905 13 13 5% 100PF NP0-C0G 16V 01005 C1990 01005 16V NP0-C0G 100PF 5% C1991 R1950 201 1.00 1% 1/20W MF C1951 CRITICAL 1.0UF 0201-MUR 20% 6.3V X5R 6.3V X5R 402 20% CRITICAL C1950 4.7UF 201 R1951 MF 1/20W 1% 1.00 201 255K R1952 1% 1/20W MF C1913 10V X5R-CERM 0201 10% 0.1UF 201 R1953 0 MF 1/20W 5% NOSTUFF 0 1/20W MF 5% R1954 201 CS42L81-CWZR-A1 WLCSP U1900 CS42L81-CWZR-A1 U1900 WLCSP CRITICAL 10% C1914 10V X5R-CERM 0201 0.1UF C1909 0402 10V 20% 4.7UF X5R-CERM CRITICAL 0.1UF 10% 0201 X5R-CERM 10V C1904 0.1UF C1915 01005 X5R-CERM 6.3V 20% C1902 0.1UF 20% 6.3V X5R-CERM 01005 X5R 6.3V 20% 0201-MUR 1.0UF C1903 CRITICAL 20% 402 X5R C1901 6.3V 4.7UF CRITICAL 402 20%6.3V X5R 4.7UF C1905 X5R402 6.3V 4.7UF 20% C1906 13 0201 240-OHM-0.2A-0.8-OHM L1920 NOSTUFF 201 X7R 10V 10% 4700PF C1920MF 5% 1/32W 3.3K 01005 R1920 13 SYNC_MASTER=KAVITHA AUDIO: L81 CODEC SYNC_DATE=01/18/2012 RADAR:11100717L1904,L1905155S0453155S0773 MIKEY_TS_N MIKEY_TS_PL81_MBUS_P L81_MBUS_N =PP1V7_VA_VCP 0.30MML81_PVCP 0.15MM CODEC_HP_HS4_REF MIN_LINE_WIDTH=0.15MM MIN_NECK_WIDTH=0.1MM L81_MBUS_REF GND_AUDIO_CODEC MIN_LINE_WIDTH=0.15MM MIN_NECK_WIDTH=0.1MM CODEC_HP_HS3_REF L82_MIC2_BIAS_FILT AIN1P NO_TEST=TRUE MIN_LINE_WIDTH=0.15MM CONN_HP_HS4_REF_FILT MIN_NECK_WIDTH=0.1MM CONN_HP_HS3_REF_FILT MIN_LINE_WIDTH=0.15MM MIN_NECK_WIDTH=0.1MM NO_TEST=TRUE NC_CODEC_LINE_OUT_L NC_CODEC_LINE_OUT_RNO_TEST=TRUE L81_SPEAKER_VQ NO_TEST=TRUE NC_RIGHT_CH_OUT_N L81_NVCP 0.15MM 0.30MMNO_TEST=TRUENC_LEFT_CH_OUT_P AIN4P NO_TEST=TRUE HP_MIC_N HP_MIC_PCODEC_HP_HS4_REF NO_TEST=TRUEMIC4_BIAS_FILT CODEC_HP_DET L81_FILT NO_TEST=TRUENC_LEFT_CH_OUT_N CODEC_HP_DET CONN_HP_HEADSET_DET AIN3P NO_TEST=TRUE AIN3N NO_TEST=TRUE NO_TEST=TRUEMIC3_BIAS_FILT L81_AIN2_P AIN4N NO_TEST=TRUE NC_RIGHT_CH_OUT_PNO_TEST=TRUE L81_MBUS_N NO_TEST=TRUEMIC1_BIAS_FILT AIN1N NO_TEST=TRUE MIN_NECK_WIDTH=0.20MM CONN_HP_HS4_FILT MIN_LINE_WIDTH=0.50MM CODEC_HP_DET_R MIN_NECK_WIDTH=0.15MM CONN_HP_LEFT_FILT MIN_LINE_WIDTH=0.20MM CONN_HP_RIGHT_FILT MIN_LINE_WIDTH=0.20MM MIN_NECK_WIDTH=0.15MM MIN_NECK_WIDTH=0.20MM MIN_LINE_WIDTH=0.50MM CONN_HP_HS3_FILT L81_MBUS_P MIN_LINE_WIDTH=0.20MMCODEC_HP_LEFT MIN_NECK_WIDTH=0.15MM CODEC_HP_HS4 MIN_NECK_WIDTH=0.20MMMIN_LINE_WIDTH=0.50MM CODEC_HP_HS3 MIN_NECK_WIDTH=0.20MMMIN_LINE_WIDTH=0.50MM MIN_NECK_WIDTH=0.15MMMIN_LINE_WIDTH=0.20MMCODEC_HP_RIGHT GND_AUDIO_CODEC CODEC_HP_HS3_REF L81_AIN2_N L81_MIC2_BIAS_FILT_IN L81_MIC2_BIAS_IN MIC3_BIAS_FILT MIC4_BIAS_FILT MIC1_BIAS_FILT AIN1P AIN1N AIN3N AIN3P CODEC_AIN MAKE_BASE=TRUE AIN4N AIN4P NC_MIC1_BIAS NO_TEST=TRUE NO_TEST=TRUENC_MIC3_BIAS NC_MIC4_BIAS NO_TEST=TRUE MAKE_BASE=TRUE CODEC_MIC_BIAS_FILT L81_MIC2_BIAS =PP1V8_AUDIO PMU_GPIO_CODEC_RST_L L81_DMIC1_FF_SCLK I2S0_CODEC_ASP_MCK PMU_GPIO_CODEC_HS_IRQ_L GPIO_CODEC_IRQ_L SPI2_CODEC_MISO SPI2_CODEC_MOSI SPI2_CODEC_SCLK I2S2_CODEC_XSP_DOUT I2S2_CODEC_XSP_LRCK I2S2_CODEC_XSP_BCLK I2S0_CODEC_ASP_DOUT I2S0_CODEC_ASP_LRCK I2S0_CODEC_ASP_BCLK NO_TEST=TRUENC_DMIC2_SCLK L81_DMIC1_FF_SD SPI2_CODEC_CS_L L81_MBUS_REF I2S0_CODEC_ASP_DIN I2S0_CODEC_ASP_SDOUT DMIC1_FF_SD DMIC1_FF_SCLK I2S2_CODEC_XSP_DIN I2S2_CODEC_XSP_SDOUT =PP1V8_AUDIO GND_AUDIO_CODEC GND_AUDIO_CODEC VOLTAGE=0V GND_AUDIO_CODEC 0.20MM 0.15MM PP1V7_VCP VOLTAGE=1.7V MIN_LINE_WIDTH=0.3MM MIN_NECK_WIDTH=0.15MM PPVCC_VPROG_MB_F VOLTAGE=4.2V MIN_LINE_WIDTH=0.3MM MIN_NECK_WIDTH=0.15MM 0.3MM 0.15MM L81_FLYN 0.3MM 0.15MM L81_FLYC 0.3MM 0.15MM L81_FLYP =PPVCC_MAIN_AUDIO PPVCC_VPROG_CP MIN_NECK_WIDTH=0.15MM MIN_LINE_WIDTH=0.3MM VOLTAGE=4.2V MIN_NECK_WIDTH=0.15MM MIN_LINE_WIDTH=0.3MM VOLTAGE=4.2V PPVCC_VPROG_MB =PP3V0_SPARE1 051-9374 13.0.0 19 OF 102 14 OF 46 2 1 21 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 2 1 1 2 1 2 2 1 2 1 1 2 1 22 1 1 2 1 2 2 1 2 1 2 1 21 21 21 21 21 21 2 1 2 1 1 2 2 1 2 1 1 2 1 2 2 1 1 2 1 2 B2 B7 C8 G5 C6 D4 C7 C4 J5 H7 H5 G7 G6 F8 F7 F6 F5 E7 E6 E5 D8 D7 D6 D5 D3 C9 B10 B9 A7 B8 A6 A4 A5 B5 B4 A1 A2 B3 A3 B6 B1 C5 K5 H10 F2 C3 E4 K10 G2 H2 K3 F3 G4 C1 D1 J3 C2 H4 G3 D2 E2 F4 E10 A10 J2 H9 F1 E1 H6 J6 K6 H8 J7 K7 K1 J1 K8 J8 K4 J4 D9 D10 F9 F10 J9 K9 G1 G9 A9 E8 A8 E9 G10 H1 C10 E3 H3 K2 J10 G8 2 1 2 1 2 1 2 1 2 1 2 1 2 1 12 12 21 2 1 1 2 1445 1445 1539 14 14 14 14 14 45 4514 14 14 14 14 14 14 45 14 14 45 14 14 14 45 14 14 45 14 14 14 14 14 14 14 14 14 1439 45 45 44 44 1439 14 14 14 1539 39
15 OF 46 FILT+ SCL VP SDA VA ADO VBST SW GNDA IREF+ OUT+ OUT- ISENSE+ ISENSE- VSENSE+ VSENSE- LDO_FILT GNDP INT* RESET* ALIVE MCLK SCLK LRCK/FSYNC SDIN SDOUT VER1 FILT+ SCL VP SDA VA ADO VBST SW GNDA IREF+ OUT+ OUT- ISENSE+ ISENSE- VSENSE+ VSENSE- LDO_FILT GNDP INT* RESET* ALIVE MCLK SCLK LRCK/FSYNC SDIN SDOUT VER1 Apple Inc. THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. 124578 B D 8 7 6 5 4 3 C B A NOTICE OF PROPRIETARY PROPERTY: PAGE 12 D A C PAGE TITLE SHEET IV ALL RIGHTS RESERVED R D SIZEDRAWING NUMBER REVISION BRANCH 6 3 THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT CRITICAL BOM OPTION TABLE_5_HEAD PART# DESCRIPTIONQTY REFERENCE DESIGNATOR(S) TABLE_5_ITEM RIGHT SPEAKER AMP TBD: PLACEHOLDER FOR SPM3010T-XXX SPEAKER CONNECTOR PLACE XWS CLOSE TO CONNECTOR TBD: PLACEHOLDER FOR SPM3010T-XXX I2C ADDRESS: 1000001X LEFT SPEAKER AMP I2C ADDRESS: 1000000X L2050 TFA302610A-SM 2.2UH-20%-3.3A-0.11OHM C2072 NP0-C0G 01005 NOSTUFF CRITICAL 5% 16V 100PF U2040 WLCSP CS35L19B-CWZR U2050 WLCSP CS35L19B-CWZR NOSTUFF C2061 16V CERM 5% 18PF 01005 NOSTUFF C2081 CERM 16V 5% 18PF 01005 CRITICAL C2094 0402-1 X5R-CERM 20% 10V 10UF C2092 X5R-CERM 0.1UF 10% 10V 0201 C2093 0201 10V 10% 0.1UF X5R-CERM CRITICAL C2095 10UF 10V 20% 0402-1 X5R-CERM CRITICAL C2091 10UF 10V 20% 0402-1 X5R-CERM CRITICAL C2090 10V 20% 10UF 0402-1 X5R-CERM C2054 10V 0201 10% 0.1UF X5R-CERM CRITICAL C2055 603 X5R 10V 20% 10UF NOSTUFF 01005 18PF 5% 16V CERM C2084 R2051 201 MF 1% 44.2K 1/20W 0% 0.00 MF 01005 1/32W R2053 C2056 201 10% X5R 6.3V 0.1UF CRITICAL C2058 4.7UF X5R-CERM1 6.3V 20% 402 CRITICAL C2057 4.7UF 402 20% X5R-CERM1 6.3V NOSTUFF 01005 18PF 5% 16V CERM C2064 R2041 201 MF 1% 1/20W 44.2K 1/32W 0% 0.00 MF 01005 R2043 CRITICAL C2048 4.7UF X5R-CERM1 402 20% 6.3V CRITICAL C2041 X5R-CERM 4.7UF 10V 0402 20% CRITICAL C2051 0402 10V 20% 4.7UF X5R-CERM CRITICAL C2043 X5R-CERM 4.7UF 10V 0402 20% CRITICAL L2040 TFA302610A-SM 2.2UH-20%-3.3A-0.11OHM C2044 X5R-CERM 0.1UF 10V 0201 10% C2045 10UF X5R 603 20% 10V CRITICAL C2046 X5R 6.3V 0.1UF 10% 201 CRITICAL C2047 20% 6.3V X5R-CERM1 402 4.7UF CRITICAL R2050 1% 0.100 0805 1/4W MF 0% 0.00 MF 1/32W 01005 R2052 OMIT FL2050 0603 220-OHM-2.0A OMIT FL2051 0603 220-OHM-2.0A NOSTUFF C2080 10% 6.3V 0.01UF 01005 X5R NOSTUFF CERM 16V 18PF 5% 01005 C2059 NOSTUFF C2086 01005 3.9PF +/-0.1PF NP0-C0G 16V NOSTUFF C2050 16V 01005 5% 18PF CERM NOSTUFF C2083 01005 3.9PF +/-0.1PF NP0-C0G 16V OMIT FL2040 0603 220-OHM-2.0A CRITICAL R2040 0.100 0805 1/4W MF 1% 1/32W 0% 0.00 MF 01005 R2042 NOSTUFF C2060 6.3V 10% 01005 X5R 0.01UF CRITICAL C2052 X5R-CERM 4.7UF 0402 10V 20% OMIT FL2041 0603 220-OHM-2.0A NOSTUFF CERM 16V 18PF 5% 01005 C2049 NOSTUFF C2066 01005 3.9PF +/-0.1PF NP0-C0G 16V NOSTUFF C2040 01005 5% 18PF CERM 16V NOSTUFF C2063 01005 +/-0.1PF NP0-C0G 16V 3.9PF NOSTUFF C2068 01005 5% 100PF NP0-C0G 16V NOSTUFF C2067 01005 5% 100PF NP0-C0G 16V NOSTUFF C2088 01005 5% 100PF NP0-C0G 16V NOSTUFF C2087 01005 5% 100PF NP0-C0G 16V R2054 01005 10K 5% MF 1/32W R2055 01005 10K 5% MF 1/32W CRITICAL C2053 20% 10V 0402 4.7UF X5R-CERM XW2077 SM SIGNAL_MODEL=EMPTY XW2076 SM SIGNAL_MODEL=EMPTY XW2075 SM SIGNAL_MODEL=EMPTY XW2074 SM SIGNAL_MODEL=EMPTY R2044 01005 MF 5% 10K 1/32W NOSTUFF C2070 CRITICAL 100PF 16V 5% 01005 NP0-C0G R2045 01005 10K 5% MF 1/32W C2071 NP0-C0G 100PF 01005 5% 16V NOSTUFF CRITICAL C2073 CRITICAL NP0-C0G NOSTUFF 100PF 01005 5% 16V 4 RES,MF,1/10W,0 OHM,5%,0603,SMD,LF FL2040,FL2041,FL2050,FL2051113S0022 SYNC_DATE=01/18/2012 AUDIO: CS35L19A AMPS SYNC_MASTER=KAVITHA PP1V7_VA_VCP GPIO_SPKAMP_RIGHT_IRQ_L I2C0_SCL SPKR_R_CONN_N SPKR_R_N MIN_NECK_WIDTH=0.2 MM MIN_LINE_WIDTH=0.5 MM SPKR_L_CONN_N SPKR_L_N MIN_LINE_WIDTH=0.5 MM MIN_NECK_WIDTH=0.2 MM MIN_LINE_WIDTH=0.5 MM MIN_NECK_WIDTH=0.2 MM SPKR_R_P I2C0_SDA L19_R_IREF GPIO_SPKAMP_RST_L L19_L_FILT =PP1V7_VA_VCP L19_L_SWITCH L19_L_IREF SPKR_L_SES_P SPKR_L_SES_N SPKR_L_VSENSE_P_FILT SPKR_L_VSENSE_N_FILT L19_L_LDO_FILT GPIO_SPKAMP_LEFT_IRQ_L I2S1_SPKAMP_BCLK I2S1_SPKAMP_LRCK I2S1_SPKAMP_DOUT I2S1_SPKAMP_DIN L19_R_FILT =PP1V7_VA_VCP SPKR_R_SES_P SPKR_R_SES_N SPKR_R_VSENSE_P_FILT L19_R_LDO_FILT GPIO_SPKAMP_KEEPALIVE I2S1_SPKAMP_LRCK SPKR_R_VSENSE_P SPKR_R_VSENSE_N SPKR_L_VSENSE_N SPKR_R_VSENSE_N SPKR_R_VSENSE_P SPKR_L_VSENSE_N SPKR_L_VSENSE_P SPKR_R_CONN_P SPKR_L_CONN_N SPKR_R_CONN_P SPKR_R_CONN_N SPKR_L_CONN_P SPKR_L_CONN_P SPKR_L_VSENSE_P I2C0_SDA L19_R_SWITCH MIN_NECK_WIDTH=0.2 MM MIN_LINE_WIDTH=0.5 MM SPKR_R_FLR MIN_NECK_WIDTH=0.2 MM MIN_LINE_WIDTH=0.5 MM SPKR_L_FLR SPKR_L_P MIN_NECK_WIDTH=0.2 MM MIN_LINE_WIDTH=0.5 MM I2S1_SPKAMP_MCK GPIO_SPKAMP_KEEPALIVE I2C0_SCL GPIO_SPKAMP_RST_L I2S1_SPKAMP_MCK I2S1_SPKAMP_BCLK I2S1_SPKAMP_DOUT L19_R_VBOOST =PPVCC_MAIN_AUDIO L19_L_VBOOST I2S1_SPKAMP_DIN =PPVCC_MAIN_AUDIO SPKR_R_VSENSE_N_FILT 20 OF 102 13.0.0 051-9374 4 OF 4 21 2 1 F2 D1 D6 A4 B1 C1 D5 F5 C7 A5 A1 A2 D4 F4 F3 B5 B6 C6 E4 C4 C3 B4 B3 B7 D2 C2 E1 F1 E2 E3 C5 D3 A3 A7 A6 D7 E7 E6 F6 F7 E5 B2 F2 D1 D6 A4 B1 C1 D5 F5 C7 A5 A1 A2 D4 F4 F3 B5 B6 C6 E4 C4 C3 B4 B3 B7 D2 C2 E1 F1 E2 E3 C5 D3 A3 A7 A6 D7 E7 E6 F6 F7 E5 B2 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 1 2 1 2 2 1 1 2 1 2 2 1 1 2 1 2 1 2 2 1 2 1 2 1 21 2 1 2 1 2 1 1 2 1 2 1 2 21 21 1 2 2 1 2 1 2 1 2 1 21 1 2 1 2 1 2 2 1 21 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 1 2 1 2 2 1 1 2 1 2 1 2 1 2 1 2 2 1 1 2 2 1 2 1 14 93 4 444 24 51 01 15 38 45 15 38 45 444 24 51 01 415 14 15 39 4 444 51 444 51 444 51 444 51 14 15 39 415 444 51 15 15 15 15 15 15 15 15 38 45 54 83 51 54 83 51 54 83 51 54 83 51 15 38 45 15 444 24 51 01 444 51 415 444 24 51 01 415 444 51 444 51 444 51 93 51 41 444 51 93 51 41
IN IN IN SYM_VER-2 SYM_VER-2 IN IN IN IN IN IN IN IN IN IN IN IN SYM_VER-2 SYM_VER-2 IN INSYM_VER-2 GND VDD D SON CAP PART NUMBER ALTERNATE FORPART NUMBER BOM OPTION REF DES COMMENTS: TABLE_ALT_HEAD Apple Inc. THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. 124578 B D 8 7 6 5 4 3 C B A NOTICE OF PROPRIETARY PROPERTY: PAGE 12 D A C PAGE TITLE SHEET IV ALL RIGHTS RESERVED R D SIZEDRAWING NUMBER REVISION BRANCH 6 3 THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT TABLE_ALT_ITEM P/N 998-4669 -> 516S1056LAYOUT NOTE: PUT THERMAL VIAS AROUND U2200 IN CASE OF SHORTED CONDITION MIPI CONNECTOR FERR-120-OHM-1.5A 0402 L2201 CRITICAL 0402-2 10UF 20% 10V X5R-CERM C2202 0.1UF 0201 16V 10% X5R-CERM C2203 CRITICAL 10% 25V X7R-CERM 0201 C2220 820PF 0201 NP0-CERM 25V 100PF 5% C2233 01005 27PF 16V 5% C2230 NP0-C0G 5% NP0-C0G 16V 27PF 01005 C2232 L2200 0402 FERR-240-OHM-25%-300MA 16V 10% 201 X7R 1000PF C2206 42 42 42 90-OHM-50MA TCM0605-1 L2212 CRITICAL 90-OHM-50MA TCM0605-1 L2202 CRITICAL 6 45 6 45 6 45 6 45 C2240 X5R-CERM 16V 0.1UF 10% 0201 CRITICAL 201 MF 1% 100K 1/20W R2205 4 10% X7R 50V 0402 3900PF C2241 CRITICAL 42 42 42 5% 16V NP0-C0G 27PF 01005 C2242 6 45 6 45 6 45 6 45 TCM0605-1 90-OHM-50MA L2232 CRITICAL 90-OHM-50MA TCM0605-1 L2222 CRITICAL 5% 27PF NP0-C0G 25V 0201 C2250 201 2.7K MF R2260 5% 1/20W F-ST-SM-1 CRITICAL J2201 AA07A-S032-VA1 6 45 6 45 CRITICAL L2233 90-OHM-50MA TCM0605-1 SLG5AP304V U2200 CRITICAL TDFN L2202,L2212,L2222,L2232,L2233,L2610,L2611,L2910,L2911,L2912,L5703,L5704 RADAR:11100629155S0667 155S0583 VIDEO: MIPI CONNECTOR SYNC_DATE=N/ASYNC_MASTER=N/A =PPVCC_MAIN_LCD MIN_NECK_WIDTH=0.20 MM MIN_LINE_WIDTH=0.30 MM VOLTAGE=4.5V PPVCC_MAIN_LCD_SWGPIO_MLC_PWR_EN VCC_MAIN_LCD_RAMP WLED_STRING1 WLED_STRING6 MAX_NECK_LENGTH=3 MM NET_SPACING_TYPE=PWR VOLTAGE=20.4V MIN_NECK_WIDTH=0.2 MM MIN_LINE_WIDTH=0.6 MM PPLED_BACK_REG MIPI0D_CLK_P MIPI0D_CLK_N MIPI0D_DATA_P<0> MIPI0D_DATA_N<0> MIPI0D_DATA_N<1> MIPI0D_DATA_P<1> =PPLED_REG MIPI_DATA_CONN_N<1> MIPI_DATA_CONN_P<1> MIPI_DATA_CONN_N<0> MIPI_DATA_CONN_P<0> WLED_STRING5 VOLTAGE=4.5V MIN_LINE_WIDTH=0.30 MM PPVCC_MAIN_LCD_SW_CONN MIN_NECK_WIDTH=0.20 MM MIPI0D_DATA_N<2> MIPI0D_DATA_P<2> MIPI_DATA_CONN_P<2> MIPI_DATA_CONN_N<2> MIPI0D_DATA_P<3> MIPI0D_DATA_N<3> MIPI_CLK_CONN_N MIPI_CLK_CONN_P WLED_STRING2 WLED_STRING3 WLED_STRING4 GPIO_MLC_RST_L MIPI_DATA_CONN_P<3> MIPI_DATA_CONN_N<3> 051-9374 13.0.0 22 OF 102 16 OF 46 21 2 1 2 1 2 1 2 1 2 1 2 1 21 2 1 4 3 2 1 4 3 2 1 2 1 1 2 2 1 2 1 4 3 2 1 4 3 2 1 2 1 1 2 9 11 13 15 17 3 7 14 16 18 12 10 8 4 6 2 31 29 19 21 23 25 27 32 30 26 28 24 22 20 5 1 3334 3536 4 3 2 1 81 3 52 7 39 39 45 45 45 45 45 45 4 45 45
BI IN IN OUT IN BI IN IN1 IN2 IN4 IN3 OUT1 OUT2 OUT3 OUT4 GND IN1 IN2 IN4 IN3 OUT1 OUT2 OUT3 OUT4 GND SYM_VER-2 SYM_VER-2 OUT OUT OUT OUT Apple Inc. THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. 124578 B D 8 7 6 5 4 3 C B A NOTICE OF PROPRIETARY PROPERTY: PAGE 12 D A C PAGE TITLE SHEET IV ALL RIGHTS RESERVED R D SIZEDRAWING NUMBER REVISION BRANCH 6 3 THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT VGA FRONT CAMERA CONNECTOR 516S0876 RCPT MLB 516S0869 PLUG FLEX ISP1_CAM_FRONT_SHUTDOWN LOW = ENABLES CAMERA TO TURN ON HIGH = DISABLES / TURNS OFF CAMERA F-ST-SM 503548-1820 CRITICAL J2601 SM XW2600 41844 41844 6 4 644 644 644 120-OHM-210MA L2660 01005 U2600 1208 400MHZ-0.1A-27PF U2601 1208 400MHZ-0.1A-27PF 100K 1% 01005 1/32W MF R2601 10% 01005 1000PF 6.3V X5R-CERM C2602 20% X5R 1UF 6.3V 0201 C2601 NP0-C0G 16V 27PF 5% 01005 C2600 L2600 0201 240OHM-350MA 1000PF 01005 10% 6.3V X5R-CERM C2605 0201 20% 6.3V 1UF X5R C2604 01005 27PF 16V NP0-C0G C2603 5% L2601 0201 240OHM-350MA 6.3V 10% 1000PF 01005 X5R-CERM C2608 1UF 0201 20% 6.3V X5R C2607 NP0-C0G 16V 27PF 5% 01005 C2606 L2602 0201 240-OHM-0.2A-0.8-OHM 90-OHM-50MA TCM0605-1 L2610 90-OHM-50MA TCM0605-1 L2611 6 45 6 45 6 45 6 45 FF CAM & MIC CONNECTORS SYNC_MASTER=N/A SYNC_DATE=N/A MIN_NECK_WIDTH=0.15 MM GND_AVDD_CAM_FRONT VOLTAGE=0V MIN_LINE_WIDTH=0.15 MM NET_SPACING_TYPE=GND VOLTAGE=1.8V MAX_NECK_LENGTH=3 MM NET_SPACING_TYPE=PWR MIN_NECK_WIDTH=0.2 mm MIN_LINE_WIDTH=0.6 mm PP1V8_CAM_FRONT_FILT =PP2V8_CAM_FRONT MIPI1C_CAM_FRONT_CLK_FILT_P I2C2_SCL_F ISP1_CAM_FRONT_SCL_F MIPI1C_CAM_FRONT_CLK_FILT_N MIPI1C_CAM_FRONT_DATA_FILT_N<0> MIPI1C_CAM_FRONT_DATA_FILT_P<0> GPIO_ALS_IRQ_L_F I2C2_SDA_F ISP1_CAM_FRONT_CLK_F_R ISP1_CAM_FRONT_SHUTDOWN_F ISP1_CAM_FRONT_SDA_F PP2V8_CAM_FRONT_FILT GND_AVDD_CAM_FRONT PP1V8_CAM_FRONT_FILT PP3V0_ALS_FILT MAX_NECK_LENGTH=3 MM PP2V8_CAM_FRONT_FILT VOLTAGE=2.8V MIN_LINE_WIDTH=0.6 mm MIN_NECK_WIDTH=0.2 mm NET_SPACING_TYPE=PWR =PP1V8_CAM_FRONT ISP1_CAM_FRONT_SHUTDOWN_F =PP3V0_ALS MIPI1C_CAM_FRONT_DATA_FILT_P<0> MIPI1C_CAM_FRONT_CLK_FILT_N MIPI1C_CAM_FRONT_CLK_FILT_P MIPI1C_CAM_FRONT_CLK_P MIPI1C_CAM_FRONT_CLK_N MIPI1C_CAM_FRONT_DATA_P<0> MIPI1C_CAM_FRONT_DATA_N<0> MIN_LINE_WIDTH=0.6 mm MIN_NECK_WIDTH=0.2 mm NET_SPACING_TYPE=PWR MAX_NECK_LENGTH=3 MM PP3V0_ALS_FILT VOLTAGE=3.0V ISP1_CAM_FRONT_CLK_F_R ISP1_CAM_FRONT_CLK_F MIPI1C_CAM_FRONT_DATA_FILT_N<0> ISP1_CAM_FRONT_SHUTDOWN_F GPIO_ALS_IRQ_L_F I2C2_SCL_F NC_U2601_5 GPIO_ALS_IRQ_L ISP1_CAM_FRONT_SHUTDOWN I2C2_SCL NC_U2601_1 ISP1_CAM_FRONT_CLK_F I2C2_SDA_F ISP1_CAM_FRONT_SCL_F ISP1_CAM_FRONT_SDA_F I2C2_SDA ISP1_CAM_FRONT_CLK ISP1_CAM_FRONT_SCL ISP1_CAM_FRONT_SDA 051-9374 13.0.0 26 OF 102 17 OF 46 6 21 17 15 13 11 9 7 5 3 12 4 8 10 12 14 16 18 1920 22 1 2 21 1 2 2 1 2 1 2 1 21 2 1 2 1 2 1 21 2 1 2 1 2 1 21 4 32 1 4 32 1 17 17 39 1745 1744 17 44 1745 1745 1745 17 17 44 17 17 17 44 17 17 17 17 17 39 17 39 1745 1745 1745 17 17 17 44 1745 17 17 17 44 17 44 17 44 17 44 17 44
BI RES/VDD VDD RES0 RES1 RES2 RES3 DRDY/ VDD_IO SCL/SPC SDA/SDI/SDO SDO/SA0 CS GND INT1 DEN RES/GND INT2 IN DRDY SCL/SK SDA/SI VDD RSVSO VSS TST1 TRG VID CAD0 CAD1 RST* CSB* INT2 GND VDDVDD_IO NC RESCS SDA/SDI/SDO SCL/SPC RES SEL/SDO INT1/DRDY IN BI OUT OUTBI IN OUT OUT NC NC IN Apple Inc. THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. 124578 B D 8 7 6 5 4 3 C B A NOTICE OF PROPRIETARY PROPERTY: PAGE 12 D A C PAGE TITLE SHEET IV ALL RIGHTS RESERVED R D SIZEDRAWING NUMBER REVISION BRANCH 6 3 THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT ACCELEROMETER 12-BIT PART WRITE: 0X18 READ: 0X19 COMPASS DATASHEET SAYS TO CONNECT PIN 15 TO VDD PIN 10 TO GND GYRO (WRITE: 0XD4 READ: 0XD5) CS* TIES TO VID FOR I2C MODE (WRITE: 0X3A READ: 0X3B) 4171844 CRITICAL U2720 LGA AP3GDL20BCTR C2726 10% 0.01UF 0201 X5R-CERM 25V C2725 X5R 10% 201 6.3V 0.1UF 20 L2702 0201 240-OHM-0.2A-0.8-OHM CRITICAL U2710 AK8963C CSP CRITICAL U2700 LGA AP3DSHAD 41944 41944 C2711 01005 20% 0.1UF 6.3V X5R-CERM C2710 10V X5R-CERM 1.0UF 20% 0201-1 L2701 240-OHM-0.2A-0.8-OHM 0201 C2721 0.1UF 6.3V X5R 10% 201 R2724 01005 1/32W MF 10K 1% 4 4 L2700 0201 240-OHM-0.2A-0.8-OHM C2700 CERM-X5R 6.3V 20% 10UF 0402-2 4171844 4171844 C2702 X5R 0.1UF 10% 201 6.3V C2701 0.1UF 6.3V 10% X5R 201 4 4 C2723 6.3V CERM-X5R 10UF 20% 0402-2 XW2700 SM 4171844 INERTIAL SENSORS SYNC_MASTER=N/A SYNC_DATE=N/A =PP1V8_COMPASS CAM_REAR_VSYNC =PP1V8_GYRO GPIO_GYRO_IRQ1 =PP3V0_SENSOR_GYRO I2C2_SCL I2C2_SDA =PP1V8_ACCEL PP3V0_SENSOR_ACCEL_FILT VOLTAGE=3.0V MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.2MM MAX_NECK_LENGTH=3MM NET_SPACING_TYPE=PWR GPIO_ACCEL_IRQ2_L GPIO_ACCEL_IRQ1_L GPIO_GYRO_IRQ2 NET_SPACING_TYPE=PWR MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.2MM MAX_NECK_LENGTH=3MM PP3V0_SENSOR_GYRO_FILT VOLTAGE=3.0V GYRO_PUMP I2C2_SCL I2C2_SDA =PP3V0_SENSOR_ACCEL PP3V0_SENSOR_COMPASS_FILT VOLTAGE=3.0V MIN_NECK_WIDTH=0.2MM MIN_LINE_WIDTH=0.5MM MAX_NECK_LENGTH=3MM NET_SPACING_TYPE=PWR AGND_COMPASS =PP3V0_SENSOR_COMPASS I2C1_SCL I2C1_SDA GYRO_CS AGND_COMPASS NC_U2710_DRDY NC_U2710_SO NC_U2710_TST1 NC_U2710_RSV NC_U2710_TRG 051-9374 13.0.0 27 OF 102 18 OF 46 1516 9 10 11 12 6 1 2 3 4 5 13 7 8 14 2 1 2 1 2 1 A1 A3 A4 B1 B3B4 C1 C2 C3 C4 D1 D2 D4 A2 9 5 14 1 2 3 108 6 4 15 12 13 16 7 11 2 1 2 1 2 1 2 1 1 2 2 1 2 1 2 1 2 1 2 1 12 39 39 39 39 39 18 39 18
ADD0 SCLK CIN1 CIN3 CIN4 CIN12 CIN11 CIN6 CIN9 CIN8 CIN10 CIN2 CIN5 CIN0 ACSHIELD GND BIAS SDA VDRIVEVCC ADD1 INT* GPIO CIN7 TPNC NC NC NC NC NC NC NC NC NC BI IN OUT Apple Inc. THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. 124578 B D 8 7 6 5 4 3 C B A NOTICE OF PROPRIETARY PROPERTY: PAGE 12 D A C PAGE TITLE SHEET IV ALL RIGHTS RESERVED R D SIZEDRAWING NUMBER REVISION BRANCH 6 3 THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT I2C ADDRESS: 0101100+R/W PCB: ACSHIELD NEEDS TO BE A PLANE UNDER PROX_CIN NETS AND ALSO TIE TO CONNECTOR. CIN7 DUMMY CIN9 SENSOR ELECTRODE VDRIVE FOR: I2C AND GPIO INT* IS OPEN DRAIN PU RAIL MATCH VDRIVE U3200, NO GND PLANE NEAR PROX_CIN NETS.. JUST IN CASE NEED EXTERNAL REF CAP TO MEASURE 0.5 PF 1.8 MA MAX INT IS 1.8V LEVEL. PROX GPIO WILL NOT BE USED. THEREFORE,PROX GPIO IS NOT CONNECTED TO MLB INTERCONNECT. 353S2964 READ: 0X59, WRITE: 0X58 VDRIVERAIL PCB: ENSURE ACSHIELD PLANE UNDER PROX SENSOR CHOSE CIN NUMBERS FOR LAYOUT EASE 516S0872 C2804 6.3V 0.1UF X5R-CERM 20% 01005 P106_P107 C2805 68PF 5% 6.3V NP0-C0G 01005 P106_P107 R2800 MF 2.0K 1/32W 1% 01005 P106_P107 R2801 MF 100K 1% 1/32W 01005 P106_P107 C2802 0.01UF X5R 10% 10V 201 P106_P107 C2800 X5R 402 10% P106_P107 6.3V 2.2UF C2803 +/-0.05PF 201 CERM 25V 0.5PF P106_P107 C2801 0.1UF 6.3V X5R-CERM 20% 01005 P106_P107 C2806 5% 68PF 6.3V NP0-C0G 01005 P106_P107 C2807 NP0-C0G 201 25V 27PF P106_P107 1% U2800 WLCSP AD7149 CRITICAL P106_P107 L2801 68NH-2%-320MA-1.0OHM 0402 CRITICAL P106_P107 L2807 68NH-2%-320MA-1.0OHM 0402 CRITICAL P106_P107 L2808 0603 390NH-2%-170MA-4.0OHM CRITICAL P106_P107 L2802 390NH-2%-170MA-4.0OHM 0603 CRITICAL P106_P107 L2803 68NH-2%-320MA-1.0OHM 0402 CRITICAL P106_P107 L2804 0603 CRITICAL P106_P107 390NH-2%-170MA-4.0OHM 41844 L2800 240-OHM-0.2A-0.8-OHM 0201 41844 J2800 503548-0620 CRITICAL P106_P107 F-ST-SM 4 SYNC_DATE=N/ASYNC_MASTER=N/A PROX SENSOR NC_J2800_6 NC_J2800_2 NC_J2800_4 PROX_CIN9_CONN PROX_ACSHIELD_CONN =PP1V8_PROX MAX_NECK_LENGTH=3MM MIN_NECK_WIDTH=0.2MM MIN_LINE_WIDTH=0.6MM NET_SPACING_TYPE=PWR PP3V0_SENSOR_PROX_FILT VOLTAGE=3.0V I2C1_SCL PROX_GPIO PROX_CIN9 CIN9 ACSH_SB =PP1V8_PROX ACSHIELD_SB PROX_CIN1 TP_PROX_CIN2 PROX_CIN7 CIN7 GPIO_PROX_IRQ_L =PP3V0_SENSOR_PROX I2C1_SDA PROX_BIAS PROX_CIN7_CONN 051-9374 13.0.0 28 OF 102 19 OF 46 2 1 2 1 1 2 1 2 2 1 2 1 2 1 2 1 2 1 2 1 D1 C1 A3 A4 C3 E5 D5 B4 C5 C4 D4 B3 A5 D3 E4 E2 E3 E1 C2 D2 B1 A1 A2 B5 B2 2 1 2 12 1 2 1 2 12 1 2 1 8 21 109 3 4 5 6 7 1939 1939 39
IN BI IN IN SYM_VER-2 SYM_VER-2 SYM_VER-2 OUT OUT OUT OUT OUT OUT Apple Inc. THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. 124578 B D 8 7 6 5 4 3 C B A NOTICE OF PROPRIETARY PROPERTY: PAGE 12 D A C PAGE TITLE SHEET IV ALL RIGHTS RESERVED R D SIZEDRAWING NUMBER REVISION BRANCH 6 3 THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT APN: 516S0973 518S0692 BUTTON CONNECTOR REAR CAMERA CONNECTOR PLUG: 516S0974 1.00K 1/32W 1% MF 01005 R2900 1.00K 1% 1/32W MF 01005 R2901 1.00K 1/32W 1% MF 01005 R2902 1.00K 1% MF 1/32W 01005 R2903 FF18-6A-R11AD-B-3H F-RT-SM J2960 CRITICAL X5R-CERM 10% 01005 6.3V 1000PF C2902 X5R 10V 10% 1UF 402 C2901 01005 5% 27PF 16V NP0-C0G C2900 L2900 0201 240OHM-350MA 18 644 C2905 01005 1000PF 10% X5R-CERM 6.3V X5R 10V 1UF 402 10% C2904 16V NP0-C0G 27PF 5% 01005 C2903 L2901 0201 240OHM-350MA 1000PF 6.3V X5R-CERM 01005 10% C2908 10% 402 1UF 10V X5R C2907C2906 01005 5% 27PF 16V NP0-C0G L2902 0201 240OHM-350MA 01005 1000PF 10% 6.3V X5R-CERM C2911C2910 X5R 10% 1UF 402 10V NP0-C0G 16V 27PF 5% 01005 C2909 L2903 0201 240OHM-350MA 644 201-1 12.8V-100PF DZ2960 201-1 12.8V-100PF DZ2961 12.8V-100PF 201-1 DZ2962 201-1 12.8V-100PF DZ2963 NP0-C0G 16V 27PF 5% 01005 C2970 01005 5% 27PF 16V NP0-C0G C2971 16V 27PF 5% 01005 NP0-C0G C2972 01005 5% 27PF 16V NP0-C0G C2973 F-ST-SM AA07-S022VA1 J2950 CRITICAL 6 44 5% 82PF CERM 0201 25V C2963 90-OHM-50MA TCM0605-1 L2910 L2911 90-OHM-50MA TCM0605-1 90-OHM-50MA TCM0605-1 L2912 6 45 6 45 6 45 6 45 6 45 6 45 SM XW2950 SM XW2951 0201 240-OHM-0.2A-0.8-OHM L2963 01005 120-OHM-210MA L2950 CERM 0201 25V 5% 82PF C2962 240-OHM-0.2A-0.8-OHM 0201 L2962 5% CERM 0201 25V 82PF C2961 0201 240-OHM-0.2A-0.8-OHM L2961 5% 82PF 25V 0201 CERM C2960 0201 240-OHM-0.2A-0.8-OHM L2960 1% 100K MF 1/32W 01005 R2950 BUTTON & REAR CAMERA CONN SYNC_DATE=N/ASYNC_MASTER=N/A MIPI0C_CAM_REAR_CLK_FILT_P ISP0_CAM_REAR_CLKISP0_CAM_REAR_CLK_FILT MIN_NECK_WIDTH=0.2 mm NET_SPACING_TYPE=PWR VOLTAGE=1.8V PP1V8_CAM_REAR_FILT MIN_LINE_WIDTH=0.6 mm MAX_NECK_LENGTH=3 MM MAX_NECK_LENGTH=5 MM NET_SPACING_TYPE=GND MIN_NECK_WIDTH=0.1 MM VOLTAGE=0V MIN_LINE_WIDTH=0.6 mm GND_AF_AVDD GPIO_BTN_POWER_R_L GPIO_BTN_VOL_UP_R_L MIPI0C_CAM_REAR_DATA_P<0> MIPI0C_CAM_REAR_DATA_N<0> MIPI0C_CAM_REAR_DATA_P<1> MIPI0C_CAM_REAR_DATA_N<1> MIPI0C_CAM_REAR_CLK_P MIPI0C_CAM_REAR_CLK_N GPIO_BTN_POWER_L_FILT GPIO_BTN_SRL_L_FILT GPIO_BTN_VOL_UP_L_FILT GPIO_BTN_VOL_DOWN_L_FILTGPIO_BTN_VOL_DOWN_R_LGPIO_BTN_VOL_DOWN_L GPIO_BTN_POWER_L GPIO_BTN_SRL_L GPIO_BTN_VOL_UP_L =PP1V8_CAM_REAR =PP2V8_CAM_REAR =PP2V8_CAM_REAR_AF =PP1V8_CAM_REAR ISP0_CAM_REAR_SCL ISP0_CAM_REAR_SDA ISP0_CAM_REAR_SHUTDOWN CAM_REAR_VSYNC PP2V8_CAM_REAR_AF_FILT VOLTAGE=2.8V MIN_LINE_WIDTH=0.6 mm MIN_NECK_WIDTH=0.2 mm NET_SPACING_TYPE=PWR MAX_NECK_LENGTH=3 MM MIPI0C_CAM_REAR_DATA_FILT_P<0> MIPI0C_CAM_REAR_DATA_FILT_N<0> MIPI0C_CAM_REAR_CLK_FILT_N MIPI0C_CAM_REAR_DATA_FILT_P<1> MIPI0C_CAM_REAR_DATA_FILT_N<1> PP2V8_CAM_REAR_FILT MIN_LINE_WIDTH=0.6 mm NET_SPACING_TYPE=PWR MIN_NECK_WIDTH=0.2 mm MAX_NECK_LENGTH=3 MM VOLTAGE=2.8V MAX_NECK_LENGTH=3 MM NET_SPACING_TYPE=PWR MIN_LINE_WIDTH=0.6 mm MIN_NECK_WIDTH=0.2 mm VOLTAGE=1.2V PP1V2_CAM_REAR_FILT=PP1V2_CAM_REAR MAX_NECK_LENGTH=5 MM NET_SPACING_TYPE=GND MIN_NECK_WIDTH=0.1 MM VOLTAGE=0V MIN_LINE_WIDTH=0.6 mm GND_CAM_AVDD GPIO_BTN_SRL_R_L 051-9374 13.0.0 29 OF 102 20 OF 46 1 2 1 2 1 2 1 2 6 5 4 3 2 1 2 1 2 1 2 1 21 2 1 2 1 2 1 21 2 1 2 1 2 1 21 2 1 2 1 2 1 21 1 2 1 2 1 2 1 2 2 1 2 1 2 1 2 1 25 26 24 23 22 20 18 16 10 14 12 8 6 4 2 21 19 17 15 7 9 11 13 5 3 1 2 1 4 32 1 4 32 1 4 32 1 1 2 1 2 21 21 2 1 21 2 1 21 2 1 21 1 2 45 4 442 442 4 93 02 39 39 93 02 6 45 45 45 45 45 39
OUT OUT OUT OUT OUT IN OUT OUT BI IN BI PP PP OUT OUT IN IN IN IN IN OUT OUT OUT OUT OUT IN BI IN OUT IN IN IN PP PP OUT PP PP PP GND PP IN IN OUT OUT OUT OUT PP PP PP PP CLK RST VCC SWP GND DETECT I/O OUT IN REFERENCE DESIGNATOR(S) BOM OPTION TABLE_5_HEAD QTY DESCRIPTIONPART# TABLE_5_ITEM Apple Inc. THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. 124578 B D 8 7 6 5 4 3 C B A NOTICE OF PROPRIETARY PROPERTY: PAGE 12 D A C PAGE TITLE SHEET IV ALL RIGHTS RESERVED R D SIZEDRAWING NUMBER REVISION BRANCH 6 3 THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT PARTS TABLE FOR P105 SIM CARD, WHILE PINOUT IS BEING FIXED BB NOR SPI SIM CARD CONNECTOR 0X02BOOT_HSIC_OPTION AP INTERFACE & DEBUG CONNECTOR CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST. BOOT_CONFIG 0 0X01 SW REGISTER DZ101 X CXXX XW206 3 01456 0 52 55 X 5453 00 50 0 4948 0 0 1 0 0 0 0 0 1 X X X X 0 1 X 1 10 0 0 0 1 0 0 0 0 0 0 0 1 1 1 47 X0X00 X X X X 0X08 0X03 R104 XW C R U DZ U101 VALUE BOOT OPTIONS AP CONNECTIONS GPIO54/BOOT_CONFIG_0 BT UART 2 51 GPIO/BOOT_CONFIG CONFIGURATION NC GPIO51/BOOT_CONFIG_3 GPIO53/BOOT_CONFIG_1 GPIO48/BOOT_CONFIG_6 ENABLE SAHARA PROTOCOL BOOT_USB_OPTION BOOT_NAND_OPTION BOOT_DEFAULT_OPTION NC HSIC_BB_DATA HSIC_BB_STROBE DEBUG CONNECTOR 24 2123 2124 42444 42444 42444 42444 42444 2124 25 2124 PP31013_RF NOSTUFF SM P4MM PP31014_RF P4MM SM NOSTUFF 24 R31004_RF 1% MF 01005 1/32W 15.00K CELL 2325 21 25 21 37 21 25 21 25 21 25 2125 212532 21 25 21 2123 J31010_RF AXE654124 NOSTUFF M-ST-SM 23 24 21 25 21 25 21 25 21 22 24 25 28 21 22 24 21 25 PP31003_RF NOSTUFF P4MM SM PP31004_RF P4MM SM NOSTUFF 21 25 32 PP31005_RF SM P4MM NOSTUFF J31002_RF F-ST-SM NOSTUFF MM4829-2702 J31003_RF F-ST-SM MM4829-2702 NOSTUFF PP31001_RF SM P4MM NOSTUFF PP31006_RF P4MM NOSTUFF SM DZ31001_RF CELL TPD4E101DPW SON4 DZ31002_RF 12V-33PF 01005 CELL PP31007_RF SM P4MM NOSTUFF 2125 2125 2125 2125 21 37 21 23 24 PP31015_RF NOSTUFF P4MM SM PP31016_RF SM P4MM NOSTUFF PP31017_RF SM P4MM NOSTUFF PP31018_RF SM P4MM NOSTUFF R31101_RF 10K CELL 1/32W MF 01005 1% R31102_RF CELL MF 01005 1% 1/32W 10K R31103_RF CELL 10K 1/32W 01005 MF 1% R31104_RF 1/32W CELL 01005 10K 1% MF R31005_RF 0.00 MF NOSTUFF 1/32W 0% 01005 OMIT J31001_RF F-ST-SM SIM-CARD-N41 21 37 21 22 23 29 30 31 33 34 SYSTEM & DEBUG CONNECTORS CELLJ31001_RFP105 SIM TRAY1512S0088 I2S3_BT_BCLK PP_LDO14_2P65 LAT_SW1_CTL PP_LDO6_RUIM_1V8 SIMCRD_IO_CONN SIM_SWP SIM_DETECT SIMCRD_RST_CONN UART1_BT_CTS_L PP_BATT_VCC_CONN PMIC_RESOUT_L DEBUG_RST_L RESET_PMU_L RADIO_ON_L BB_UART_TXD BB_UART_RTS_L 50_HSIC_BB_DATA UART1_BT_RTS_L BT_PCM_SYNC WLAN_UART_TXD PMU_CLK_32K_WLAN HSIC1_BB_DATA UART1_BT_RXD PMU_GPIO_WLAN_REG_ON WLAN_REG_ON SIMCRD_RST_CONN BT_UART_RXD PP_LDO6_RUIM_1V8 SIM_DETECT GPIO_BB_HSIC_DEV_RDY GPIO_51 ANT_SEL_1 UART4_BB_RTS_L LAT_SW1_CTL PBL_RUN_BB_HSIC1_RDY BB_RST_L SIMCRD_IO_CONN BB_WAKE_HOST BT_REG_ON AP_HSIC1_RDY BB_UART_CTS_L UART3_WLAN_TXD PP_WL_BT_VDDIO_AP PMU_GPIO_WLAN_HOST_WAKE GPIO_WLAN_HSIC_DEV_RDY GPIO_WLAN_HSIC_HOST_RDY HSIC2_WLAN_STB PMU_GPIO_BT_HOST_WAKE BB_UART_RXD PS_HOLD BB_UART_CTS_L GPIO_DEBUG_LED BB_JTAG_TDO BB_JTAG_TMS BB_JTAG_TCK RF_RESET_L 90_BB_USB_D_N BB_USB_VBUS BB_JTAG_TRST_L BB_JTAG_RTCLK ANT_SEL_2 90_BB_USB_D_P BB_USB_VBUS UART4_BB_RXD GPIO_BB_GSM_TXBURST =PPBATT_VCC_RF GPIO_WLAN_HSIC_RESUME BT_WAKE BB_HSIC1_REMOTE_WAKE HSIC2_WLAN_DATA UART3_WLAN_RXD GPIO_BT_WAKE 50_HSIC_WLAN_STROBE BT_PCM_CLK BT_REG_ON BT_UART_TXD RESET_PMU_L AP_HSIC1_RDY SIMCRD_CLK_CONN BT_WAKE PP_SMPS3_MSME_1V8 RESET_DET_L BB_JTAG_TDI GPIO_BB_RADIO_ON_L GPIO_BB_RST_DET_L GPIO_BB_RST_L RESET_DET_L BB_RST_L TX_GTR_THRESH PMU_GPIO_BB_WAKE AP_WAKE_MODEM PBL_RUN_BB_HSIC1_RDY RST_SYSTEM_L GPIO_BB_IPC_GPIO RADIO_ON_L 90_BB_USB_D_P UART4_BB_TXD PP_LDO6_RUIM_1V8 SIMCRD_RST_CONN SIMCRD_IO_CONN SIM_DETECT PMU_GPIO_BB_RST_L GPIO_BB_DIAGS_RDY PMIC_SSBI SIMCRD_CLK_CONN BB_UART_TXD BB_UART_RXD PBL_RUN_BB_HSIC1_RDY AP_HSIC1_RDY 90_BB_USB_D_N 50_HSIC_BB_STROBE BT_UART_TXD 50_HSIC_BB_STROBE 50_HSIC_BB_DATA BB_ERROR_FLAG RADIO_ON_L RF_RESET_L DEV_HSIC3_RDY AP_HSIC3_RDY BB_WAKE_HOST BB_UART_RTS_L WLAN_UART_RXD WLAN_HOST_WAKE WLAN_HSIC3_RESUME ANT_PORTB_3 BT_UART_RXD PP_WLAN_MAIN_VCC USB_BB_D_N BB_VBUS_DET PP_BATT_VCC_CONN ANT_PORTB_1 I2S3_BT_DOUT I2S3_BT_DIN I2S3_BT_LRCK SPI_DATA_MOSI SPI_DATA_MISO SPI_CS_L SPI_CLK SIMCRD_CLK_CONN SLEEP_CLK_32K GPIO_BB_GPS_SYNC ANT_PORTB_1 ANT_PORTB_2 UART1_BT_TXD BT_UART_RTS_L UART4_BB_CTS_L USB_BB_D_P PP_SYNC CLK32K_AP WLAN_REG_ON BT_PCM_IN ANT_PORTB_3 HSIC1_BB_STB 50_HSIC_WLAN_DATA LAT_SW1_CTL ANT_SEL_2 ANT_SEL_1 GPIO_51 PP_SMPS3_MSME_1V8 GPIO_BB_HSIC_HOST_RDY =PPBATT_VCC_WL =PP1V8_S2R_WL BT_HOST_WAKE BT_PCM_OUT PMU_GPIO_BT_REG_ON BT_UART_CTS_L ANT_PORTB_2 ANT_PORTA_1 PP_LDO14_2P65 051-9374 13.0.0 31 OF 102 21 OF 46 1 1 1 2 50 42 44 46 48 32 34 36 38 40 26 22 24 28 30 16 14 12 18 20 2 10 8 6 4 49 47 45 43 41 33 31 29 27 25 23 21 35 37 39 7 5 3 1 19 17 15 9 11 13 52 54 51 53 55 58 57 56 1 1 1 4 2 3 1 4 2 3 1 1 1 5 32 41 1 2 1 1 1 1 1 1 2 1 2 1 2 1 2 1 2 3 2 1 6 8 9 10 11 13 5 12 7 4 44 132122273235 2125 212224 21 25 21 25 2125 4 44 2124 4 44 37 37 42 44 3 44 4 44 42 21 37 4 4 442125 4 44 37 42 4 4 3 44 42 2124 4 10 44 4 39 4 2137 25 3 44 4 44 4 37 37 2137 2137 2123 2125 4 4 4 2125 212324 25 42 25 2125 3 10 42 4 2123 2124 4 10 44 21 22 24 2125 2125 21 25 42 4 23 24 21 25 2125 2125 21 25 21 25 2124 2124 21 37 21 24 21 24 25 21 23 21 37 37 2125 2125 37 37 37 13 21 25 2137 37 10 44 42 2122232930313334 13 21 25 4 44 4 44 4 44 25 25 25 25 2125 23 24 4 132125 132125 4 44 37 4 44 10 44 25 37 2137 37 132125 3 44 37 2125 212532 212532 2125 2122242528 4 39 39 37 37 42 37 13 21 25 13 21 22 27 32 35
OUT OUT OUT OUT IN IN IN OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT IN OUT OUT VDD_S4 VSW_S5 VSW_S3 VSW_S2 VREG_XO VREG_S5 VREG_S4 VREG_RFCLK VREG_L9 VREG_L8 VREG_L7 VREG_L6 VREG_L5 VREG_L4 VREG_L3 VREG_L2 VREG_L14 VREG_L13 VREG_L12 VREG_L11 VREG_L10 VOUT_LVS1 VDD_XO VDD_S5 VDD_S2 VDD_S1 VDD_L9 VDD_L8 VDD_L7 VDD_L5_L6_L13_L14 VDD_L4 VDD_L2_L3 VDD_L12 VDD_L10_L11 REF_GND REF_BYP VSW_S5_2 VREG_S3 VSW_S4 VDD_S3 VSW_S1 VREG_S1 VREG_S2 VREG (SYM 5 OF 5) Apple Inc. THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. 124578 B D 8 7 6 5 4 3 C B A NOTICE OF PROPRIETARY PROPERTY: PAGE 12 D A C PAGE TITLE SHEET IV ALL RIGHTS RESERVED R D SIZEDRAWING NUMBER REVISION BRANCH 6 3 THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT R L L211 CREATE A PLANE CREATE A PLANE CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST. R207 U C U201 C237 BASEBAND PMU (1 OF 2) 24 28 21 22 24 25 28 22 28 22 2228 21 23 29 30 31 33 34 2122242528 01005 20% X5R 0.1UF 4V CELL C32006_RF 22UF 20% 603 6.3V CELL X5R-CERM-1 C32009_RF CELL X5R-CERM-1 6.3V C32010_RF 603 20% 22UF NOSTUFF SHORT-10L-0.25MM-SM XW32009_RF 22UF 20% X5R-CERM-1 603 6.3V CELL C32008_RF 20% 6.3V CELL 603 X5R-CERM-1 22UF C32007_RF NOSTUFF SHORT-10L-0.25MM-SM XW32007_RF 24 24 25 13 21 27 32 35 24 21 24 36 23 24 24 28 24 24 XW32011_RF SHORT-10L-0.25MM-SM NOSTUFF 24 24 24 22 6.3V 1.0UF 0201-MUR CELL X5R 20% C32014_RF 20% 6.3V X5R CELL 0201-MUR 1.0UF C32012_RF 1.0UF 20% 0201-MUR 6.3V X5R CELL C32013_RF 20%1.0UF X5R 6.3V 0201-MUR CELL C32015_RF 0201-MUR 20% 1.0UF CELL X5R 6.3V C32016_RF 1.0UF 20% 6.3V X5R 0201-MUR CELL C32017_RF 20% X5R 6.3V 1.0UF CELL 0201-MUR C32018_RF X5R 1.0UF 20% 6.3V 0201-MUR CELL C32019_RF 6.3V 10UF CELL 20% 0402-1 CERM-X5R C32020_RF 10UF 20% 6.3V 0402-1 CELL CERM-X5R C32021_RF CERM-X5R 6.3V 20% CELL 10UF 0402-1 C32022_RF 10UF 6.3V 20% CERM-X5R 0402-1 CELL C32029_RF 6.3V 20% 0402-1 CERM-X5R 10UF CELL C32030_RF 24 24 20% X5R 1.0UF 6.3V CELL 0201-MUR C32031_RF BGA PM8018 CELL U32001_RF CELL 2.2UH-20%-1.2A-0.15OHM 0806 L32007_RF 2.2UH-20%-1.2A-0.15OHM 0806 CELL L32008_RF 2.2UH-20%-1.2A-0.15OHM 0806 CELL L32009_RF 2.2UH-20%-1.2A-0.15OHM L32010_RF CELL 0806 22UF 20% C32011_RF X5R-CERM-1 603 6.3V CELL 1.0UF X5R 20% 6.3V 0201-MUR CELL C32034_RF 0402 4.7UF 20% 10V X5R-CERM CELL C32026_RF 20% 10V X5R-CERM 4.7UF 0402 CELL C32001_RF 20% X5R-CERM 10V CELL 4.7UF 0402 C32002_RF 4.7UF 20% CELL 0402 10V X5R-CERM C32003_RF 4.7UF 20% 10V 0402 X5R-CERM CELL C32004_RF CERM-X5R 20% 0402-1 6.3V 10UF CELL C32035_RF CERM-X5R 20% 0402-1 10UF CELL 6.3V C32037_RF CERM-X5R CELL 20% 10UF 6.3V 0402-1 C32036_RF NOSTUFF 6.3V X5R-CERM 0.1UF 20% 01005 C32023_RF CELL 6.3V 20% 0402-1 CERM-X5R 10UF C32033_RF 6.3V 20% CERM-X5R 0402-1 CELL 10UF C32040_RF L32011_RF 2.2UH-20%-2.3A-0.115OHM CELL TFA252010-SM BASEBAND PMU (1 0F 2) PP_SMPS4_RF2_2V0PP_VSW_S4 PP_SMPS3_MSME_1V8 PP_SMPS5_DSP_1V05 PP_VSW_S3 PP_VSW_S5 S3_GND PP_LDO9_PLL_1V05 PP_LDO5_GPS_LNA_2V5 PP_LDO1 PP_LDO12_MDSP_SW_1V05 PP_LDO11_MDSP_FW_1V05 PP_LDO10_ADSP_1V05 PP_LDO8_VDDPX_1V2 PP_LDO7_DAC_1V8 PP_LDO4_VDDA_3V3 REF_BYP_8014_F2 S2_GNDS5_GND S1_GNDS4_GND PP_VREG S3_GND S5_GND PP_LDO3_AMUX_1V8 PP_LDO2_XO_HS_1V8 PP_SMPS5_DSP_1V05 PP_SMPS3_MSME_1V8 PP_SMPS4_RF2_2V0 S1_GND PP_VSW_S1 PP_SMPS1_MSMC_1V05 PP_VSW_S2 PP_LVS1 PP_LDO6_RUIM_1V8 PP_LDO13_VDDPX_2V95 PP_LDO14_2P65 PP_BATT_VCC_CONN PP_SMPS2_RF1_1V3 051-9374 13.0.0 32 OF 102 22 OF 46 2 1 2 1 2 1 21 2 1 2 1 21 21 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 98 24 88 82 87 48 42 90 20 76 105 13 77 54 63 17 11 84 32 31 29 23 43 55 65 53 8 101 89 95 104 70 58 75 5 78 44 64 59 34 28 100 12 81 18 6 92 97 79 83 102 21 21 21 21 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 21 2223 23 2223 2223 23 2223 2223 2223
OUT OPT_1 PM_RESIN_N KPD_PWR* BAT_ID LED_DRV_N OPT_2 PM_MDM_INT_N PM_USR_INT_N PON_RESET* PON_TRIG SSBI PS_HOLD (SYM 1 OF 5) CONTROL GND0 XTAL_32K_OUT XTAL_32K_IN XTAL_19M_OUT XTAL_19M_IN XOADC_GND XO_THERM XO_OUT_D0_EN XO_OUT_D0 XO_OUT_A1 XO_OUT_A0 SLEEP_CLK RSVD GND1 (SYM 2 OF 5) CLOCKS MPP_06 MPP_05 MPP_04 MPP_03 MPP_02 MPP_01 GPIO_06 GPIO_05 GPIO_04 GPIO_03 GPIO_02 GPIO_01 (SYM 4 OF 5) MPP MISC GND_S3 GND_S2 GND_S1 GND_S4 GND_S5 GND VCOIN (SYM 3 OF 5) INPUT PWR IN IN IN OUT PP PP OUT IN IN OUT OUT IN IN BI IN OUT OUT IN IN TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM CRITICAL BOM OPTION TABLE_5_HEAD PART# DESCRIPTIONQTY REFERENCE DESIGNATOR(S) Apple Inc. THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. 124578 B D 8 7 6 5 4 3 C B A NOTICE OF PROPRIETARY PROPERTY: PAGE 12 D A C PAGE TITLE SHEET IV ALL RIGHTS RESERVED R D SIZEDRAWING NUMBER REVISION BRANCH 6 3 THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT TABLE_ALT_ITEM TABLE_ALT_ITEM PART NUMBER ALTERNATE FORPART NUMBER BOM OPTION REF DES COMMENTS: TABLE_ALT_HEAD GND1 PIN NO NEEDS TO BE 61 BOM OPTIONS NDK - 197S0410 NC PLACE CLOSE TO PA B3/13 CONFIG 0 0.50V B4_17 CONFIG 1 0.25V B4/17 CONFIG 0 PA_ID 1.10V PA CONFIG 0.25V R317 C R NC NC NC C309 L U U301 XW XW305 LXXX NC NC NC NC NC NC NC NC 0.50V N41 PROTO 1 CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST. 0.70V 0.90V 1.10V REVISIONBOARD_ID 1.30V N41 PROTO 3, X122 PROTO 0 N41 EVT 1, X122 PROTO 1 N41 EVT 2, X122 EVT N41 EVT 3, X122 DVT N41 PROTO 2, X122 RF DEV 1 KYOCERA - 197S0437 RAKON - 197S0409 61 NEEDS TO BE MADE 45 BASEBAND PMU (2 OF 2) ALTERNATES 1000PF 10% 6.3V X5R-CERM 01005 CELL C33006_RF 25 SHORT-10L-0.1MM-SM NOSTUFF XW33004_RF CELL MF 1% 100K 1/32W 01005 R33007_RF SHORT-10L-0.1MM-SM XW33003_RF CELL BGA PM8018 U32001_RF BGA PM8018 CELL U32001_RF PM8018 BGA CELL U32001_RF PM8018 BGA CELL U32001_RF 25 OMIT 1% MF 01005 1/32W 15.8K R33002_RF OMIT 01005 MF 1/32W 1% 102K R33004_RF NOSTUFF 0.00 0% MF 1/32W 01005 R33017_RF 5% MF CELL 01005 20.0K 1/32W R33018_RF 2125 2124 24 SHORT-10L-0.25MM-SM NOSTUFF XW33008_RF NOSTUFF SHORT-10L-0.25MM-SM XW33010_RF CELL 19.2MHZ-90PPM-10PF 2.5X2.0MM-SM1 Y33001_RF P4MMSM PP33001_RF SM P4MM PP33002_RF 26 0% 0.00 CELL 1/32W MF 01005 R33019_RF 1% 143K CELL 1/32W MF 01005 R33003_RF 100K 1/32W 01005 MF 1% NOSTUFF R33008_RF 4245 4245 CELL 0201 10KOHM-1%-0.31MA RT33001_RF 01005 100 1% 1/32W MF CELL R33010_RF 24 NP0-C0G 16V +/-0.1PF% 8.2PF 01005 CELL C33008_RF 01005 MF 1/32W 1% 392K CELL R33001_RF 21 24 24 222324 2124 21 21 24 25 222324 21 197S0437 CELL Y33001_RF197S0410 KYOCERA CRYSTAL CELL197S0410197S0409 RAKON CRYSTALY33001_RF BASEBAND PMU (2 OF 2)Y B4_171 R33004_RFPA_ID RES DIVIDER 102K118S0685 B3_131 YPA_ID RES DIVIDER 61.9K R33004_RF118S0656 B3_13118S0685 1 YR33002_RFPA_ID RES DIVIDER 102K B4_17Y118S0729 PA_ID RES DIVIDER 39K R33002_RF1 XTAL19M_OUT XO_THERM_Y1 PM_MDM_IRQ_L BOARD_ID PA_ID RADIO_ON_L RF_CLK MDM_CLK A0_PMCLK RSVD BB_RST_L PMIC_SSBI XO_GND S5_GND RESET_PMU_L OPT_2 PMIC_RESOUT_L PS_HOLD_PMIC S2_GND S4_GND S3_GND S1_GND PP_BATT_VCC_CONN PM_USR_IRQ_L D0_EN PP_LDO3_AMUX_1V8 PS_HOLD SLEEP_CLK_32K XO_GND BOARD_TEMP4_N VREF_DAC_BIAS BOARD_TEMP4_P PP_LDO3_AMUX_1V8 VDDPX_BIAS XTAL19M_IN XO_GND 051-9374 13.0.0 33 OF 102 23 OF 46 2 1 2 1 1 2 21 62 16 69 35 86 74 14 21 4 41 68 47 27 15 3 2 1 22 10 9 25 37 19 26 7 45 80 73 72 66 67 85 49 71 60 50 38 33 56 30 96 103 91 36 93 99 94 39 51 61 46 52 40 57 1 2 1 2 1 2 1 2 21 21 42 1 3 1 1 1 2 1 2 1 2 2 1 1 2 2 1 1 2 23 22 22 22 22 21222930313334 23 23
iPad mini 1 full Schematic Diagram
iPad mini 1 full Schematic Diagram
iPad mini 1 full Schematic Diagram
iPad mini 1 full Schematic Diagram
iPad mini 1 full Schematic Diagram
iPad mini 1 full Schematic Diagram
iPad mini 1 full Schematic Diagram
iPad mini 1 full Schematic Diagram
iPad mini 1 full Schematic Diagram
iPad mini 1 full Schematic Diagram
iPad mini 1 full Schematic Diagram
iPad mini 1 full Schematic Diagram
iPad mini 1 full Schematic Diagram
iPad mini 1 full Schematic Diagram
iPad mini 1 full Schematic Diagram
iPad mini 1 full Schematic Diagram
iPad mini 1 full Schematic Diagram
iPad mini 1 full Schematic Diagram
iPad mini 1 full Schematic Diagram
iPad mini 1 full Schematic Diagram
iPad mini 1 full Schematic Diagram
iPad mini 1 full Schematic Diagram
iPad mini 1 full Schematic Diagram

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C2054 C2044 C2093 C2092 C1904 C1914 C1913 C46013_RF C47016 C47015 C 47 01 2 C47014 C5704 C5703 C2220 C2233 C1932 C1930 C1931 C2206 C1708 C1705 C1702 C7524 C47007_WIFI C40017_RF C2726 C2960 C2961 C2962 C2963 C1917 C1916 C8137 C2802 C0902 C0920 C8171 C8189C8175 C8174 C8173 C8176 C8178 C8177 C8180C8179 C8188 C8172 C8197 C8198 C8196 C8142 C8143 C41010_RF C42013_RF C44014_RF C39012 C39013_RF C46021_RF C2803 C43016 C43027_RF C40011_RF C32040_RF C32033_RF C1411 C47001_WIFI C32037_RF C32030_RF C32029_RF C32022_RF C32021_RF C32036_RF C32035_RF C32020_RF C7380 C8130 C8132 C8144 C8156 C8157 C8158 C8160 C8161 C8162 C2700 C1400 C2723 C1412 C1401 C1402 C2095 C2094 C2090 C2091 C38016_RF C38041_RF C38079_RF C2202 C1753 L8128 L8100 L8101 L8105 L8107 L8110 L8115 L8119 L8121 Y0602 U0652 U2700 J1700 L46028_RF L36001_RF L37006 L38025 L38008 L38009 L38006 L38013 L38010 L38011_RF L2950 L2660 L1904 L1905 L1760 L41007_RF U7300 L32007_RF L32008_RF L32010_RF L32009_RF U35001_RF DZ31002_RF Y33001_RF U32001_RF L32011_RF U34001_RF L39001_RF L45006 L40012_RF L40002_RF L45009 L45005 L40007 L43021_RF L39009L40009 L46018_RF L41003_RF L39006 L45002 L4 30 03 L44010 L39011_RF L43008_RF L4 30 13 L41005_RF L43002_RF L4 30 16 L4 30 20 L44008 L44002 L43017_RF L45010 L45008 L40008 L40006 L37003 L37002 L42 002 _RF L44007 L37005 L37004 L42005 L42004 L42001 L46009 L46006 L45004 L44005 L44006 L43007_RF L43001 L45007_RFL45003_RF L4 30 05 L4 30 14 L4 30 12 L39003_RF L39010_RF L39002_RF L43024 L43022 L41008_RF L46019 L46022_RF L40003_RF L44009_RF U36001_RF U37001 FL39001_RF FL42001 J1800J2601 J46002_RF J2800 U2800 www.witesomtesla.comwww.witesomtesla.com Diesel57Diesel57 Diesel57Diesel57 www.witesomtesla.comwww.witesomtesla.com www.mobile-files.com
  • 3. TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM REFERENCE DESIGNATOR(S) BOM OPTION TABLE_5_HEAD QTY DESCRIPTIONPART# TABLE_5_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_5_ITEM TABLE_TABLEOFCONTENTS_HEAD DRAWING TABLE_TABLEOFCONTENTS_HEAD 2. ALL CAPACITANCE VALUES ARE IN MICROFARADS. PROPRIETARY PROPERTY OF APPLE INC. 3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ. DESCRIPTION OF REVISION CK APPD 2 1 1245678 B D 6 5 4 3 C A NOTICE OF PROPRIETARY PROPERTY: PAGE THE INFORMATION CONTAINED HEREIN IS THE C A D DATE R SHEET Apple Inc. THE POSESSOR AGREES TO THE FOLLOWING: DRAWING TITLE D SIZE REVISION DRAWING NUMBER BRANCH REV ECN 7 B 3 II NOT TO REPRODUCE OR COPY IT I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE IV ALL RIGHTS RESERVED III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART 1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%. 8 MAIN LOGIC BOARD X123 SCH AND BOARD PART NUMBERS DVT 1 OF 102 000152046213 051-9374 13.0.0 2012-07-02ENGINEERING RELEASED 1 OF 46 AUDIO: CS35L19A AMPS2015 KAVITHA 01/18/2012 FF CAM & MIC CONNECTORS N/A17 N/A26 BUTTON & REAR CAMERA CONN N/A20 N/A29 PROX SENSOR N/A19 N/A28 INERTIAL SENSORS N/A18 N/A27 VIDEO: MIPI CONNECTOR N/A16 N/A22 AUDIO: L81 CODEC KAVITHA14 01/18/201219 AUDIO JACK FLEX CONN N/A13 03/31/201118 TOUCH: FLEX CONNECTOR N/A12 06/21/201017 NAND STORAGE MLB11 05/04/201214 E75 SUPPORT N/A10 N/A13 AP: MISC & ALIASES N/A9 04/11/201112 AP: PWR N/A8 04/18/201111 AP: PWR N/A7 04/18/201110 AP: TV/DP/MIPI/CAMERA MLB6 05/04/20129 AP: FLASH MEMORY INTERFACE N/A5 04/18/20118 AP: I/Os N/A4 05/05/20117 04/18/2011N/AAP: MAIN3 6 BLOCK DIAGRAM: SYSTEM N/A2 N/A2 CONSTRAINTS: MLB RULES46 102 N/AN/A 45 CONSTRAINTS: ASSIGNMENTS101 N/AN/A 44 CONSTRAINTS: ASSIGNMENTS100 N/AN/A 43 MECHANCIAL PARTS93 N/AN/A 42 POWER: PMU82 05/09/2011N/A 41 Power: PMU81 N/AN/A 40 POWER: BATTERY CONNECTOR75 N/AN/A 39 Power: Aliases73 N/AN/A 38 IO FLEX: DOCK COMPONENTS57 04/18/2011N/A 37 WIFI/BT47 06/27/2012JORGE 36 GPS46 06/27/2012JORGE 35 RX DIVERSITY45 06/27/2012JORGE 34 BAND2 PAD44 06/27/2012JORGE 33 BAND 1/4 PAD43 06/27/2012JORGE 32 DCS RX, ASM42 06/27/2012JORGE 31 2G PA, DCDC CONVERTER41 06/27/2012JORGE 30 BAND 13 PA40 06/27/2012JORGE 29 BAND 5/8 PAD39 06/27/2012JORGE 28 RF TRANSCEIVER (3 OF 3)38 06/27/2012JORGE 27 RF TRANSCEIVER (2 OF 3)37 06/27/2012JORGE 26 RF TRANSCEIVER (1 0F 3)36 06/27/2012JORGE 25 MOBILE DATA MODEM (2 OF 2)35 06/27/2012JORGE 24 BASEBAND (1 OF 2)34 06/27/2012JORGE 23 BASEBAND PMU (2 OF 2)33 06/27/2012JORGE 22 BASEBAND PMU (1 0F 2)32 06/27/2012JORGE PCB,MLB,X123 PCB1820-3243 1 TABLE OF CONTENTS N/A1 N/A1 21 SYSTEM & DEBUG CONNECTORS31 06/27/2012JORGE SCH,MLB,X123 SCH1051-9374 1 CSAPDF DATECONTENTS SYNC MASTER LAST_MODIFIED=Wed Jun 27 16:39:53 2012 DATECONTENTSCSAPDF SYNC MASTER SCH,MLB,X123
  • 4. Apple Inc. THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. 124578 B D 8 7 6 5 4 3 C B A NOTICE OF PROPRIETARY PROPERTY: PAGE 12 D A C PAGE TITLE SHEET IV ALL RIGHTS RESERVED R D SIZEDRAWING NUMBER REVISION BRANCH 6 3 THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT SENSOR PANEL REAR CAMERA ARM A5 CPU CANADA FLEX MLC CSA 21 LVDS AUDIO JACK FLEX HS JACK CSA 81-82 RF ANT I2S0 I2S2 SPI2 XSP ASP SPI SPEAKER CSA 20 CSA 20 AMP GYRO CSA 27 ACCELEROMETER ALS VGA FLEX CSA 28 PROX COMPASS CSA 27 CSA 20 AMP CUMULUS CSA 75 I2C1I2C2 SGX543-MP UART5_RTXD FMI0 FMI1 CSA 14 NAND FLASH CSA 47 WIFI/BT BT_I2SI2S3 UART3 HSIC2 UART1 TRISTAR DISPLAY/ CSA 32-46 UART4 RF/GPS HSIC1 WIFI/BT ANT E75 IO FLEX I2S1 CSA 19 L81 2X32-BIT 400MHZ/800MB/S AUDIO FF CAMERA GPU DWI MIPI0D I2C0 ISP_I2C0 SPI1 MIPI1C MIPI0C TOUCH PANEL ISP_I2C1 BACKLIGHT AUDIO CODEC H4A 1GHZ DUAL-CORE ARM CORTEX-A9 W/ SMP LPDDR2 DUAL-CORE IMG AE2 ALISON PMU SLAVE (POR) CABERNET BRD BATTERY CSA 27 AP3DSH (NEW)AP3GDL20 (NEW) (SAME AS K93A)(SAME AS J2) MASTER CABERNET BRD CUMULUS (SAME AS K93A) CSA 13 UART0 UART2 USB2.0 JTAG UART4 BB USB MIKEY BLOCK DIAGRAM: SYSTEM SYNC_DATE=N/ASYNC_MASTER=N/A 051-9374 13.0.0 2 OF 102 2 OF 46
  • 5. OUT OUT BI BI BI BI IN OUT IN IN OUT OUT BI BI CFSB RESET* XO0 XI0 WDOG USB11_DP USB11_DM USB_VSSA0 USB_VDD330 USB_VBUS USB_REXT USB_DVDD USB_DP USB_DM USB_BRICKID_DM_MON USB_BRICKID USB_ASW_VSS18 USB_ASW_VDD18 USB_ANALOGTEST PLL4_AVSS11PLL4_AVDD11 PLL3_AVSS11PLL3_AVDD11 PLL2_AVSS11PLL2_AVDD11 PLL1_AVSS11PLL1_AVDD11 PLL0_AVSS11PLL0_AVDD11 PLL_USB_AVSS11PLL_USB_AVDD11 HSIC2_DVSSHSIC2_DVDD102 HSIC1_DVSSHSIC1_DVDD101 HSIC_VSS122 HSIC_VSS121 HSIC_VDD122 HSIC_VDD121 DDR1_CKEIN DDR0_CKEIN HSIC1_DATA JTAG_SEL HSIC1_STB HSIC2_DATA HSIC2_STB JTAG_TRTCK JTAG_TRST* JTAG_TDO JTAG_TDI JTAG_TMS JTAG_TCK PVDDP_UART4 PVDDP_TESTS PVDDP_FMI0 PVDDP_CFSB VSEL30_UART4 VSEL30_TST VSEL30_FMI USB_ID TST_CLKOUT TST_STPCLK FUSE1_FSRC TESTMODE FAST_SCAN_CLK HOLD_RESET (1 OF 12) TABLE_ALT_ITEM TABLE_ALT_ITEM PART NUMBER ALTERNATE FORPART NUMBER BOM OPTION REF DES COMMENTS: TABLE_ALT_HEAD TABLE_5_ITEM CRITICAL BOM OPTION TABLE_5_HEAD PART# DESCRIPTIONQTY REFERENCE DESIGNATOR(S) Apple Inc. THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. 124578 B D 8 7 6 5 4 3 C B A NOTICE OF PROPRIETARY PROPERTY: PAGE 12 D A C PAGE TITLE SHEET IV ALL RIGHTS RESERVED R D SIZEDRAWING NUMBER REVISION BRANCH 6 3 THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT HYNIX ELPIDA SAMSUNG 4MA 4MA 2MA 17MA 6MA 4MA 25MA 4MA 4MA 35MA NOTE FOR VSEL... 0 - 1.8V IO 1.8V - 3V IO 10MA 25MA 4MA 4MA 10MA 10MA 1MA R0647 01005 MF 1/32W 1% 100K 1044 944 C0610 0.01UF 6.3V 10% X5R 01005 C0611 01005 10% X5R 6.3V 0.01UF 2144 2144 2144 2144 R0651 01005 68.1K 1% 1/32W MF 9 R0646 100K 1% 1/32W MF 01005 R0645 01005 MF 1/32W 1% 100K C0682 27PF 16V 5% 01005 NP0-C0G C0681 27PF 16V 5% 01005 NP0-C0G C0680 27PF 16V 5% 01005 NP0-C0G C0684 27PF 16V 5% 01005 NP0-C0G C0627 10% 01005 6.3V X5R 0.01UF C0630 0.01UF 6.3V X5R 10% 01005 R0617 01005 1/32W MF 10K 1% C0613 5% 15PF 01005 NP0-C0G-CERM 16V R0655 1% 01005 1.00M MF 1/32W R0688 01005 MF 100K 1% 1/32W R0642 1% 1/20W 201 MF 43.2 C0640 1UF 6.3V X5R 20% 0201 C0646 X5R 10% 0.01UF 01005 6.3V C0648 0.01UF 6.3V 01005 X5R 10% DZ0600 GDZ-0201 GDZT2R5.1B NOSTUFF 10 102142 44 1044 944 10 44 10 44 R0689 01005 MF 1% 221K 1/32W C0651 X5R 01005 0.01UF 6.3V 10% C0652 10% 01005 0.01UF 6.3V X5R CRITICAL Y0602 24.000MHZ-16PF-60PPM SM-2 C0607 16V 01005 5% NP0-C0G-CERM 15PF R0640 01005 1.00K MF 1/32W 1% R0622 MF 01005 1/32W 0% 0.00 R0621 MF 0.00 1/32W 01005 0% R0620 0.00 01005 0% MF 1/32W R0625 MF 0% 0.00 1/32W 01005 C0643 0.22UF X5R 6.3V 0201 20% C0618 NOSTUFF 1000PF 10% 6.3V X5R 01005 CRITICAL OMIT U0652 H4A POP-512MB-DDR BGA R0624 01005 0% 1/32W MF 0.00 C0608 10% X5R 6.3V 0.01UF 01005 C0683 27PF 16V 5% 01005 NP0-C0G C0642 0201 X5R 20% 6.3V 0.22UF C0641 0.01UF X5R 6.3V 01005 10% AP: MAIN SYNC_DATE=04/18/2011SYNC_MASTER=N/ACRITICAL1 COMMON339S0179 H4A B0,35NM,1.15MM HEIGHT U0652 339S0187 U0652339S0179 339S0188 339S0179 U0652 SOC_TESTMODE SOC_HOLD_RESET PP1V0_PLL01_F VOLTAGE=1.1V MIN_LINE_WIDTH=0.2MM MIN_NECK_WIDTH=0.1MM NET_SPACING_TYPE=PWR MAX_NECK_LENGTH=3 MM VOLTAGE=1.1V MIN_NECK_WIDTH=0.1MM MIN_LINE_WIDTH=0.2MM NET_SPACING_TYPE=PWR MAX_NECK_LENGTH=3 MM PP1V0_PLL_USB_F VOLTAGE=1.1V MAX_NECK_LENGTH=3 MM NET_SPACING_TYPE=PWR MIN_LINE_WIDTH=0.2MM MIN_NECK_WIDTH=0.1MM PP1V0_PLL4_F PP1V0_PLL3_F MAX_NECK_LENGTH=3 MM NET_SPACING_TYPE=PWR MIN_NECK_WIDTH=0.1MM MIN_LINE_WIDTH=0.2MM VOLTAGE=1.1V PP1V0_PLL2_F NET_SPACING_TYPE=PWR MAX_NECK_LENGTH=3 MM MIN_NECK_WIDTH=0.1MM MIN_LINE_WIDTH=0.2MM VOLTAGE=1.1V NC_USB_BRICKID_DM_MON NC_USB_BRICKID_DP_MON =PP1V0_USB_H4 SOC_DDR_CKEIN HSIC2_WLAN_STB =PP1V2_HSIC_H4 HSIC1_BB_STB SOC_USB_D_P SOC_USB_D_N NC_USB_ANALOGTEST =PP1V0_PLL_H4 XTAL_SOC_24M_O_R SOC_FAST_SCAN_CLK SOC_TST_STPCLK NC_USB_FS_D_P NC_JTAG_SOC_TRTCK NC_USB_ID TP_SOC_TST_CLKOUT PPVBUS_USB USB_SOC_VBUS NC_USB_FS_D_N HSIC2_WLAN_DATA USB_REXT =PP1V8_PVDDP_H4 XTAL_SOC_24M_I SOC_WDOG =PP1V8_USB_H4 XTAL_SOC_24M_O HSIC1_BB_DATA =PP1V0_USB_H4 =PP1V8_H4 RST_SYSTEM_L JTAG_SOC_TMS JTAG_SOC_TCK =PP1V8_H4 JTAG_SOC_TDI JTAG_SOC_SEL JTAG_SOC_TRST_L JTAG_SOC_TDO =PP3V3_USB_H4 051-9374 3 OF 46 13.0.0 6 OF 102 1 2 2 1 2 1 1 2 1 2 1 2 2 1 2 1 2 1 2 1 2 1 2 1 1 2 2 1 12 1 2 1 2 2 1 2 1 2 1 A K 1 2 2 1 2 1 31 2 4 2 1 1 2 1 2 1 2 1 2 1 2 2 1 2 1 J23 G23 A16 A15 C27 T29 U29 R27 R26 T27 N28 T25 R25 M31 N31 T26 U27 P28P27 U26 D21E21 D20E20 D18E18 D17E17 D16E16 D19E19 W25V24 W29V27 V26 W28 V25 W26 T9 K12 W30 A25 W31 R31 U31 E26 E25 D26 D25 B25 C26 AH25 F27 AC27 J18 H21 J21 G21 M28 A29 A26 H26 G20 F22 H23 1 2 2 1 2 1 2 1 2 1 9 9 3 39 39 39 9 9 9 41 9 39 45 39 45 339 346939 346939 8 39
  • 6. OUT BI BI OUT BI OUT OUT OUT IN OUT IN IN IN IN IN OUT IN IN IN IN IN IN OUT IN OUT OUT OUT OUT IN OUT OUT OUT IN OUT OUT OUT IN OUT OUT IN OUT IN OUT IN IN IN (2 OF 12) UART4_TXD UART4_RXD UART4_RTSN UART4_CTSN UART3_TXD UART3_RXD UART3_RTSN UART3_CTSN UART2_TXD UART2_RXD UART2_RTSN UART2_CTSN UART1_TXD UART1_RXD UART1_RTSN UART1_CTSN UART0_TXD UART0_RXD GPIO9 GPIO8 GPIO7 GPIO6 GPIO5 GPIO4 GPIO36 GPIO35 GPIO34 GPIO33 GPIO32 GPIO31 GPIO30 GPIO3 GPIO29 GPIO28 GPIO27 GPIO26 GPIO25 GPIO24 GPIO23 GPIO22 GPIO21 GPIO20 GPIO2 GPIO19 GPIO18 GPIO17 GPIO16 GPIO15 GPIO14 GPIO13 GPIO12 GPIO11 GPIO10 GPIO1 GPIO0 VSS EHCI_PORT_PWR0 EHCI_PORT_PWR1 EHCI_PORT_PWR2 TMR32_PWM2 TMR32_PWM1 TMR32_PWM0 UART5_RTXD (3 OF 12) SWI_DATA SPI2_SSIN SPI2_SCLK SPI2_MOSI SPI2_MISO SPI1_SSIN SPI1_SCLK SPI1_MOSI SPI0_MOSI SPI0_MISO SDIO0_DATA0 SDIO0_CMD SDIO0_CLK I2S3_MCK I2S3_LRCK I2S3_DOUT I2S3_DIN I2S3_BCLK I2S2_MCK I2S2_LRCK I2S2_DOUT I2S2_DIN I2S2_BCLK I2S1_LRCK I2S1_DOUT I2S1_DIN I2C2_SDA I2C2_SCL I2C1_SDA I2C1_SCL I2C0_SDA I2C0_SCL DWI_DO DWI_DI I2S1_MCK I2S1_BCLK I2S0_DOUT I2S0_DIN I2S0_LRCK I2S0_BCLK I2S0_MCK SDIO0_DATA1 SDIO0_DATA2 SDIO0_DATA3 DWI_CLK VSS SPI1_MISO SPI0_SSIN SPI0_SCLK IN IN IN OUT IN IN IN BI IN OUT OUT OUT OUT IN OUT OUT OUT OUT IN OUT OUT IN IN OUT IN IN IN IN IN OUT IN IN OUT OUT IN IN OUT OUT IN OUT IN OUT OUT OUT IN OUT IN OUT IN OUT OUT OUT OUT IN IN IN IN IN IN OUT OUT OUT A DIR VCCB GND B VCCA IN Apple Inc. THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. 124578 B D 8 7 6 5 4 3 C B A NOTICE OF PROPRIETARY PROPERTY: PAGE 12 D A C PAGE TITLE SHEET IV ALL RIGHTS RESERVED R D SIZEDRAWING NUMBER REVISION BRANCH 6 3 THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT H4A I/OS (SCREEN ROTATION LOCK) R0700 1/32W 5% 2.2K MF 01005 R0701 1/32W 5% 2.2K 01005 MF R0702 5% 1/32W 1.8K 01005 MF R0703 5% 1/32W 1.8K 01005 MF R0705 1/32W 5% 2.2K MF 01005 R0704 5% 1/32W 2.2K MF 01005 4 10 15 42 44 4 10 15 42 44 4 18 19 44 4 18 19 44 4 17 18 44 4 17 18 44 1244 1244 1244 1244 9 9 9 R0771 MF 220K 1/32W 5% 01005 R0770 5% MF 1/32W 220K 01005 R0765 5% MF 1/32W 220K 01005 R0738 01005 MF 1% 100K 1/32W R0737 01005 MF 1% 100K 1/32W R0736 MF 01005 1% 1/32W 100K R0735 01005 MF 1% 1/32W 100K 41242 42042 21 18 21 18 9 9 10 44 10 44 21 44 21 44 1444 1444 1444 1444 1444 1444 1444 1444 2144 2144 2144 2144 42 44 42 44 42 44 21 14 R0720 1% MF 01005 33.2 1/32W 1444 9 9 9 U0652 OMIT POP-512MB-DDR BGA H4AU0652 OMIT POP-512MB-DDR BGA H4A 20 20 42042 415 9 4 49 40 42 44 1544 1544 1544 1544 1444 1444 1444 1444 R0721 1% MF 33.2 1/32W 01005 1544 15 15 21 442 42 9 21 21 21 21 21 21 12 12 21 44 21 44 21 44 21 44 10 44 15 10 44 21 44 21 44 10 21 44 10 21 44 16 4 21 21 19 17 9 R0739 MF 01005 1% 1/32W 100K 21 24 44 21 24 44 21 24 44 10 10 1042 18 18 21 21 24 44 21 24 44 12 44 16 NOSTUFF C0701 01005 20% X5R-CERM 0.1UF 6.3V NOSTUFF U0701 SN74LVC1T45YZPR BGA 4 01005 R0750 0% 0.00 1/32W MF AP: I/Os SYNC_DATE=05/05/2011SYNC_MASTER=N/A GPIO_MLC_RST_1V8_L GPIO_MLC_RST_L AP_CLK_32K_CUMULUS I2S0_CODEC_ASP_BCLK I2S0_CODEC_ASP_DIN BB_JTAG_TDI BB_JTAG_TDO GPIO_ACCEL_IRQ1_L GPIO_GYRO_IRQ2 UART1_BT_CTS_L UART0_DEBUG_TXD GPIO_ACC_SW_EN BB_JTAG_TRST_L BB_JTAG_TMS BB_JTAG_TCK GPIO_SPKAMP_RST_L GPIO_PMU_KEEPACT GPIO_BTN_SRL_L GPIO_BTN_POWER_L GPIO_BTN_HOME_L =PP1V8_H4 I2C0_SDA I2C1_SDA I2C1_SCL I2C0_SCL I2C2_SCL =PP1V8_S2R_MISC =PP1V8_ALWAYS =PP1V8_S2R_MISC SPI2_CODEC_CS_L SPI2_CODEC_SCLK SPI2_CODEC_MISO SPI2_CODEC_MOSI SPI1_GRAPE_CS_L SPI1_GRAPE_SCLK SPI1_GRAPE_MISO GPIO_BOARD_ID1 GPIO_BOARD_ID2 I2S3_BT_DIN I2S3_BT_DOUT DWI_CLK I2S0_CODEC_ASP_DOUT I2S1_SPKAMP_BCLK DWI_DO I2C0_SCL I2C0_SDA I2C1_SCL I2C1_SDA I2C2_SDA I2S1_SPKAMP_DIN I2S1_SPKAMP_LRCK I2S2_CODEC_XSP_DIN NC_SWI_AP I2S0_CODEC_ASP_MCK GPIO_MLC_RST_1V8_L GPIO_BB_HSIC_DEV_RDY GPIO_BOARD_REV2 GPIO_BOARD_REV1 GPIO_BOARD_REV0 GPIO_MLC_RST_1V8_L GPIO_FORCE_DFU GPIO_DFU_STATUS GPIO_BTN_HOME_L GPIO_BTN_POWER_L GPIO_BTN_VOL_UP_L GPIO_BTN_VOL_DOWN_L GPIO_BTN_SRL_L GPIO_SPKAMP_RST_L GPIO_CODEC_IRQ_L GPIO_BT_WAKE GPIO_BB_RST_L GPIO_BB_GSM_TXBURST GPIO_BB_IPC_GPIO GPIO_BB_DIAGS_RDY GPIO_BB_GPS_SYNC GPIO_BB_RST_DET_L GPIO_BB_HSIC_HOST_RDY GPIO_BOOT_CONFIG0 GPIO_PMU_IRQ_L GPIO_PMU_KEEPACT GPIO_GRAPE_RST_L GPIO_GRAPE_IRQ_L GPIO_BB_RADIO_ON_L GPIO_BOOT_CONFIG1 GPIO_FORCE_DFU GPIO_BOOT_CONFIG3 GPIO_ACCEL_IRQ2_L GPIO_GYRO_IRQ1 GPIO_MLC_PWR_EN UART0_DEBUG_RXD UART1_BT_RTS_L GPIO_ALS_IRQ_L GPIO_SPKAMP_LEFT_IRQ_L UART2_ACC_RXD GPIO_WLAN_HSIC_HOST_RDY UART4_BB_RTS_L UART4_BB_TXD UART4_BB_RXD UART4_BB_CTS_L GPIO_BOARD_ID3 I2S0_CODEC_ASP_MCK_R I2S1_SPKAMP_DOUT DWI_DI I2C2_SCL I2S2_CODEC_XSP_DOUT I2S2_CODEC_XSP_BCLK SPI1_GRAPE_MOSI I2S3_BT_LRCK I2S3_BT_BCLK UART5_BATT_RTXD UART2_ACC_TXD GPIO_WLAN_HSIC_DEV_RDY UART3_WLAN_RXD UART3_WLAN_TXD GPIO_ACC_SW_POK_L PMU_GPIO_TRISTAR_IRQ UART1_BT_RXD UART1_BT_TXD GPIO_DFU_STATUS GPIO_PROX_IRQ_L GPIO_WLAN_HSIC_RESUME GPIO_BOOT_CONFIG2 NC_GPIO31 I2S1_SPKAMP_MCK I2S2_CODEC_XSP_LRCK I2S1_SPKAMP_MCK_R I2S0_CODEC_ASP_LRCK GPIO_BOARD_ID0 NC_SPI0_SSIN I2C2_SDA =PP3V0_MLC_RST_LEVELSHIFTER=PP1V8_IO_H4 GPIO_SPKAMP_RIGHT_IRQ_L GPIO_SPKAMP_KEEPALIVE 051-9374 13.0.0 7 OF 102 4 OF 46 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 AK27 AK26 AJ25 AJ26 AF1 AE1 AG2 AF2 R1 M1 T1 N1 AK1 AL1 AH5 AG5 C29 B29 H2 G1 L4 K3 G2 G3 AH3 R3 P2 AE4 AB3 AF4 T2 G4 AF5 AD3 AE5 AA3 V3 AC4 L2 H4 AD5 Y4 F2 AB4 N2 AB5 M3 W4 W3 J1 J3 J2 N3 H1 K4 A10 A9 A8 A5 A4 A3 A2 A1 T3 V2 U2 AN5 AP4 AP5 D28 A6 A7 AN6 AM21 AN22 AM12 AN13 AH4 AP13 AM3 AB1 AP21 AK25 AJ24 AH28 AM1 AN20 AK5 AH1 AL16 AM9 AK2 AM2 AN17 AM16 AP8 AM20 AL14 E29 D29 AG3 AM7 AM6 AL4 AN18 U1 B1 A31 A30 A27 A14 A13 A12 A11 AM13 AK3 AM22 AP17 AP14 AM19 AM18 AH24 AJ27 AK24 AM11 A17 A24 AP23 AM4 AM15 1 2 1 2 2 1 A2 C2 A1 B1 B2 C1 1 2 4 15 4 42 4 20 42 4 20 42 4 12 42 36939 410154244 4181944 4181944 410154244 4171844 491039 39 491039 4 4 9 4 44 44 4171844 396839
  • 7. OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI (4 OF 12) FMI1_WEN FMI1_IO7 FMI1_IO6 FMI1_IO5 FMI1_IO4 FMI1_IO3 FMI1_IO2 FMI1_CLE FMI1_CEN1 FMI1_ALE VSS FMI0_IO7 FMI0_ALE FMI0_CLE FMI0_WEN FMI0_IO0 FMI0_IO1 FMI0_IO2 FMI0_IO3 FMI0_IO4 FMI0_CEN0 FMI0_CEN2 FMI0_CEN3 FMI0_CEN1 FMI0_IO6 FMI0_IO5 FMI1_CEN0 FMI0_DQS FMI0_REN FMI1_IO1 FMI1_IO0 FMI1_CEN3 FMI1_CEN2 FMI1_DQS FMI1_REN Apple Inc. THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. 124578 B D 8 7 6 5 4 3 C B A NOTICE OF PROPRIETARY PROPERTY: PAGE 12 D A C PAGE TITLE SHEET IV ALL RIGHTS RESERVED R D SIZEDRAWING NUMBER REVISION BRANCH 6 3 THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT 1144 1144 1144 1144 1144 1144 1144 1144 1144 1144 1144 1144 1144 1144 1144 1144 1144 1144 1144 1144 1144 1144 1144 1144 1144 1144 U0652 OMIT H4A POP-512MB-DDR BGA R0832 MF 01005 1% 1/32W 100K R0831 01005 MF 1% 100K 1/32W AP: FLASH MEMORY INTERFACE SYNC_DATE=04/18/2011SYNC_MASTER=N/A NC_FMI1_CEN1 NC_FMI1_CEN2 NC_FMI0_CEN3 NC_FMI0_CEN2 NC_FMI0_CEN1 FMI1_CE0_L FMI0_RE_N FMI0_WE_L FMI0_AD<7> FMI0_AD<6> FMI0_AD<5> FMI0_DQS_P =PP1V8_NAND_H4 =PP1V8_NAND_H4 FMI0_CE0_L FMI1_DQS_P FMI0_AD<3> FMI0_AD<2> FMI0_AD<1> FMI0_AD<0> FMI0_AD<4> FMI0_ALE FMI0_CLE FMI1_AD<1> FMI1_AD<2> FMI1_AD<3> FMI1_AD<5> FMI1_AD<4> FMI1_AD<7> FMI1_AD<6> FMI1_ALE FMI1_CLE FMI1_WE_L FMI1_RE_N NC_FMI1_CEN3 FMI1_AD<0> 051-9374 13.0.0 8 OF 102 5 OF 46 Y25 AB29 AA29 AB28 AA28 AA31 Y26 AA26 AB26 AB31 B17 B16 B15 B13 B12 B11 B9 B8 B2 AG27 AD25 AE28 AC25 AC28 AC26 AD29 AD26 AE25 AF28 AF25 AF26 AE26 AG26 AG28 AB30 AE27 AD28 Y28 W27 AB25 AA25 B6 B5 B3 AA27 Y29 1 2 1 2 1144 5839 5839 1144
  • 8. OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT BI IN IN OUT OUT MIPI0C_DPDATA0 MIPI0C_DNDATA0 MIPI0C_DPDATA1 MIPI0C_DNDATA1 MIPI0C_DPDATA2 MIPI0C_DNDATA2 MIPI0C_DPDATA3 MIPI0C_DNDATA3 MIPI0C_DPCLK MIPI0C_DNCLK MIPI0D_DPDATA0 MIPI0D_DNDATA0 MIPI0D_DPDATA1 MIPI0D_DNDATA1 MIPI0D_DPDATA2 MIPI0D_DNDATA2 MIPI0D_DPDATA3 MIPI0D_DNDATA3 MIPI0D_DPCLK MIPI0D_DNCLK ISP0_FLASH ISP0_PRE_FLASH SENSOR0_CLK SENSOR0_RST ISP1_FLASH ISP1_PRE_FLASH SENSOR1_CLK SENSOR1_RST ISP0_SCL ISP0_SDA ISP1_SCL ISP1_SDA MIPI_VDD10 MIPI0D_VDD10_PLL MIPI0D_VDD MIPI0D_VREG_0P4V MIPI1C_DNCLK MIPI1C_DNDATA0 MIPI1C_DNDATA1 MIPI1C_DPCLK MIPI1C_DPDATA0 MIPI1C_DPDATA1 MIPI1D_DNCLK MIPI1D_DNDATA0 MIPI1D_DNDATA1 MIPI1D_DPCLK MIPI1D_DPDATA0 MIPI1D_DPDATA1 MIPI1D_VDD10_PLL MIPI1D_VREG_0P4V MIPI_VSS MIPI_VSYNC (5 OF 12)(6 OF 12) DAC_AVDD18A DAC_AVDD18D DAC_AVSS18A DAC_AVSS18D DAC_COMP DAC_IREF DAC_OUT1 DAC_OUT2 DAC_OUT3 DAC_VREF DP_HPD DP_PAD_AUXN DP_PAD_AUXP DP_PAD_AVDD_AUX DP_PAD_AVDD0 DP_PAD_AVDD1 DP_PAD_AVDDP0 DP_PAD_AVDDX DP_PAD_AVSS_AUX DP_PAD_AVSS0 DP_PAD_AVSS1 DP_PAD_AVSSP0 DP_PAD_AVSSX DP_PAD_DC_TP DP_PAD_DVDD DP_PAD_DVSS DP_PAD_R_BIAS DP_PAD_TX0N DP_PAD_TX0P DP_PAD_TX1N DP_PAD_TX1P OUT OUT OUT BI OUT OUT OUT IN IN IN IN OUT PART NUMBER ALTERNATE FORPART NUMBER BOM OPTION REF DES COMMENTS: TABLE_ALT_HEAD TABLE_ALT_ITEM Apple Inc. THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. 124578 B D 8 7 6 5 4 3 C B A NOTICE OF PROPRIETARY PROPERTY: PAGE 12 D A C PAGE TITLE SHEET IV ALL RIGHTS RESERVED R D SIZEDRAWING NUMBER REVISION BRANCH 6 3 THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT 6.6MA 45MA 4MA MIPI TV/DISPLAYPORT MIN_NECK_MIDTH SHOULD BE 0.2MM 15MA 77MA 77MA 5MA 11MA 8MA 12MA C0902 X5R-CERM 10V 2.2NF 10% 0201 6.3V X5R-CERM 01005 0.1UF 20% C0903 6.3V 0.1UF X5R-CERM 20% 01005 C0907 6.3V X5R-CERM 01005 20% 0.1UF C0908 1645 1645 1645 1645 1645 1645 1645 1645 1645 17 44 17 17 44 17 44 C0920 X5R-CERM 10% 2.2NF 10V 0201 0201 20% X5R 1UF 6.3V C0930 17 45 17 45 49.9 R0940 01005 MF 1/32W 2.2K 5% 01005 R0933 MF 1/32W 2.2K 5% 01005 R0932 17 45 17 45 POP-512MB-DDR BGA H4A OMIT U0652 H4A POP-512MB-DDR BGA OMIT U0652 FL0911 0201-1 80-OHM-0.2A-0.4-OHM 6.3V 1UF X5R 20% 0201 C0963 27PF 16V 01005 5% NP0-C0G C0961 6.3V X5R-CERM 01005 0.1UF 20% C0962 1645 R0941 01005 100 20 44 20 MF 1/32W 2.2K 5% 01005 R0930 MF 1/32W 5% 2.2K 01005 R0931 20 44 20 44 2045 2045 2045 2045 2045 2045 12 SYNC_MASTER=MLB SYNC_DATE=05/04/2012 AP: TV/DP/MIPI/CAMERA RADAR: 11363497FL0911155S0359155S0725 =PP1V0_DPORT_H4 NC_DP_PAD_TX0N NC_DP_PAD_TX0P NC_DP_PAD_AUXN NC_DP_PAD_TX1P NC_DP_PAD_TX1N NC_DP_PAD_R_BIAS NC_DP_PAD_DC_TP NC_DP_PAD_AUXP NC_DP_HPD NC_DAC_VREF NC_DAC_OUT3 NC_DAC_OUT2 NC_DAC_OUT1 NC_DAC_IREF NC_DAC_COMP =PP1V8_IO_H4 =PP1V8_DPORT_H4 ISP1_CAM_FRONT_SDA ISP0_CAM_REAR_SCL ISP0_CAM_REAR_SDA ISP1_CAM_FRONT_SCL NC_ISP1_FLASH NC_ISP1_PRE_FLASH MIPI1C_CAM_FRONT_CLK_P MAX_NECK_LENGTH=3 MM NET_SPACING_TYPE=PWR MIN_NECK_WIDTH=0.1MM MIN_LINE_WIDTH=0.2MM VOLTAGE=0.4V PP_AP_MIPI1D_0P4V =PP1V8_H4 =PP1V8_MIPI_H4 =PP1V0_MIPI_PLL_H4 NC_MIPI1C_CAM_FRONT_DATA_P<1> NC_MIPI1D_AP_DATA_P<1> MIPI0D_DATA_N<0> MIPI0D_CLK_P MIPI0D_DATA_N<1> MIPI0D_DATA_P<1> ISP0_CAM_REAR_SHUTDOWN MIPI0C_CAM_REAR_DATA_N<0> NC_MIPI1D_AP_CLK_N NC_MIPI1D_AP_CLK_P NC_MIPI1D_AP_DATA_N<1> NC_MIPI1C_CAM_FRONT_DATA_N<1> MIPI1C_CAM_FRONT_CLK_N NC_MIPI0C_CAM_REAR_DATA_P<3> NC_MIPI0C_CAM_REAR_DATA_N<2> MIPI0C_CAM_REAR_DATA_N<1> MIPI0D_DATA_P<0> MIPI0C_CAM_REAR_CLK_N MIPI0C_CAM_REAR_CLK_P NC_MIPI0C_CAM_REAR_DATA_N<3> NC_MIPI1D_AP_DATA_P<0> ISP1_CAM_FRONT_SHUTDOWN NC_ISP0_PRE_FLASH NC_ISP0_FLASH PP1V0_MIPID_PLL_F MIN_LINE_WIDTH=0.2MM MAX_NECK_LENGTH=3 MM MIN_NECK_WIDTH=0.1MM VOLTAGE=1.1V NET_SPACING_TYPE=PWR MAX_NECK_LENGTH=3 MM MIN_NECK_WIDTH=0.1MM MIN_LINE_WIDTH=0.2MM VOLTAGE=0.4V NET_SPACING_TYPE=PWR PP_AP_MIPI0D_0P4V =PP1V0_MIPI_H4 NC_MIPI1D_AP_DATA_N<0> MIPI0D_DATA_N<3> MIPI0D_CLK_N MIPI0D_DATA_P<3> MIPI0D_DATA_N<2> MIPI0D_DATA_P<2> NC_MIPI0C_CAM_REAR_DATA_P<2> MIPI0C_CAM_REAR_DATA_P<1> MIPI0C_CAM_REAR_DATA_P<0> DISPLAY_SYNC ISP1_CAM_FRONT_CLK_R ISP1_CAM_FRONT_CLK ISP0_CAM_REAR_CLK_R ISP0_CAM_REAR_CLK MIPI1C_CAM_FRONT_DATA_N<0> MIPI1C_CAM_FRONT_DATA_P<0> 051-9374 13.0.0 9 OF 102 6 OF 46 2 1 2 1 2 1 2 1 2 1 2 1 1 2 1 2 1 2 AM30 AM31 AL30 AL31 AJ30 AJ31 AH30 AH31 AK30 AK31 AN25 AP25 AN26 AP26 AN28 AP28 AN29 AP29 AN27 AP27 AL17 AL13 AP19 AN8 AL19 AL10 AP11 AP18 AP7 AC1 AN3 AL20 AG17 AG18 AG19 AG20 AG21 AG22 AG23 AH22 AH23 AJ17 AJ19 AJ18 AF31 AG31 AE31 AF30 AG30 AE30 AK29 AL29 AJ29 AK28 AL28 AJ28 AJ21 AJ23 AJ22 AH21 AH20 AH19 AH18 AH17 AM10 E23 E22 D23 D22 C23 C24 A23 A22 A21 H24 E27 J31 K31 M27 L24 K26 M25 N25 N24 M24 L25 M26 N26 P24 P25 P26 N27 F31 G31 C31 D31 21 2 1 2 1 2 1 1 2 1 2 1 2 39 4839 39 3 4 9 39 39 39 9 9 9 9 9 9 9 9 9 9 39 9 9 44 44
  • 9. (7 OF 12) VDDQ VDDCA VDD2 VDD1 VSS DDR1_ZQ DDR0_VREF_CA DDR1_VDDQ_CKE DDR0_VDDQ_CKE DDR0_ZQ DDR1_VREF_DQ DDR0_VREF_DQ DDR1_VREF_CA (9 OF 12) VDDIOD VDDIO18_GRP3 VDDIO18_GRP2 VDDIO18_GRP1 VSS Apple Inc. THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. 124578 B D 8 7 6 5 4 3 C B A NOTICE OF PROPRIETARY PROPERTY: PAGE 12 D A C PAGE TITLE SHEET IV ALL RIGHTS RESERVED R D SIZEDRAWING NUMBER REVISION BRANCH 6 3 THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT 20MA 500MA 320MA (DRAM CORE) (DDR IMPEDANCE CONTROL) <1MA <1MA 80MA 500MA (DON’T DOUBLE COUNT) (VDDQ = VDDIOD) EHCI (UNUSED) ISP FLASH (UNUSED) I2S[0-3] (1 UNUSED) SPI[0-2] (0,2 UNUSED) 75MA SENSOR[0-1] DWI GPIO UART[1-3] (1-2 UNUSED) I2C[0-1] ISP[0-1] 2MA - XI/0 11MA - VSEL30_X,CFSB,TEST (DRAM CORE - CHARGE PUMP) C1056 NOSTUFF 0.01UF X5R 6.3V 10% 01005 R1056 01005 1.00K MF 1% 1/32W R1055 01005 1/32W MF 1% 1.00K C1054 NOSTUFF X5R 6.3V 10% 01005 0.01UF R1053 01005 MF 1% 1.00K 1/32W R1054 01005 1% 1/32W 1.00K MF U0652 OMIT BGA H4A POP-512MB-DDR U0652 OMIT BGA POP-512MB-DDR H4A CRITICAL C1015 402 4.7UF 6.3V 20% X5R-CERM1 CRITICAL C1019 6.3V X5R 0201 20% 0.22UF CRITICAL C1024 402 4.7UF 6.3V 20% X5R-CERM1 CRITICAL C1029 20% 0.22UF 0201 X5R 6.3V CRITICAL C1028 6.3V X5R 0201 0.22UF 20% CRITICAL C1027 20% 0.22UF 0201 X5R 6.3V C1035 01005 10% 0.01UF 6.3V X5R CRITICAL C1034 402 20% X5R-CERM1 4.7UF 6.3V CRITICAL C1041 6.3V X5R 0201 0.22UF 20% CRITICAL C1040 6.3V X5R 0201 0.22UF 20% CRITICAL C1039 0.22UF 6.3V X5R 0201 20% CRITICAL C1038 6.3V X5R 0201 0.22UF 20% CRITICAL C1037 20% 0.22UF 0201 X5R 6.3V CRITICAL C1036 6.3V X5R 0201 0.22UF 20% CRITICAL C1042 402 20% X5R-CERM1 4.7UF 6.3V CRITICAL C1043 20% 0.22UF 0201 X5R 6.3V C1001 01005 10% 0.01UF X5R 6.3V C1000 01005 10% 0.01UF X5R 6.3V C1002 NOSTUFF X5R 6.3V 10% 01005 0.01UF CRITICAL C1007 0.22UF 20% 6.3V X5R 0201 R1001 240 1% 1/20W 201MF R1000 240 MF1/20W1% 201 CRITICAL C1006 6.3V X5R 0201 0.22UF 20% CRITICAL 20% C1005 6.3V X5R 0201 0.22UF CRITICAL C1004 6.3V X5R 0201 0.22UF 20% CRITICAL C1009 402 20% X5R-CERM1 4.7UF 6.3V C1026 01005 10% 0.01UF 6.3V X5R CRITICAL C1032 6.3V X5R 0201 0.22UF 20% CRITICAL C1031 6.3V X5R 0201 0.22UF 20% CRITICAL C1030 6.3V X5R 0201 0.22UF 20% R1005 01005 1/32W MF 2.21K 1% R1006 01005 MF 2.21K 1% 1/32W C1052 NOSTUFF 0.01UF X5R 6.3V 10% 01005 R1051 01005 MF 2.21K 1% 1/32W R1052 01005 MF 1/32W 1% 2.21K AP: PWR SYNC_DATE=04/18/2011SYNC_MASTER=N/A =PP1V8_S2R_H4 PPVREF_DDR0_CA VOLTAGE=0.6V MAX_NECK_LENGTH=3 MM MIN_NECK_WIDTH=0.2MM MIN_LINE_WIDTH=0.3MM NET_SPACING_TYPE=VREF =PP1V2_S2R_H4 PPVREF_DDR0_DQ MAX_NECK_LENGTH=3 MM VOLTAGE=0.6V MIN_NECK_WIDTH=0.2MM MIN_LINE_WIDTH=0.3MM NET_SPACING_TYPE=VREF =PP1V2_VDDQ_H4 PPVREF_DDR1_CA VOLTAGE=0.6V MIN_NECK_WIDTH=0.2MM MIN_LINE_WIDTH=0.3MM NET_SPACING_TYPE=VREF MAX_NECK_LENGTH=3 MM =PP1V2_S2R_H4 PPVREF_DDR1_DQ MAX_NECK_LENGTH=3 MM VOLTAGE=0.6V MIN_NECK_WIDTH=0.2MM MIN_LINE_WIDTH=0.3MM NET_SPACING_TYPE=VREF =PP1V2_VDDQ_H4 =PP1V2_S2R_H4 =PP1V8_VDDIO18_H4 =PP1V2_S2R_H4 PPVREF_DDR0_CA PPVREF_DDR0_DQ PPVREF_DDR1_DQ PPVREF_DDR1_CA DDR0_ZQ DDR1_ZQ =PP1V2_VDDQ_H4 =PP1V2_VDDIOD_H4 051-9374 13.0.0 10 OF 102 7 OF 46 2 11 2 1 2 2 1 1 2 1 2 E2 C30 B27 B24 B20 B18 B14 AN7 B10 AN4 AL2 AH2 AE2 W2 R2 M2 K2 J30 F30 B7 B4 AN16 AN12 AC30 Y30 P30 AJ1 AD30 AA30 Y1 W1 L30 AP9 AN23 AN14 A19 AN24 AN10 AJ2 AE29 AA2 M30 C1 B28 A20 F3 F1 E31 E30 E28 E24 E15 E14 E13 E12 E11 E10 E9 E8 E7 E6 E5 E4 E3 E1 D30 D27 D24 D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 C28 C25 C22 C21 C20 C19 C18 C17 C16 C15 C14 C13 C12 C11 C10 C9 C8 C7 C6 C5 C4 C3 B31 B30 B26 B23 B22 B21 AD31 A28 C2 AN21 A18 AP15 T10 L12 AP10 Y2 B19 Y31 H14 H12 H10 H8 H6 AA8 AA7 Y8 Y6 W8 G15 W7 V8 V6 U8 U7 T8 T6 R8 R7 P8 G13 P6 N8 L7 K8 K6 J16 G11 J15 J14 J13 J12 J11 J10 J8 J7 G9 G7 H19 H20 AE10 AE11 AE12 AE13 AE14 AE15 AE16 AD9 AE9 AC9 AB9 R6 R5 R4 P31 P29 P23 P21 P19 P17 P15 P13 P11 P9 P7 P5 P4 P3 P1 N30 N29 N22 N20 N18 N16 N14 N12 N10 N6 N5 N4 M29 M23 M21 M19 M17 M15 M13 M11 M9 M7 M5 M4 L31 L29 L28 L27 L26 L22 L20 L18 L16 L14 L10 L6 L5 L3 L1 K30 K29 K28 K27 K24 K23 K21 K19 K17 K15 K13 K11 K10 K9 K7 L8 M6 M8 N7 H16 J9 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 1 2 1 2 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 1 2 1 2 2 1 1 2 1 2 39 7 44 739 7 44 739 7 44 739 7 44 739 739 39 739 744 744 744 744 739 39
  • 10. (8 OF 12) VDDIOD3 VDDIOD2 VDDIOD1 VDDIO30_USB11_DM VDD_CPU VSS (10 OF 12) VDDVDD (11 OF 12) VSSVSS (12 OF 12) VSSVSS Apple Inc. THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. 124578 B D 8 7 6 5 4 3 C B A NOTICE OF PROPRIETARY PROPERTY: PAGE 12 D A C PAGE TITLE SHEET IV ALL RIGHTS RESERVED R D SIZEDRAWING NUMBER REVISION BRANCH 6 3 THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT 10MA 4.2A GRAPHICS LOWPERF APPLE MC HPERF NRT HPERF RT CDIO DISP_OUT AUDIO COMPLEX AUDIENCE DSP USB PMGR 2.4A A9 CORES L2 CACHE BIU 5MA UNUSED VDDIOD3 35MA I2C2 UART0 UART5_RTXD DP_HPD TST_CLKOUT TST_STPCLK WDOG JTAG 35MA (NAND) (SDIO <= WIFI) (UART4 <= GPIOS) CRITICAL 4.7UF X5R-CERM1 C1105 402 6.3V 20% CRITICAL C1106 20% 6.3V X5R 10UF 603 CRITICAL C1109 402 4.7UF 6.3V 20% X5R-CERM1 402 CRITICAL C1108 6.3V 4.7UF 20% X5R-CERM1 CRITICAL C1107 402 4.7UF 6.3V 20% X5R-CERM1 CRITICAL C1115 0201 6.3V X5R 0.22UF 20% C1114 0.22UF X5R CRITICAL 0201 6.3V 20% CRITICAL C1112 0201 6.3V X5R 20% 0.22UF CRITICAL C1121 0201 6.3V X5R 0.22UF 20% CRITICAL C1120 0201 6.3V X5R 0.22UF 20% CRITICAL C1119 0201 6.3V X5R 20% 0.22UF CRITICAL C1118 0.22UF X5R 0201 20% 6.3V CRITICAL C1117 0201 X5R 20% 0.22UF 6.3V CRITICAL C1116 0.22UF 0201 X5R 20% 6.3V CRITICAL C1127 0201 20% 0.22UF X5R 6.3V CRITICAL C1126 0201 20% X5R 6.3V 0.22UF CRITICAL C1125 0201 20% 0.22UF X5R 6.3V CRITICAL C1124 0201 0.22UF X5R 6.3V 20% CRITICAL C1123 0201 20% 0.22UF X5R 6.3V CRITICAL C1122 0.22UF 0201 6.3V X5R 20% C1128 01005 6.3V 10% 0.01UF X5R 402 4.7UF 20% X5R-CERM1 6.3V C1133 CRITICAL CRITICAL C1104 402 6.3V 4.7UF 20% X5R-CERM1 402 4.7UF 20% X5R-CERM1 6.3V C1132 CRITICAL 402 4.7UF 20% X5R-CERM1 6.3V C1131 CRITICAL CRITICAL C1135 402 6.3V 4.7UF 20% X5R-CERM1X5R-CERM1 20% 6.3V 4.7UF 402 C1134 CRITICAL CRITICAL C1141 0201 20% 0.22UF X5R 6.3V CRITICAL C1140 0201 20% 0.22UF X5R 6.3V CRITICAL C1139 0201 20% 0.22UF X5R 6.3V CRITICAL C1138 0201 20% 0.22UF X5R 6.3V CRITICAL C1137 0201 20% 0.22UF X5R 6.3V CRITICAL C1136 0201 6.3V X5R 20% 0.22UF CRITICAL C1144 0201 20% 0.22UF X5R 6.3V CRITICAL C1143 0201 20% 0.22UF X5R 6.3V CRITICAL C1142 0201 20% 0.22UF X5R 6.3V CRITICAL C1111 X5R 0201 6.3V 0.22UF 20% C1129 01005 6.3V 10% 0.01UF X5R C1130 01005 6.3V 10% 0.01UF X5R C1146 01005 X5R 0.01UF 10% 6.3V C1145 01005 X5R 0.01UF 10% 6.3V CRITICAL C1149 402 20% X5R-CERM1 6.3V 4.7UF CRITICAL C1151 402 20% X5R-CERM1 6.3V 4.7UF CRITICAL C1110 0.22UF 20% X5R 6.3V 0201 CRITICAL C1113 0201 6.3V X5R 0.22UF 20% C1148 01005 X5R 6.3V 10% 0.01UF U0652 OMIT H4A POP-512MB-DDR BGA U0652 OMIT BGA POP-512MB-DDR H4A U0652 OMIT POP-512MB-DDR BGA H4A U0652 OMIT BGA POP-512MB-DDR H4A C1147 01005 X5R 6.3V 10% 0.01UF SYNC_DATE=04/18/2011 AP: PWR SYNC_MASTER=N/A =PP1V8_VDDIOD3_H4 =PP1V8_NAND_H4 =PP1V8_IO_H4 =PP3V3_USB_H4 =PPVDD_CPU_H4 =PPVDD_SOC_H4 051-9374 13.0.0 11 OF 102 8 OF 46 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 K25 J25 Y24 AE24 AD24 AC24 AB24 AA24 AH27 U25 N11 M16 M12 M10 V16 L15 V14 V12 V10 T16 T14 T12 L13 R15 R13 R11 R9 P16 P14 P12 N15 F5 F4 K5 J29 J28 J27 J26 J24 G17 F20 J20 J19 J6 J5 J4 H31 H30 H29 H28 H27 H25 F19 H22 AP20 AN19 H18 H15 H13 H11 H9 H7 H5 H3 G30 G29 G28 G27 G26 G25 G24 AN11 G22 AL3 G18 G16 G14 G12 G10 G8 G6 G5 F29 F28 F26 F25 F24 F23 F21 F18 F17 F16 F15 F14 F13 F12 F11 F10 F9 F8 F7 F6 U9 U11 U13 U15 M14 N9 N13 P10 L9 L11 AF22 AF20 AF18 AE23 AE21 AE19 AE17 AD22 AD20 AD18 AD16 AD14 AD12 AD10 AC23 AC21 AC19 AC17 AC15 AC13 AC11 AB22 AB20 AB18 AB16 AB14 AB12 AB10 AA23 AA21 AA19 AA17 AA15 AA13 AA11 AA9 Y22 Y20 Y18 Y16 Y14 Y12 Y10 W23 W21 K22 W19 W17 W15 W13 W11 W9 V22 V20 V18 U23 K20 U21 U19 U17 T24 T22 T20 T18 R23 R21 R19 K18 R17 P22 P20 P18 N23 N21 N19 N17 M22 M20 K16 L23 M18 K14 L17 L19 L21 AH29 AH26 AH16 AH15 AH14 AH13 AH12 AH11 AH10 AH9 AH8 AH7 AH6 AG29 AG25 AG24 AG16 AG15 AG14 AG13 AG12 AG11 AG10 AG9 AG8 AG7 AG6 AG4 AG1 AF29 AF27 AF24 AF23 AF21 AF19 AF17 AF16 AF15 AF14 AF13 AF12 AF11 AF10 AF9 AF8 AF7 AF6 J22 AF3 AE22 AE20 AE18 AE8 AE7 AE6 AE3 AD27 AD23 AD21 AD19 AD17 AD15 AD13 AD11 AD8 AD7 AD6 AD4 AD2 AD1 AC31 AC29 AC22 AC20 AC18 AC16 AC14 AC12 AC10 AC8 AC7 AC6 AC5 AC3 AC2 AB27 AB23 AB21 AB19 AB17 AB15 AB13 AB11 AB8 AB7 AB6 AB2 AA22 AA20 AA18 AA16 AA14 AA12 AA10 AA6 AA5 AA4 AA1 Y27 Y23 Y21 Y19 Y17 Y15 Y13 Y11 Y9 Y7 Y5 Y3 W24 W22 W20 W18 W16 W14 W12 W10 W6 W5 V29 V28 V23 V21 V19 V17 V15 V13 V11 V9 V7 V5 V1 J17 H17 U28 U24 U22 U20 U18 U16 U14 U12 U10 U6 U5 U4 U3 T30 G19 T28 T23 T21 T19 T17 T15 T13 T11 T7 T5 T4 R30 R29 R28 R24 R22 R20 R18 R16 U30 V4 R14 R12 R10 AP31 AP30 AP24 AP22 AP16 AP12 AP6 AP3 AP2 AP1 AN31 AN30 AN15 AN9 AN2 AN1 AM29 AM28 AM27 AM26 AM25 AM24 AM23 V31 AM17 AM14 V30 AM8 AM5 AL27 AL26 AL25 AL24 AL23 AL22 AL21 AL18 AL15 AL12 AL11 AL9 AL8 AL7 AL6 AL5 T31 AK23 AK22 AK21 AK20 AK19 AK18 AK17 AK16 AK15 AK14 AK13 AK12 AK11 AK10 AK9 AK8 AK7 AK6 K1 AK4 AJ20 AJ16 AJ14 AJ13 AJ12 AJ11 AJ10 AJ9 AJ8 AJ7 AJ4 AJ6 AJ5 AJ3 AJ15 2 1 39 539 4639 339 39 39
  • 11. OUT OUT Apple Inc. THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. 124578 B D 8 7 6 5 4 3 C B A NOTICE OF PROPRIETARY PROPERTY: PAGE 12 D A C PAGE TITLE SHEET IV ALL RIGHTS RESERVED R D SIZEDRAWING NUMBER REVISION BRANCH 6 3 THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT EVT PROTO 2 PROTO 1 PROTO 0 BRD_REV[2-0] SINGLE-PIN NETS 1011 P105 DEV BOARD_ID[1] BOARD_ID[2] BOARD_ID[3] 3. READ S/W READ FLOW 1. SET GPIO AS INPUT 1110 FMI0/1 4/4 CS W/TEST 1011 RESERVED BOARD ID BOOT_CONFIG[2] (GPIO28) BOOT_CONFIG[0] (GPIO18) BOOT_CONFIG[1] (GPIO25) S/W READ FLOW BOOT_CONFIG[3:0] 0100 FMI0 2CS 0111 RESERVED FOR REFERENCE 0010 SPI0 W/TEST 0001 SPI3 0011 SPI3 W/TEST 1. SET GPIO AS INPUT 2. ENABLE PU AND DISABLE PD 3. READ DVT 000 010 100 011 001 JTAG 3. READ BOOT_CONFIG[3] (GPIO29) 2. DISABLE PU AND ENABLE PD NOTE: PADS USED FOR DEBUG BOOT CONFIG ID BOOT_CONFIG[3-0] 2. DISABLE PU AND ENABLE PD 1. SET GPIO AS INPUT ID[3-0] SYSTEM BOARD_ID[0] X123A X123B 1100 P106 AP 1101 P106 DEV 1110 P107 AP 1111 P107 DEV 1010 P105 AP 1111 RESERVED S/W READ FLOW BOARD REVISION 1101 FMI0/1 4/4 CS 1100 FMI0/1 2/2 CS 1010 FMI1 4CS W/TEST 0110 FMI0 4CS W/TEST 1001 FMI1 4 CS 1000 FMI1 2 CS 0101 FMI0 4CS 0000 SPI0 CURRENT SETTING -> 1100 FMI0/1 2/2 CS 5% 2.2K 01005 1/32W MF BOARD_ID_P105_P107 R1205 3 44 R1201 MF 1/32W 01005 2.2K 5% MF 1/32W 2.2K 5% 01005 R1200 5% 2.2K 01005 1/32W MF R1203 FMI_4CS_NOTEST MF 1/32W 01005 2.2K 5% BOARD_ID_DEV R1206 BOARD_ID_P106_P107 5% 2.2K 01005 1/32W MF R1204 SHORT-01005 XW0602 SHORT-01005 XW0601 SHORT-01005 XW0603 01005 1/32W MF 100 5% R1260 1/20W 5% MF 1K 201 NOSTUFF R1270 01005 1/32W 2.2K 5% MF R1213 3 01005 MF 1/32W 5% 100 R1210 R1202 2.2K 5% MF 1/32W 01005 FMI_4CS_TEST 01005 MF 1/32W 5% 100 R1211 NOSTUFF 5% 2.2K 01005 1/32W MF R1207 NOSTUFF 2.2K MF 1/32W 01005 5% R1208 5% 2.2K 01005 1/32W MF R1209 AP: MISC & ALIASES SYNC_DATE=04/11/2011SYNC_MASTER=N/A GPIO_BOOT_CONFIG1 GPIO_BOARD_REV2 GPIO_BOOT_CONFIG3 =PP1V8_H4 GPIO_BOOT_CONFIG2 GPIO_BOOT_CONFIG0 FMI0_RE_P FMI1_DQS_N NC_FMI0_DQS_NEG MAKE_BASE=TRUE NC_FMI0_RE_POS MAKE_BASE=TRUE NC_FMI1_DQS_NEG MAKE_BASE=TRUE NC_FMI1_RE_POS MAKE_BASE=TRUE NC_PMU_SHDWN MAKE_BASE=TRUE NC_JTAG_SOC_TDO MAKE_BASE=TRUE JTAG_SOC_TDO PMU_SHDWN FMI1_RE_P FMI0_DQS_N GPIO_BOARD_REV1 GPIO_BOARD_ID2 GPIO_BOARD_ID1 =PP1V8_H4 GPIO_BOARD_ID0 SOC_TST_STPCLK SOC_HOLD_RESET SOC_FAST_SCAN_CLK SOC_TESTMODE JTAG_SOC_SEL JTAG_SOC_TRST_L GPIO_BOARD_REV0 =PP1V8_S2R_MISC GPIO_FORCE_DFU GPIO_BOARD_ID3 NC_MIPI0C_CAM_REAR_DATA_N<2>NC_AP_MIPI0C_DNDATA2 MAKE_BASE=TRUE NC_MIPI0C_CAM_REAR_DATA_P<2>NC_AP_MIPI0C_DPDATA2 MAKE_BASE=TRUE NC_MIPI0C_CAM_REAR_DATA_N<3>NC_AP_MIPI0C_DNDATA3 MAKE_BASE=TRUE NC_MIPI0C_CAM_REAR_DATA_P<3>NC_AP_MIPI0C_DPDATA3 MAKE_BASE=TRUE NC_MIPI1D_AP_CLK_PNC_AP_MIPI1D_DPCLK MAKE_BASE=TRUE NC_MIPI1D_AP_CLK_NNC_AP_MIPI1D_DNCLK MAKE_BASE=TRUE NC_MIPI1D_AP_DATA_P<0>NC_AP_MIPI1D_DPDATA0 MAKE_BASE=TRUE NC_MIPI1D_AP_DATA_N<0>NC_AP_MIPI1D_DNDATA0 MAKE_BASE=TRUE NC_USB_FS_D_PNC_AP_USB11_DPD MAKE_BASE=TRUE NC_USB_FS_D_NNC_AP_USB11_DND MAKE_BASE=TRUE NC_AP_MIPI1D_DNDATA1 MAKE_BASE=TRUE NC_AP_MIPI1D_DPDATA1 MAKE_BASE=TRUE NC_MIPI1D_AP_DATA_N<1> NC_MIPI1D_AP_DATA_P<1> NC_MIPI1C_CAM_FRONT_DATA_P<1> NC_MIPI1C_CAM_FRONT_DATA_N<1>MAKE_BASE=TRUE NC_AP_MIPI1C_DPDATA1 MAKE_BASE=TRUE NC_AP_MIPI1C_DNDATA1 051-9374 13.0.0 12 OF 102 9 OF 46 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 4 4 4 346939 4 4 11 11 3 44 42 11 11 4 4 4 346939 4 3 3 3 3 4 41039 4 4 6 6 6 6 6 6 6 6 3 3 6 6 6 6
  • 12. OUT IN OUT NC OUT IN IN OUT BYPASS SCL INT SDA SWITCH_EN HOST_RESET OVP_SW_EN* CON_DET_L DN2 DP2 DN1 DP1 ACC2 ACC1 P_IN VDD_1V8 VDD_3V0 ACC_PWR JTAG_DIO UART2_RX JTAG_CLK UART1_RX UART2_TX UART0_RX UART1_TX USB0_DN UART0_TX BRICK_ID USB0_DP USB1_DN USB1_DP DIG_DN DVSS DVSS DVSS DIG_DP IN IN S G D G SYM_VER_1 D S OUT OUT ACC_DET* ENABLE POK* ACC_PWR GND VCC Apple Inc. THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. 124578 B D 8 7 6 5 4 3 C B A NOTICE OF PROPRIETARY PROPERTY: PAGE 12 D A C PAGE TITLE SHEET IV ALL RIGHTS RESERVED R D SIZEDRAWING NUMBER REVISION BRANCH 6 3 THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT PART NUMBER ALTERNATE FORPART NUMBER BOM OPTION REF DES COMMENTS: TABLE_ALT_HEAD TABLE_ALT_ITEM TABLE_5_ITEM CRITICAL BOM OPTION TABLE_5_HEAD PART# DESCRIPTIONQTY REFERENCE DESIGNATOR(S) NXP TI IC,ASIC,TRISTAR,THS7383,A1,WLCSP36 EITHER TRISTAR OR AP CAN RESET PMU TRISTAR BYPASS FOR 3V LDO AP DEBUG UART ACCESSORY UART AP USB (T’S OFF TO H4A UART4) BB DEBUG UART TRISTAR LAYOUT NOTE: ADD THERMAL GND VIAS TO U1350 TO USB BB MUX 38 3 21 42 10 0201-1 20% 10V X5R-CERM 1.0UF C1303 CRITICAL X5R-CERM 10% 4.7UF 0603 25V C1302 CRITICAL X5R-CERM 20% 0.1UF 6.3V 01005 C1300 CRITICAL 01005 X5R-CERM 0.1UF 6.3V 20% C1301 CRITICAL 01005 MF 1/32W 5% 220K R1310 74LVC1G32 SOT891 U1310 CRITICAL 01005 MF 1/32W 5% R1311 220K X5R-CERM 01005 20% 6.3V 0.1UF C1310 4 42 3 10 42 OMIT U1300 THS7383IYKAR CRITICAL WCSP 10% 201 X5R 6.3V 0.1UF C1350 CRITICAL 10 38 4 1/32W 1.00M MF 01005 1% R1320 01005 100K MF 1/32W 1% R1321 CSD68803W15 BGA Q1301CRITICAL DFN DMN26D0UFB4 Q1300 CRITICAL MF 220K 01005 1/32W 5% R1322 CRITICAL 410 NP0-C0G-CERM 8.2PF +/-0.5PF C1321 01005 16V +/-0.5PF 8.2PF NP0-C0G-CERM C1320 16V 01005 C1322 NP0-C0G-CERM +/-0.5PF 8.2PF 16V 01005 1% 0.00 1/20W MF 0201 NOSTUFF R1350 01005 1/32W 0% 0.00 MF R1370 14 0201-1 X5R-CERM 20% 1.0UF 10V C1360 CRITICAL 25V X5R 402 1UF 10% C1361 CRITICAL C1362 01005 10V X5R 470PF 10% USMD LM34904 U1350 CRITICAL IC,ASIC,TRISTAR,CBTL1608,A1,WLCSP36343S0614 1 CRITICAL COMMONU1300 343S0620 U1300COMMON343S0614 SYNC_MASTER=N/A SYNC_DATE=N/A E75 SUPPORT JTAG_SOC_TMS JTAG_SOC_TCK UART0_DEBUG_TXD UART0_DEBUG_RXD TS_HOST_RESET =PP3V0_S2R_TRISTAR PPVBUS_PROT TS_E75_DPAIR2_N NC_U1310_5 =PP1V8_S2R_TRISTAR USB_BB_D_N USB_BRICKID MIKEY_TS_N UART4_BB_TXD UART2_ACC_RXD UART2_ACC_TXD SOC_WDOG PMU_RESET_IN =PP1V8_S2R_MISC MAX_NECK_LENGTH=3 MM NET_SPACING_TYPE=PWR MIN_NECK_WIDTH=0.2MM MIN_LINE_WIDTH=0.6MM VOLTAGE=3.3V PP3V3_ACC_FET GPIO_ACC_SW_POK =PP3V3_ACC GPIO_ACC_SW_POK_L I2C0_SCL PMU_GPIO_TRISTAR_IRQ I2C0_SDA RST_SYSTEM_L TS_HOST_RESET OVP_SW_EN_L TS_CON_DET_L TS_E75_DPAIR1_N TS_ACC2 TS_ACC1 SOC_USB_D_N SOC_USB_D_P MIKEY_TS_P L81_MBUS_REF =PPVCC_MAIN_ACC_SW GPIO_ACC_SW_POK_L GPIO_ACC_SW_EN TS_E75_DPAIR2_P =PP1V8_S2R_TRISTAR MAX_NECK_LENGTH=0.5MM MIN_NECK_WIDTH=0.1MM MIN_LINE_WIDTH=0.2MM VOLTAGE=3V NET_SPACING_TYPE=PWR TRISTAR_ADD0 TS_CON_DET_L USB_BB_D_P UART4_BB_RXD TS_E75_DPAIR1_P PP3V3_ACC_FET 051-9374 13.0.0 13 OF 102 10 OF 46 2 1 2 1 2 1 2 1 1 2 2 6 1 4 35 1 2 2 1 E6 D4 C6 D3 E4 B6 D6 E3 B4 A4 B2 A2 E5 C5 F6 F3 F4 D5 B5 D1 A5 F1 D2 E1 F2 B3 E2 C2 A3 B1 A1 C4 A6 C1 F5 C3 2 1 1 2 1 2 A2 B1 C3 C2 A3 A1 B2 C1 B3 3 1 2 1 2 2 1 2 1 2 1 1 2 1 2 2 1 2 1 2 1 C2 B2 C1 A2 B1A1 344 344 444 444 39 38 38 44 1039 2144 42 1445 42144 444 444 4939 1039 410 4 15 42 44 4 15 42 44 10 38 38 44 38 38 344 344 1445 39 38 44 1039 2144 42144 38 44 10
  • 13. IN IN IN IN IN IN IN IN IN IN IN IN BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI IO0-1 IO7-1 IO6-1 IO3-1 IO4-1 IO5-1 IO1-1 IO2-1 IO7-0 IO5-0 IO6-0 IO4-0 IO2-0 IO3-0 IO1-0 IO0-0 VCC CLE1 CE1* CLE0 CE0* WE0* ALE0 RE0 RE0* DQS0* R/B0* DQS0 ALE1 WE1* RE1 RE1* DQS1 DQS1* R/B1* ZQ VREF VSSQVSS VCCQ VDDI TMSC TCKC TABLE_ALT_ITEM TABLE_ALT_ITEM PART NUMBER ALTERNATE FORPART NUMBER BOM OPTION REF DES COMMENTS: TABLE_ALT_HEAD TABLE_5_ITEM REFERENCE DESIGNATOR(S) BOM OPTION TABLE_5_HEAD QTY DESCRIPTIONPART# TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM Apple Inc. THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. 124578 B D 8 7 6 5 4 3 C B A NOTICE OF PROPRIETARY PROPERTY: PAGE 12 D A C PAGE TITLE SHEET IV ALL RIGHTS RESERVED R D SIZEDRAWING NUMBER REVISION BRANCH 6 3 THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT FLASH CONFIGURATIONS X5R 20% 0.22UF 6.3V 0201 C1414 CRITICAL 20% 0.22UF 0201 X5R 6.3V C1413 CRITICAL 01005 MF 1/32W 100K 1% R1455 CERM-X5R 10UF 6.3V 20% 0402-2 C1412 CRITICAL 6.3V 20% 10UF CERM-X5R 0402-1 C1411 CRITICAL 6.3V X5R-CERM 20% 0.1UF 01005 C141001005 0.1UF 6.3V 20% X5R-CERM C1404 20% C1402 0402-2 CERM-X5R 6.3V 10UF CRITICAL 10UF 0402-2 6.3V CERM-X5R C1401 20% CRITICAL 0402-2 CERM-X5R C1400 10UF 20% 6.3V CRITICAL 20% 0.22UF 0201 X5R 6.3V C1406 20% 0.22UF 0201 X5R 6.3V C1405 5 44 5 44 5 44 5 44 5 44 5 44 5 44 5 44 5 44 5 44 5 44 5 44 201 243 1% 1/20W MF R1454 20% X5R 6.3V 1UF 0201 C1450 CRITICAL 544 20% 0201 1UF 6.3V X5R C1451 CRITICAL 544 544 544 544 544 544 544 544 544 544 544 544 544 544 544 XXNM-XGBX8-MLC-PPN1.5-ODP OMIT LGA-12X17 U1400 CRITICAL R1460 01005 1% 1/32W MF 50K R1461 01005 1% 1/32W MF 50K 6.3V 01005 C1460 X5R 0.01UF 10% 6.3V 01005 C1461 X5R 0.01UF 10% 27PF 16V 5% 01005 NP0-C0G C1491 16V 5% 01005 NP0-C0G 27PF C1490 NP0-C0G 01005 5% 16V 27PF C1492 NP0-C0G 01005 5% 16V 27PF C1494 27PF NP0-C0G 01005 5% 16V C1493 SYNC_MASTER=MLB NAND STORAGE SYNC_DATE=05/04/2012 U1400335S0890 8GB HYNIX 20NM PPN1.5 8GB335S0889 64GB SAMSUNG 21NM PPN1.5 64GB335S0883 U1400335S0880 SAMSUNG 21NM PPN1.5 32GB32GB335S0882 U1400335S0880 SAMSUNG 21NM PPN1.5 16GB16GB335S0881 U1400335S0880 16GB SANDISK 19NM PPN1.5 16GB335S0900 U1400335S0880 U1400335S0880 64GB HYNIX 20NM PPN1.5 64GB335S0873 1 U1400335S0880 TOSHIBA 19NM PPN1.5 64GB 64GB U14001335S0879 TOSHIBA 19NM PPN1.5 32GB 32GB U14001335S0878 TOSHIBA 19NM PPN1.5 16GB 16GB 1 U1400335S0890 TOSHIBA 19NM PPN1.5 8GB 8GB U1400335S0878 16GB HYNIX 20NM PPN1.5 16GB335S0871 U1400335S0879 32GB HYNIX 20NM PPN1.5 32GB335S0872 =PP1V8_NAND NAND_RDYBSY_L =PP1V8_NAND VREF_NAND_U1400 MIN_LINE_WIDTH=0.2MM NET_SPACING_TYPE=PWR MAX_NECK_LENGTH=3MM MIN_NECK_WIDTH=0.1MM VOLTAGE=1.2V PPVDDI_NAND_U1400 =PP3V3_NAND FMI_ZQ_U1400 FMI1_CLE FMI1_CE0_L FMI0_CLE FMI0_CE0_L FMI0_WE_L FMI0_ALE FMI0_RE_P FMI0_RE_N FMI0_DQS_N FMI0_DQS_P FMI1_ALE FMI1_WE_L FMI1_RE_P FMI1_RE_N FMI1_DQS_P FMI1_DQS_N TP_TMSC_U1400 TP_TCKC_U1400 FMI0_AD<2> FMI0_AD<3> FMI0_AD<6> FMI0_AD<7> FMI1_AD<0> FMI1_AD<1> FMI1_AD<2> FMI1_AD<3> FMI1_AD<4> FMI1_AD<5> FMI1_AD<6> FMI1_AD<7> FMI0_AD<5> FMI0_AD<0> FMI0_AD<1> FMI0_AD<4> 051-9374 13.0.0 14 OF 102 11 OF 46 2 1 2 1 1 2 2 1 2 1 2 12 1 2 1 2 1 2 1 2 1 2 1 1 2 2 1 2 1 G1 G7 J7 N3 N5 L7 J1 L1 H6 K6 J5 L5 J3 K2 H2 G3 F2 M6 B6 C3 C5 A3 A5 E3 C1 B4 C7 F4 E5 H4 D2 E1 D4 D6 M4 K4 E7 A1 G5 OA8 OF8 G0 OE0 OD8 OC8 N7 OE8 OD0 OC0 A7 M2 L3 F6 B2 OF0 G8 N1 OB8 OB0 OA0 1 2 1 2 2 1 2 1 2 1 2 1 2 1 2 1 2 1 11 39 11 39 39 9 9 9 9
  • 14. CAP ON S D VDD GND Apple Inc. THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. 124578 B D 8 7 6 5 4 3 C B A NOTICE OF PROPRIETARY PROPERTY: PAGE 12 D A C PAGE TITLE SHEET IV ALL RIGHTS RESERVED R D SIZEDRAWING NUMBER REVISION BRANCH 6 3 THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT LAYOUT NOTE: PUT THERMAL VIAS AROUND U2200 IN CASE OF SHORTED CONDITION (PLUG - FLEX 998-4527) TOUCH SUBSYSTEM RCPT - MLB 998-4526 -> 516S1054 01005 MF 1/32W 0% 0.00 R1752 F-ST-SM-1 CRITICAL 503304-2010 J1700 01005 1% 1.00K 1/32W R1790 MF MF R1780 0% 1/32W 01005 0.00 0.00 1/32W 0% MF R1753 01005 01005 16V NP0-C0G 5% 27PF NOSTUFF C1761 C1702 16V 1000PF 201 X7R 10% C1701 402 1UF 10% 10V X5R C1700 5% NP0-C0G 16V 01005 27PF 240OHM-350MA 0201 L1700 C1705 10% 16V X7R 201 1000PF C1704 0201 1UF 20% 6.3V X5R C1708 10% 16V X7R 201 1000PF C1707 0201 1UF 20% 6.3V X5R 01005 C1703 NP0-C0G 16V 27PF 5% 240OHM-350MA 0201 L1701 L1702 0201 240-OHM-0.2A-0.8-OHM C1706 16V NP0-C0G 27PF 5% 01005 L1750 NOSTUFF 240-OHM-0.2A-0.8-OHM 0201 CRITICAL C1752 0201 20% 1UF X5R 6.3VCRITICAL SLG5AP302 TDFN U1700 CRITICAL 16V X5R-CERM 0.1UF 10% 0201 C1750 201 4700PF 10V X7R 10% C1751 CRITICAL 01005 1/32W MF R1751 100K 1% CRITICAL 10V X5R-CERM 0402-2 20% C1753 10UF NOSTUFF R1750 169K 1/20W MF 1% 201 L1760 150OHM-25%-200MA-0.7DCR 01005 01005 16V NP0-C0G 5% 27PF C1760 SYNC_MASTER=N/A TOUCH: FLEX CONNECTOR SYNC_DATE=06/21/2010 PMU_GPIO_HALL_IRQ_2 PMU_GPIO_HALL_IRQ_4 GPIO_BTN_HOME_FILT_L SPI1_GRAPE_SCLK_RSPI1_GRAPE_SCLK GPIO_BTN_HOME_R_L DISPLAY_SYNC_RDISPLAY_SYNC =PP1V8_GRAPE PP3V0_S2R_HALL_FILT PMU_GPIO_HALL_IRQ_1 GPIO_BTN_HOME_FILT_L SPI1_GRAPE_MISO PP5V25_GRAPE_FILT VOLTAGE=5.25V MIN_LINE_WIDTH=0.6 mm MIN_NECK_WIDTH=0.2 mm NET_SPACING_TYPE=PWR MAX_NECK_LENGTH=3 MM =PP5V25_GRAPE =PP1V8_S2R_GRAPE PP1V8_GRAPE_FILT MAX_NECK_LENGTH=3 MM NET_SPACING_TYPE=PWR VOLTAGE=1.8V MIN_NECK_WIDTH=0.2 mm MIN_LINE_WIDTH=0.6 mm VCC_MAIN_GRAPE_RAMP MAX_NECK_LENGTH=3 MM NET_SPACING_TYPE=PWR MIN_LINE_WIDTH=0.6 mm MIN_NECK_WIDTH=0.2 mm PP3V0_S2R_HALL_FILT VOLTAGE=3.0V =PP3V0_S2R_HALL GPIO_BTN_HOME_L PP5V25_GRAPE_FILT PP1V8_GRAPE_FILT SPI1_GRAPE_CS_L SPI1_GRAPE_MOSI PP1V8_S2R2GRAPE VOLTAGE=1.8V MIN_LINE_WIDTH=0.30 MM MIN_NECK_WIDTH=0.20 MM NET_SPACING_TYPE=PWR MAX_NECK_LENGTH=3 MM PMU_GPIO_HALL_IRQ_3 GPIO_GRAPE_IRQ_L GPIO_GRAPE_RST_L AP_CLK_32K_CUMULUS =PPVCC_MAIN_GRAPE =PP1V8_GRAPE =PP5V25_GRAPE MAIN2GRAPE_ON 051-9374 13.0.0 17 OF 102 12 OF 46 1 2 13 17 24 23 19 11 15 9 7 5 1 3 18 20 12 14 16 8 10 6 4 2 22 21 1 2 1 2 1 2 2 1 2 1 2 1 2 1 21 2 1 2 1 2 1 2 1 2 1 21 21 2 1 21 2 1 7 2 5 3 18 2 1 2 11 2 2 1 1 2 21 2 1 42 42 12 44444 6 1239 12 42 12 444 121239 39 12 1239 442 12 12 444 444 42 4 4 444 39 1239 1239
  • 15. Apple Inc. THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. 124578 B D 8 7 6 5 4 3 C B A NOTICE OF PROPRIETARY PROPERTY: PAGE 12 D A C PAGE TITLE SHEET IV ALL RIGHTS RESERVED R D SIZEDRAWING NUMBER REVISION BRANCH 6 3 THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT AUDIO_JACK_FLEX MIC2 AUDIO_JACK_FLEX MIC1 AUDIO_JACK_FLEX RET2 AUDIO_JACK_FLEX RET1 PER DAVE BREECE P/N 510S0760 - MLB (P/N 510S0761 - FLEX) CRITICAL F-ST-SM-COMBO AA07-S016VA1 J1800 L1800 240-OHM-0.2A-0.8-OHM 0201 01005 5% 27PF 16V NP0-C0G C1800 C1801 201 X5R 6.3V 10% 0.1UF NP0-C0G 16V 27PF 5% 01005 C1802 1/32W MF 0.00 0% R1850 01005 NOSTUFF C1850 01005 5% 27PF 16V NP0-C0G C1821 56PF NP0-C0G 16V 5% 0100501005 C1820 56PF NP0-C0G 16V 5% 01005 C1822 56PF NP0-C0G 16V 5% AUDIO JACK FLEX CONN SYNC_MASTER=N/A SYNC_DATE=03/31/2011 =PP1V8_DMIC DMIC1_FF_SCLK CONN_HP_HEADSET_DET CONN_HP_LEFT_FILT CONN_HP_RIGHT_FILT CONN_HP_HS3_FILT CONN_HP_HS4_FILT MAX_NECK_LENGTH=3 MM MIN_NECK_WIDTH=0.2 mm VOLTAGE=1.8V PP1V8_DMIC_CONN MIN_LINE_WIDTH=0.6 mm NET_SPACING_TYPE=PWR DMIC1_FF_SCLK_CONN DMIC1_FF_SD CONN_HP_HS3_REF_FILT CONN_HP_HS4_REF_FILT VOLTAGE=2.65V MIN_NECK_WIDTH=0.06 MMPP_LDO14_2P65 ANT_PORTB_1 ANT_PORTB_2 ANT_PORTB_3 051-9374 13.0.0 18 OF 102 13 OF 46 20 19 18 17 15 13 11 9 7 1 16 14 12 10 8 6 4 2 5 3 21 2 1 2 1 2 1 1 2 2 1 2 1 2 1 2 1 39 1445 14 14 14 14 14 45 1445 14 14 2122273235 2125 2125 2125
  • 16. IN IN IN IN IN IN IN IN IN IN IN OUT OUT IN OUT IN OUT OUT IN IN IN OUT IN BI BI OUT OUT SYM 2 OF 2 DMIC1_SCLK DMIC2_SD MCLK GND13 GND0 TSTI2 TSTI1 TSTI0 GND18 GND17 GND16 GND15 GND14 GND12 GND11 GND10 GND9 GND8 GND7 GND6 GND5 GND4 GND3 GND2 GND1 RESET* WAKE* INT* CDOUT CDIN CCLK XSP_SDOUT XSP_SDIN_DAC2_MUTE XSP_LRCK_FSYNC XSP_SCLK ASP_SDOUT ASP_SDIN ASP_LRCK ASP_SCLK DMIC2_SCLK DMIC1_SD CS* MBUS_REF SYM 1 OF 2 FLYP MIC4_BIAS_FILT AIN3+ AIN1- FLYN GNDA MIC1_BIAS MIC2_BIAS_FILT_IN MIC2_BIAS_FILT MIC2_BIAS AIN2+ AIN2M MIC2_BIAS_IN AIN3- MIC3_BIAS MIC3_BIAS_FILT AIN4+ AIN4- MIC4_BIAS GNDP GNDD GNDHS +VCP_FILT FILT- FILT+ LINEOUT_REF LINEOUTB LINEOUTA HPDETECT HS4_REF HS3_REF HS4 HS3 HPOUTB HPOUTA DN DP AOUT2- AOUT2+ AOUT1_M AOUT1+ GNDCP -VCP_FILT VA VCP1 VD VP0 VL VP1 VPROG_CP VPROG_MB SPEAKER_VQ AIN1+ MIC1_BIAS_FILT GNDHS FLYC VCP0 IN IN PART NUMBER ALTERNATE FORPART NUMBER BOM OPTION REF DES COMMENTS: TABLE_ALT_HEAD TABLE_ALT_ITEM Apple Inc. THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. 124578 B D 8 7 6 5 4 3 C B A NOTICE OF PROPRIETARY PROPERTY: PAGE 12 D A C PAGE TITLE SHEET IV ALL RIGHTS RESERVED R D SIZEDRAWING NUMBER REVISION BRANCH 6 3 THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT DIGITAL MIC TO HEADPHONE JACK PLACE L1900 TO 1905 CLOSE TO THE HP CONNECTOR U1900 DECAPS CHANGED ON 5/24/12 PER RADAR #11485846 NOTE: PLACE R1930 & R1931 CLOSE TO U3600 MIKEY BUS FILTER 13 CRITICAL 4.7UF 402 20% 6.3V X5R C1910 NOSTUFF SHORT-8L-0.25MM-SM XW1900 CRITICAL 20% X5R 4.7UF C1907 402 6.3V CRITICAL 4.7UF X5R 20% 402 6.3V C1908 R1912 MF1/32W 5% 01005 22 R1913 010055%1/32W MF 22 1345 1345 444 444 R19101/32W 5% MF 01005 22 1/32W R1911 22 5% 01005MF 444 444 444 444 444 444 444 444 444 444 444 4 42 42 4.7UF 402 20% 6.3V X5R C1912 R1901 1% 2.21K 201 1/20W MF 20% X5R 1.0UF 6.3V 0201-MUR C1911 R1940 NOSTUFF 01005 MF 1/32W 5% 1.00K 13 13 NOSTUFF 5% MF 1/20W 201 0 R1914 10 14 1014 CRITICAL X5R 6.3V 10% 402 NOSTUFF 2.2UF C1918 SHORT-8L-0.25MM-SM NOSTUFF XW1902 10% 201 X5R 0.01UF 10V C1916 10V 201 10% X5R 0.01UF C1917 NOSTUFF SHORT-8L-0.25MM-SM XW1903 1/20W 201 12 MF 5% R1931 12 1/20W 201 MF 5% R1930 SIGNAL_MODEL=EMPTY 100PF NP0-CERM 0201 25V 5% C1932 NOSTUFF 25V NP0-CERM 0201 100PF 5% C1931 SIGNAL_MODEL=EMPTY 0201 100PF 25V NP0-CERM 5% C1930 10 45 10 45 0201 FERR-33-OHM-0.8A-0.09-OHM L1900 0201 FERR-33-OHM-0.8A-0.09-OHM L1901 0201 FERR-33-OHM-0.8A-0.09-OHM L1902 0201 FERR-33-OHM-0.8A-0.09-OHM L1903 120-OHM-210MA 01005 L1904 01005 120-OHM-210MA L1905 13 13 5% 100PF NP0-C0G 16V 01005 C1990 01005 16V NP0-C0G 100PF 5% C1991 R1950 201 1.00 1% 1/20W MF C1951 CRITICAL 1.0UF 0201-MUR 20% 6.3V X5R 6.3V X5R 402 20% CRITICAL C1950 4.7UF 201 R1951 MF 1/20W 1% 1.00 201 255K R1952 1% 1/20W MF C1913 10V X5R-CERM 0201 10% 0.1UF 201 R1953 0 MF 1/20W 5% NOSTUFF 0 1/20W MF 5% R1954 201 CS42L81-CWZR-A1 WLCSP U1900 CS42L81-CWZR-A1 U1900 WLCSP CRITICAL 10% C1914 10V X5R-CERM 0201 0.1UF C1909 0402 10V 20% 4.7UF X5R-CERM CRITICAL 0.1UF 10% 0201 X5R-CERM 10V C1904 0.1UF C1915 01005 X5R-CERM 6.3V 20% C1902 0.1UF 20% 6.3V X5R-CERM 01005 X5R 6.3V 20% 0201-MUR 1.0UF C1903 CRITICAL 20% 402 X5R C1901 6.3V 4.7UF CRITICAL 402 20%6.3V X5R 4.7UF C1905 X5R402 6.3V 4.7UF 20% C1906 13 0201 240-OHM-0.2A-0.8-OHM L1920 NOSTUFF 201 X7R 10V 10% 4700PF C1920MF 5% 1/32W 3.3K 01005 R1920 13 SYNC_MASTER=KAVITHA AUDIO: L81 CODEC SYNC_DATE=01/18/2012 RADAR:11100717L1904,L1905155S0453155S0773 MIKEY_TS_N MIKEY_TS_PL81_MBUS_P L81_MBUS_N =PP1V7_VA_VCP 0.30MML81_PVCP 0.15MM CODEC_HP_HS4_REF MIN_LINE_WIDTH=0.15MM MIN_NECK_WIDTH=0.1MM L81_MBUS_REF GND_AUDIO_CODEC MIN_LINE_WIDTH=0.15MM MIN_NECK_WIDTH=0.1MM CODEC_HP_HS3_REF L82_MIC2_BIAS_FILT AIN1P NO_TEST=TRUE MIN_LINE_WIDTH=0.15MM CONN_HP_HS4_REF_FILT MIN_NECK_WIDTH=0.1MM CONN_HP_HS3_REF_FILT MIN_LINE_WIDTH=0.15MM MIN_NECK_WIDTH=0.1MM NO_TEST=TRUE NC_CODEC_LINE_OUT_L NC_CODEC_LINE_OUT_RNO_TEST=TRUE L81_SPEAKER_VQ NO_TEST=TRUE NC_RIGHT_CH_OUT_N L81_NVCP 0.15MM 0.30MMNO_TEST=TRUENC_LEFT_CH_OUT_P AIN4P NO_TEST=TRUE HP_MIC_N HP_MIC_PCODEC_HP_HS4_REF NO_TEST=TRUEMIC4_BIAS_FILT CODEC_HP_DET L81_FILT NO_TEST=TRUENC_LEFT_CH_OUT_N CODEC_HP_DET CONN_HP_HEADSET_DET AIN3P NO_TEST=TRUE AIN3N NO_TEST=TRUE NO_TEST=TRUEMIC3_BIAS_FILT L81_AIN2_P AIN4N NO_TEST=TRUE NC_RIGHT_CH_OUT_PNO_TEST=TRUE L81_MBUS_N NO_TEST=TRUEMIC1_BIAS_FILT AIN1N NO_TEST=TRUE MIN_NECK_WIDTH=0.20MM CONN_HP_HS4_FILT MIN_LINE_WIDTH=0.50MM CODEC_HP_DET_R MIN_NECK_WIDTH=0.15MM CONN_HP_LEFT_FILT MIN_LINE_WIDTH=0.20MM CONN_HP_RIGHT_FILT MIN_LINE_WIDTH=0.20MM MIN_NECK_WIDTH=0.15MM MIN_NECK_WIDTH=0.20MM MIN_LINE_WIDTH=0.50MM CONN_HP_HS3_FILT L81_MBUS_P MIN_LINE_WIDTH=0.20MMCODEC_HP_LEFT MIN_NECK_WIDTH=0.15MM CODEC_HP_HS4 MIN_NECK_WIDTH=0.20MMMIN_LINE_WIDTH=0.50MM CODEC_HP_HS3 MIN_NECK_WIDTH=0.20MMMIN_LINE_WIDTH=0.50MM MIN_NECK_WIDTH=0.15MMMIN_LINE_WIDTH=0.20MMCODEC_HP_RIGHT GND_AUDIO_CODEC CODEC_HP_HS3_REF L81_AIN2_N L81_MIC2_BIAS_FILT_IN L81_MIC2_BIAS_IN MIC3_BIAS_FILT MIC4_BIAS_FILT MIC1_BIAS_FILT AIN1P AIN1N AIN3N AIN3P CODEC_AIN MAKE_BASE=TRUE AIN4N AIN4P NC_MIC1_BIAS NO_TEST=TRUE NO_TEST=TRUENC_MIC3_BIAS NC_MIC4_BIAS NO_TEST=TRUE MAKE_BASE=TRUE CODEC_MIC_BIAS_FILT L81_MIC2_BIAS =PP1V8_AUDIO PMU_GPIO_CODEC_RST_L L81_DMIC1_FF_SCLK I2S0_CODEC_ASP_MCK PMU_GPIO_CODEC_HS_IRQ_L GPIO_CODEC_IRQ_L SPI2_CODEC_MISO SPI2_CODEC_MOSI SPI2_CODEC_SCLK I2S2_CODEC_XSP_DOUT I2S2_CODEC_XSP_LRCK I2S2_CODEC_XSP_BCLK I2S0_CODEC_ASP_DOUT I2S0_CODEC_ASP_LRCK I2S0_CODEC_ASP_BCLK NO_TEST=TRUENC_DMIC2_SCLK L81_DMIC1_FF_SD SPI2_CODEC_CS_L L81_MBUS_REF I2S0_CODEC_ASP_DIN I2S0_CODEC_ASP_SDOUT DMIC1_FF_SD DMIC1_FF_SCLK I2S2_CODEC_XSP_DIN I2S2_CODEC_XSP_SDOUT =PP1V8_AUDIO GND_AUDIO_CODEC GND_AUDIO_CODEC VOLTAGE=0V GND_AUDIO_CODEC 0.20MM 0.15MM PP1V7_VCP VOLTAGE=1.7V MIN_LINE_WIDTH=0.3MM MIN_NECK_WIDTH=0.15MM PPVCC_VPROG_MB_F VOLTAGE=4.2V MIN_LINE_WIDTH=0.3MM MIN_NECK_WIDTH=0.15MM 0.3MM 0.15MM L81_FLYN 0.3MM 0.15MM L81_FLYC 0.3MM 0.15MM L81_FLYP =PPVCC_MAIN_AUDIO PPVCC_VPROG_CP MIN_NECK_WIDTH=0.15MM MIN_LINE_WIDTH=0.3MM VOLTAGE=4.2V MIN_NECK_WIDTH=0.15MM MIN_LINE_WIDTH=0.3MM VOLTAGE=4.2V PPVCC_VPROG_MB =PP3V0_SPARE1 051-9374 13.0.0 19 OF 102 14 OF 46 2 1 21 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 2 1 1 2 1 2 2 1 2 1 1 2 1 22 1 1 2 1 2 2 1 2 1 2 1 21 21 21 21 21 21 2 1 2 1 1 2 2 1 2 1 1 2 1 2 2 1 1 2 1 2 B2 B7 C8 G5 C6 D4 C7 C4 J5 H7 H5 G7 G6 F8 F7 F6 F5 E7 E6 E5 D8 D7 D6 D5 D3 C9 B10 B9 A7 B8 A6 A4 A5 B5 B4 A1 A2 B3 A3 B6 B1 C5 K5 H10 F2 C3 E4 K10 G2 H2 K3 F3 G4 C1 D1 J3 C2 H4 G3 D2 E2 F4 E10 A10 J2 H9 F1 E1 H6 J6 K6 H8 J7 K7 K1 J1 K8 J8 K4 J4 D9 D10 F9 F10 J9 K9 G1 G9 A9 E8 A8 E9 G10 H1 C10 E3 H3 K2 J10 G8 2 1 2 1 2 1 2 1 2 1 2 1 2 1 12 12 21 2 1 1 2 1445 1445 1539 14 14 14 14 14 45 4514 14 14 14 14 14 14 45 14 14 45 14 14 14 45 14 14 45 14 14 14 14 14 14 14 14 14 1439 45 45 44 44 1439 14 14 14 1539 39
  • 17. 15 OF 46 FILT+ SCL VP SDA VA ADO VBST SW GNDA IREF+ OUT+ OUT- ISENSE+ ISENSE- VSENSE+ VSENSE- LDO_FILT GNDP INT* RESET* ALIVE MCLK SCLK LRCK/FSYNC SDIN SDOUT VER1 FILT+ SCL VP SDA VA ADO VBST SW GNDA IREF+ OUT+ OUT- ISENSE+ ISENSE- VSENSE+ VSENSE- LDO_FILT GNDP INT* RESET* ALIVE MCLK SCLK LRCK/FSYNC SDIN SDOUT VER1 Apple Inc. THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. 124578 B D 8 7 6 5 4 3 C B A NOTICE OF PROPRIETARY PROPERTY: PAGE 12 D A C PAGE TITLE SHEET IV ALL RIGHTS RESERVED R D SIZEDRAWING NUMBER REVISION BRANCH 6 3 THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT CRITICAL BOM OPTION TABLE_5_HEAD PART# DESCRIPTIONQTY REFERENCE DESIGNATOR(S) TABLE_5_ITEM RIGHT SPEAKER AMP TBD: PLACEHOLDER FOR SPM3010T-XXX SPEAKER CONNECTOR PLACE XWS CLOSE TO CONNECTOR TBD: PLACEHOLDER FOR SPM3010T-XXX I2C ADDRESS: 1000001X LEFT SPEAKER AMP I2C ADDRESS: 1000000X L2050 TFA302610A-SM 2.2UH-20%-3.3A-0.11OHM C2072 NP0-C0G 01005 NOSTUFF CRITICAL 5% 16V 100PF U2040 WLCSP CS35L19B-CWZR U2050 WLCSP CS35L19B-CWZR NOSTUFF C2061 16V CERM 5% 18PF 01005 NOSTUFF C2081 CERM 16V 5% 18PF 01005 CRITICAL C2094 0402-1 X5R-CERM 20% 10V 10UF C2092 X5R-CERM 0.1UF 10% 10V 0201 C2093 0201 10V 10% 0.1UF X5R-CERM CRITICAL C2095 10UF 10V 20% 0402-1 X5R-CERM CRITICAL C2091 10UF 10V 20% 0402-1 X5R-CERM CRITICAL C2090 10V 20% 10UF 0402-1 X5R-CERM C2054 10V 0201 10% 0.1UF X5R-CERM CRITICAL C2055 603 X5R 10V 20% 10UF NOSTUFF 01005 18PF 5% 16V CERM C2084 R2051 201 MF 1% 44.2K 1/20W 0% 0.00 MF 01005 1/32W R2053 C2056 201 10% X5R 6.3V 0.1UF CRITICAL C2058 4.7UF X5R-CERM1 6.3V 20% 402 CRITICAL C2057 4.7UF 402 20% X5R-CERM1 6.3V NOSTUFF 01005 18PF 5% 16V CERM C2064 R2041 201 MF 1% 1/20W 44.2K 1/32W 0% 0.00 MF 01005 R2043 CRITICAL C2048 4.7UF X5R-CERM1 402 20% 6.3V CRITICAL C2041 X5R-CERM 4.7UF 10V 0402 20% CRITICAL C2051 0402 10V 20% 4.7UF X5R-CERM CRITICAL C2043 X5R-CERM 4.7UF 10V 0402 20% CRITICAL L2040 TFA302610A-SM 2.2UH-20%-3.3A-0.11OHM C2044 X5R-CERM 0.1UF 10V 0201 10% C2045 10UF X5R 603 20% 10V CRITICAL C2046 X5R 6.3V 0.1UF 10% 201 CRITICAL C2047 20% 6.3V X5R-CERM1 402 4.7UF CRITICAL R2050 1% 0.100 0805 1/4W MF 0% 0.00 MF 1/32W 01005 R2052 OMIT FL2050 0603 220-OHM-2.0A OMIT FL2051 0603 220-OHM-2.0A NOSTUFF C2080 10% 6.3V 0.01UF 01005 X5R NOSTUFF CERM 16V 18PF 5% 01005 C2059 NOSTUFF C2086 01005 3.9PF +/-0.1PF NP0-C0G 16V NOSTUFF C2050 16V 01005 5% 18PF CERM NOSTUFF C2083 01005 3.9PF +/-0.1PF NP0-C0G 16V OMIT FL2040 0603 220-OHM-2.0A CRITICAL R2040 0.100 0805 1/4W MF 1% 1/32W 0% 0.00 MF 01005 R2042 NOSTUFF C2060 6.3V 10% 01005 X5R 0.01UF CRITICAL C2052 X5R-CERM 4.7UF 0402 10V 20% OMIT FL2041 0603 220-OHM-2.0A NOSTUFF CERM 16V 18PF 5% 01005 C2049 NOSTUFF C2066 01005 3.9PF +/-0.1PF NP0-C0G 16V NOSTUFF C2040 01005 5% 18PF CERM 16V NOSTUFF C2063 01005 +/-0.1PF NP0-C0G 16V 3.9PF NOSTUFF C2068 01005 5% 100PF NP0-C0G 16V NOSTUFF C2067 01005 5% 100PF NP0-C0G 16V NOSTUFF C2088 01005 5% 100PF NP0-C0G 16V NOSTUFF C2087 01005 5% 100PF NP0-C0G 16V R2054 01005 10K 5% MF 1/32W R2055 01005 10K 5% MF 1/32W CRITICAL C2053 20% 10V 0402 4.7UF X5R-CERM XW2077 SM SIGNAL_MODEL=EMPTY XW2076 SM SIGNAL_MODEL=EMPTY XW2075 SM SIGNAL_MODEL=EMPTY XW2074 SM SIGNAL_MODEL=EMPTY R2044 01005 MF 5% 10K 1/32W NOSTUFF C2070 CRITICAL 100PF 16V 5% 01005 NP0-C0G R2045 01005 10K 5% MF 1/32W C2071 NP0-C0G 100PF 01005 5% 16V NOSTUFF CRITICAL C2073 CRITICAL NP0-C0G NOSTUFF 100PF 01005 5% 16V 4 RES,MF,1/10W,0 OHM,5%,0603,SMD,LF FL2040,FL2041,FL2050,FL2051113S0022 SYNC_DATE=01/18/2012 AUDIO: CS35L19A AMPS SYNC_MASTER=KAVITHA PP1V7_VA_VCP GPIO_SPKAMP_RIGHT_IRQ_L I2C0_SCL SPKR_R_CONN_N SPKR_R_N MIN_NECK_WIDTH=0.2 MM MIN_LINE_WIDTH=0.5 MM SPKR_L_CONN_N SPKR_L_N MIN_LINE_WIDTH=0.5 MM MIN_NECK_WIDTH=0.2 MM MIN_LINE_WIDTH=0.5 MM MIN_NECK_WIDTH=0.2 MM SPKR_R_P I2C0_SDA L19_R_IREF GPIO_SPKAMP_RST_L L19_L_FILT =PP1V7_VA_VCP L19_L_SWITCH L19_L_IREF SPKR_L_SES_P SPKR_L_SES_N SPKR_L_VSENSE_P_FILT SPKR_L_VSENSE_N_FILT L19_L_LDO_FILT GPIO_SPKAMP_LEFT_IRQ_L I2S1_SPKAMP_BCLK I2S1_SPKAMP_LRCK I2S1_SPKAMP_DOUT I2S1_SPKAMP_DIN L19_R_FILT =PP1V7_VA_VCP SPKR_R_SES_P SPKR_R_SES_N SPKR_R_VSENSE_P_FILT L19_R_LDO_FILT GPIO_SPKAMP_KEEPALIVE I2S1_SPKAMP_LRCK SPKR_R_VSENSE_P SPKR_R_VSENSE_N SPKR_L_VSENSE_N SPKR_R_VSENSE_N SPKR_R_VSENSE_P SPKR_L_VSENSE_N SPKR_L_VSENSE_P SPKR_R_CONN_P SPKR_L_CONN_N SPKR_R_CONN_P SPKR_R_CONN_N SPKR_L_CONN_P SPKR_L_CONN_P SPKR_L_VSENSE_P I2C0_SDA L19_R_SWITCH MIN_NECK_WIDTH=0.2 MM MIN_LINE_WIDTH=0.5 MM SPKR_R_FLR MIN_NECK_WIDTH=0.2 MM MIN_LINE_WIDTH=0.5 MM SPKR_L_FLR SPKR_L_P MIN_NECK_WIDTH=0.2 MM MIN_LINE_WIDTH=0.5 MM I2S1_SPKAMP_MCK GPIO_SPKAMP_KEEPALIVE I2C0_SCL GPIO_SPKAMP_RST_L I2S1_SPKAMP_MCK I2S1_SPKAMP_BCLK I2S1_SPKAMP_DOUT L19_R_VBOOST =PPVCC_MAIN_AUDIO L19_L_VBOOST I2S1_SPKAMP_DIN =PPVCC_MAIN_AUDIO SPKR_R_VSENSE_N_FILT 20 OF 102 13.0.0 051-9374 4 OF 4 21 2 1 F2 D1 D6 A4 B1 C1 D5 F5 C7 A5 A1 A2 D4 F4 F3 B5 B6 C6 E4 C4 C3 B4 B3 B7 D2 C2 E1 F1 E2 E3 C5 D3 A3 A7 A6 D7 E7 E6 F6 F7 E5 B2 F2 D1 D6 A4 B1 C1 D5 F5 C7 A5 A1 A2 D4 F4 F3 B5 B6 C6 E4 C4 C3 B4 B3 B7 D2 C2 E1 F1 E2 E3 C5 D3 A3 A7 A6 D7 E7 E6 F6 F7 E5 B2 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 1 2 1 2 2 1 1 2 1 2 2 1 1 2 1 2 1 2 2 1 2 1 2 1 21 2 1 2 1 2 1 1 2 1 2 1 2 21 21 1 2 2 1 2 1 2 1 2 1 21 1 2 1 2 1 2 2 1 21 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 1 2 1 2 2 1 1 2 1 2 1 2 1 2 1 2 2 1 1 2 2 1 2 1 14 93 4 444 24 51 01 15 38 45 15 38 45 444 24 51 01 415 14 15 39 4 444 51 444 51 444 51 444 51 14 15 39 415 444 51 15 15 15 15 15 15 15 15 38 45 54 83 51 54 83 51 54 83 51 54 83 51 15 38 45 15 444 24 51 01 444 51 415 444 24 51 01 415 444 51 444 51 444 51 93 51 41 444 51 93 51 41
  • 18. IN IN IN SYM_VER-2 SYM_VER-2 IN IN IN IN IN IN IN IN IN IN IN IN SYM_VER-2 SYM_VER-2 IN INSYM_VER-2 GND VDD D SON CAP PART NUMBER ALTERNATE FORPART NUMBER BOM OPTION REF DES COMMENTS: TABLE_ALT_HEAD Apple Inc. THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. 124578 B D 8 7 6 5 4 3 C B A NOTICE OF PROPRIETARY PROPERTY: PAGE 12 D A C PAGE TITLE SHEET IV ALL RIGHTS RESERVED R D SIZEDRAWING NUMBER REVISION BRANCH 6 3 THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT TABLE_ALT_ITEM P/N 998-4669 -> 516S1056LAYOUT NOTE: PUT THERMAL VIAS AROUND U2200 IN CASE OF SHORTED CONDITION MIPI CONNECTOR FERR-120-OHM-1.5A 0402 L2201 CRITICAL 0402-2 10UF 20% 10V X5R-CERM C2202 0.1UF 0201 16V 10% X5R-CERM C2203 CRITICAL 10% 25V X7R-CERM 0201 C2220 820PF 0201 NP0-CERM 25V 100PF 5% C2233 01005 27PF 16V 5% C2230 NP0-C0G 5% NP0-C0G 16V 27PF 01005 C2232 L2200 0402 FERR-240-OHM-25%-300MA 16V 10% 201 X7R 1000PF C2206 42 42 42 90-OHM-50MA TCM0605-1 L2212 CRITICAL 90-OHM-50MA TCM0605-1 L2202 CRITICAL 6 45 6 45 6 45 6 45 C2240 X5R-CERM 16V 0.1UF 10% 0201 CRITICAL 201 MF 1% 100K 1/20W R2205 4 10% X7R 50V 0402 3900PF C2241 CRITICAL 42 42 42 5% 16V NP0-C0G 27PF 01005 C2242 6 45 6 45 6 45 6 45 TCM0605-1 90-OHM-50MA L2232 CRITICAL 90-OHM-50MA TCM0605-1 L2222 CRITICAL 5% 27PF NP0-C0G 25V 0201 C2250 201 2.7K MF R2260 5% 1/20W F-ST-SM-1 CRITICAL J2201 AA07A-S032-VA1 6 45 6 45 CRITICAL L2233 90-OHM-50MA TCM0605-1 SLG5AP304V U2200 CRITICAL TDFN L2202,L2212,L2222,L2232,L2233,L2610,L2611,L2910,L2911,L2912,L5703,L5704 RADAR:11100629155S0667 155S0583 VIDEO: MIPI CONNECTOR SYNC_DATE=N/ASYNC_MASTER=N/A =PPVCC_MAIN_LCD MIN_NECK_WIDTH=0.20 MM MIN_LINE_WIDTH=0.30 MM VOLTAGE=4.5V PPVCC_MAIN_LCD_SWGPIO_MLC_PWR_EN VCC_MAIN_LCD_RAMP WLED_STRING1 WLED_STRING6 MAX_NECK_LENGTH=3 MM NET_SPACING_TYPE=PWR VOLTAGE=20.4V MIN_NECK_WIDTH=0.2 MM MIN_LINE_WIDTH=0.6 MM PPLED_BACK_REG MIPI0D_CLK_P MIPI0D_CLK_N MIPI0D_DATA_P<0> MIPI0D_DATA_N<0> MIPI0D_DATA_N<1> MIPI0D_DATA_P<1> =PPLED_REG MIPI_DATA_CONN_N<1> MIPI_DATA_CONN_P<1> MIPI_DATA_CONN_N<0> MIPI_DATA_CONN_P<0> WLED_STRING5 VOLTAGE=4.5V MIN_LINE_WIDTH=0.30 MM PPVCC_MAIN_LCD_SW_CONN MIN_NECK_WIDTH=0.20 MM MIPI0D_DATA_N<2> MIPI0D_DATA_P<2> MIPI_DATA_CONN_P<2> MIPI_DATA_CONN_N<2> MIPI0D_DATA_P<3> MIPI0D_DATA_N<3> MIPI_CLK_CONN_N MIPI_CLK_CONN_P WLED_STRING2 WLED_STRING3 WLED_STRING4 GPIO_MLC_RST_L MIPI_DATA_CONN_P<3> MIPI_DATA_CONN_N<3> 051-9374 13.0.0 22 OF 102 16 OF 46 21 2 1 2 1 2 1 2 1 2 1 2 1 21 2 1 4 3 2 1 4 3 2 1 2 1 1 2 2 1 2 1 4 3 2 1 4 3 2 1 2 1 1 2 9 11 13 15 17 3 7 14 16 18 12 10 8 4 6 2 31 29 19 21 23 25 27 32 30 26 28 24 22 20 5 1 3334 3536 4 3 2 1 81 3 52 7 39 39 45 45 45 45 45 45 4 45 45
  • 19. BI IN IN OUT IN BI IN IN1 IN2 IN4 IN3 OUT1 OUT2 OUT3 OUT4 GND IN1 IN2 IN4 IN3 OUT1 OUT2 OUT3 OUT4 GND SYM_VER-2 SYM_VER-2 OUT OUT OUT OUT Apple Inc. THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. 124578 B D 8 7 6 5 4 3 C B A NOTICE OF PROPRIETARY PROPERTY: PAGE 12 D A C PAGE TITLE SHEET IV ALL RIGHTS RESERVED R D SIZEDRAWING NUMBER REVISION BRANCH 6 3 THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT VGA FRONT CAMERA CONNECTOR 516S0876 RCPT MLB 516S0869 PLUG FLEX ISP1_CAM_FRONT_SHUTDOWN LOW = ENABLES CAMERA TO TURN ON HIGH = DISABLES / TURNS OFF CAMERA F-ST-SM 503548-1820 CRITICAL J2601 SM XW2600 41844 41844 6 4 644 644 644 120-OHM-210MA L2660 01005 U2600 1208 400MHZ-0.1A-27PF U2601 1208 400MHZ-0.1A-27PF 100K 1% 01005 1/32W MF R2601 10% 01005 1000PF 6.3V X5R-CERM C2602 20% X5R 1UF 6.3V 0201 C2601 NP0-C0G 16V 27PF 5% 01005 C2600 L2600 0201 240OHM-350MA 1000PF 01005 10% 6.3V X5R-CERM C2605 0201 20% 6.3V 1UF X5R C2604 01005 27PF 16V NP0-C0G C2603 5% L2601 0201 240OHM-350MA 6.3V 10% 1000PF 01005 X5R-CERM C2608 1UF 0201 20% 6.3V X5R C2607 NP0-C0G 16V 27PF 5% 01005 C2606 L2602 0201 240-OHM-0.2A-0.8-OHM 90-OHM-50MA TCM0605-1 L2610 90-OHM-50MA TCM0605-1 L2611 6 45 6 45 6 45 6 45 FF CAM & MIC CONNECTORS SYNC_MASTER=N/A SYNC_DATE=N/A MIN_NECK_WIDTH=0.15 MM GND_AVDD_CAM_FRONT VOLTAGE=0V MIN_LINE_WIDTH=0.15 MM NET_SPACING_TYPE=GND VOLTAGE=1.8V MAX_NECK_LENGTH=3 MM NET_SPACING_TYPE=PWR MIN_NECK_WIDTH=0.2 mm MIN_LINE_WIDTH=0.6 mm PP1V8_CAM_FRONT_FILT =PP2V8_CAM_FRONT MIPI1C_CAM_FRONT_CLK_FILT_P I2C2_SCL_F ISP1_CAM_FRONT_SCL_F MIPI1C_CAM_FRONT_CLK_FILT_N MIPI1C_CAM_FRONT_DATA_FILT_N<0> MIPI1C_CAM_FRONT_DATA_FILT_P<0> GPIO_ALS_IRQ_L_F I2C2_SDA_F ISP1_CAM_FRONT_CLK_F_R ISP1_CAM_FRONT_SHUTDOWN_F ISP1_CAM_FRONT_SDA_F PP2V8_CAM_FRONT_FILT GND_AVDD_CAM_FRONT PP1V8_CAM_FRONT_FILT PP3V0_ALS_FILT MAX_NECK_LENGTH=3 MM PP2V8_CAM_FRONT_FILT VOLTAGE=2.8V MIN_LINE_WIDTH=0.6 mm MIN_NECK_WIDTH=0.2 mm NET_SPACING_TYPE=PWR =PP1V8_CAM_FRONT ISP1_CAM_FRONT_SHUTDOWN_F =PP3V0_ALS MIPI1C_CAM_FRONT_DATA_FILT_P<0> MIPI1C_CAM_FRONT_CLK_FILT_N MIPI1C_CAM_FRONT_CLK_FILT_P MIPI1C_CAM_FRONT_CLK_P MIPI1C_CAM_FRONT_CLK_N MIPI1C_CAM_FRONT_DATA_P<0> MIPI1C_CAM_FRONT_DATA_N<0> MIN_LINE_WIDTH=0.6 mm MIN_NECK_WIDTH=0.2 mm NET_SPACING_TYPE=PWR MAX_NECK_LENGTH=3 MM PP3V0_ALS_FILT VOLTAGE=3.0V ISP1_CAM_FRONT_CLK_F_R ISP1_CAM_FRONT_CLK_F MIPI1C_CAM_FRONT_DATA_FILT_N<0> ISP1_CAM_FRONT_SHUTDOWN_F GPIO_ALS_IRQ_L_F I2C2_SCL_F NC_U2601_5 GPIO_ALS_IRQ_L ISP1_CAM_FRONT_SHUTDOWN I2C2_SCL NC_U2601_1 ISP1_CAM_FRONT_CLK_F I2C2_SDA_F ISP1_CAM_FRONT_SCL_F ISP1_CAM_FRONT_SDA_F I2C2_SDA ISP1_CAM_FRONT_CLK ISP1_CAM_FRONT_SCL ISP1_CAM_FRONT_SDA 051-9374 13.0.0 26 OF 102 17 OF 46 6 21 17 15 13 11 9 7 5 3 12 4 8 10 12 14 16 18 1920 22 1 2 21 1 2 2 1 2 1 2 1 21 2 1 2 1 2 1 21 2 1 2 1 2 1 21 4 32 1 4 32 1 17 17 39 1745 1744 17 44 1745 1745 1745 17 17 44 17 17 17 44 17 17 17 17 17 39 17 39 1745 1745 1745 17 17 17 44 1745 17 17 17 44 17 44 17 44 17 44 17 44
  • 20. BI RES/VDD VDD RES0 RES1 RES2 RES3 DRDY/ VDD_IO SCL/SPC SDA/SDI/SDO SDO/SA0 CS GND INT1 DEN RES/GND INT2 IN DRDY SCL/SK SDA/SI VDD RSVSO VSS TST1 TRG VID CAD0 CAD1 RST* CSB* INT2 GND VDDVDD_IO NC RESCS SDA/SDI/SDO SCL/SPC RES SEL/SDO INT1/DRDY IN BI OUT OUTBI IN OUT OUT NC NC IN Apple Inc. THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. 124578 B D 8 7 6 5 4 3 C B A NOTICE OF PROPRIETARY PROPERTY: PAGE 12 D A C PAGE TITLE SHEET IV ALL RIGHTS RESERVED R D SIZEDRAWING NUMBER REVISION BRANCH 6 3 THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT ACCELEROMETER 12-BIT PART WRITE: 0X18 READ: 0X19 COMPASS DATASHEET SAYS TO CONNECT PIN 15 TO VDD PIN 10 TO GND GYRO (WRITE: 0XD4 READ: 0XD5) CS* TIES TO VID FOR I2C MODE (WRITE: 0X3A READ: 0X3B) 4171844 CRITICAL U2720 LGA AP3GDL20BCTR C2726 10% 0.01UF 0201 X5R-CERM 25V C2725 X5R 10% 201 6.3V 0.1UF 20 L2702 0201 240-OHM-0.2A-0.8-OHM CRITICAL U2710 AK8963C CSP CRITICAL U2700 LGA AP3DSHAD 41944 41944 C2711 01005 20% 0.1UF 6.3V X5R-CERM C2710 10V X5R-CERM 1.0UF 20% 0201-1 L2701 240-OHM-0.2A-0.8-OHM 0201 C2721 0.1UF 6.3V X5R 10% 201 R2724 01005 1/32W MF 10K 1% 4 4 L2700 0201 240-OHM-0.2A-0.8-OHM C2700 CERM-X5R 6.3V 20% 10UF 0402-2 4171844 4171844 C2702 X5R 0.1UF 10% 201 6.3V C2701 0.1UF 6.3V 10% X5R 201 4 4 C2723 6.3V CERM-X5R 10UF 20% 0402-2 XW2700 SM 4171844 INERTIAL SENSORS SYNC_MASTER=N/A SYNC_DATE=N/A =PP1V8_COMPASS CAM_REAR_VSYNC =PP1V8_GYRO GPIO_GYRO_IRQ1 =PP3V0_SENSOR_GYRO I2C2_SCL I2C2_SDA =PP1V8_ACCEL PP3V0_SENSOR_ACCEL_FILT VOLTAGE=3.0V MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.2MM MAX_NECK_LENGTH=3MM NET_SPACING_TYPE=PWR GPIO_ACCEL_IRQ2_L GPIO_ACCEL_IRQ1_L GPIO_GYRO_IRQ2 NET_SPACING_TYPE=PWR MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.2MM MAX_NECK_LENGTH=3MM PP3V0_SENSOR_GYRO_FILT VOLTAGE=3.0V GYRO_PUMP I2C2_SCL I2C2_SDA =PP3V0_SENSOR_ACCEL PP3V0_SENSOR_COMPASS_FILT VOLTAGE=3.0V MIN_NECK_WIDTH=0.2MM MIN_LINE_WIDTH=0.5MM MAX_NECK_LENGTH=3MM NET_SPACING_TYPE=PWR AGND_COMPASS =PP3V0_SENSOR_COMPASS I2C1_SCL I2C1_SDA GYRO_CS AGND_COMPASS NC_U2710_DRDY NC_U2710_SO NC_U2710_TST1 NC_U2710_RSV NC_U2710_TRG 051-9374 13.0.0 27 OF 102 18 OF 46 1516 9 10 11 12 6 1 2 3 4 5 13 7 8 14 2 1 2 1 2 1 A1 A3 A4 B1 B3B4 C1 C2 C3 C4 D1 D2 D4 A2 9 5 14 1 2 3 108 6 4 15 12 13 16 7 11 2 1 2 1 2 1 2 1 1 2 2 1 2 1 2 1 2 1 2 1 12 39 39 39 39 39 18 39 18
  • 21. ADD0 SCLK CIN1 CIN3 CIN4 CIN12 CIN11 CIN6 CIN9 CIN8 CIN10 CIN2 CIN5 CIN0 ACSHIELD GND BIAS SDA VDRIVEVCC ADD1 INT* GPIO CIN7 TPNC NC NC NC NC NC NC NC NC NC BI IN OUT Apple Inc. THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. 124578 B D 8 7 6 5 4 3 C B A NOTICE OF PROPRIETARY PROPERTY: PAGE 12 D A C PAGE TITLE SHEET IV ALL RIGHTS RESERVED R D SIZEDRAWING NUMBER REVISION BRANCH 6 3 THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT I2C ADDRESS: 0101100+R/W PCB: ACSHIELD NEEDS TO BE A PLANE UNDER PROX_CIN NETS AND ALSO TIE TO CONNECTOR. CIN7 DUMMY CIN9 SENSOR ELECTRODE VDRIVE FOR: I2C AND GPIO INT* IS OPEN DRAIN PU RAIL MATCH VDRIVE U3200, NO GND PLANE NEAR PROX_CIN NETS.. JUST IN CASE NEED EXTERNAL REF CAP TO MEASURE 0.5 PF 1.8 MA MAX INT IS 1.8V LEVEL. PROX GPIO WILL NOT BE USED. THEREFORE,PROX GPIO IS NOT CONNECTED TO MLB INTERCONNECT. 353S2964 READ: 0X59, WRITE: 0X58 VDRIVERAIL PCB: ENSURE ACSHIELD PLANE UNDER PROX SENSOR CHOSE CIN NUMBERS FOR LAYOUT EASE 516S0872 C2804 6.3V 0.1UF X5R-CERM 20% 01005 P106_P107 C2805 68PF 5% 6.3V NP0-C0G 01005 P106_P107 R2800 MF 2.0K 1/32W 1% 01005 P106_P107 R2801 MF 100K 1% 1/32W 01005 P106_P107 C2802 0.01UF X5R 10% 10V 201 P106_P107 C2800 X5R 402 10% P106_P107 6.3V 2.2UF C2803 +/-0.05PF 201 CERM 25V 0.5PF P106_P107 C2801 0.1UF 6.3V X5R-CERM 20% 01005 P106_P107 C2806 5% 68PF 6.3V NP0-C0G 01005 P106_P107 C2807 NP0-C0G 201 25V 27PF P106_P107 1% U2800 WLCSP AD7149 CRITICAL P106_P107 L2801 68NH-2%-320MA-1.0OHM 0402 CRITICAL P106_P107 L2807 68NH-2%-320MA-1.0OHM 0402 CRITICAL P106_P107 L2808 0603 390NH-2%-170MA-4.0OHM CRITICAL P106_P107 L2802 390NH-2%-170MA-4.0OHM 0603 CRITICAL P106_P107 L2803 68NH-2%-320MA-1.0OHM 0402 CRITICAL P106_P107 L2804 0603 CRITICAL P106_P107 390NH-2%-170MA-4.0OHM 41844 L2800 240-OHM-0.2A-0.8-OHM 0201 41844 J2800 503548-0620 CRITICAL P106_P107 F-ST-SM 4 SYNC_DATE=N/ASYNC_MASTER=N/A PROX SENSOR NC_J2800_6 NC_J2800_2 NC_J2800_4 PROX_CIN9_CONN PROX_ACSHIELD_CONN =PP1V8_PROX MAX_NECK_LENGTH=3MM MIN_NECK_WIDTH=0.2MM MIN_LINE_WIDTH=0.6MM NET_SPACING_TYPE=PWR PP3V0_SENSOR_PROX_FILT VOLTAGE=3.0V I2C1_SCL PROX_GPIO PROX_CIN9 CIN9 ACSH_SB =PP1V8_PROX ACSHIELD_SB PROX_CIN1 TP_PROX_CIN2 PROX_CIN7 CIN7 GPIO_PROX_IRQ_L =PP3V0_SENSOR_PROX I2C1_SDA PROX_BIAS PROX_CIN7_CONN 051-9374 13.0.0 28 OF 102 19 OF 46 2 1 2 1 1 2 1 2 2 1 2 1 2 1 2 1 2 1 2 1 D1 C1 A3 A4 C3 E5 D5 B4 C5 C4 D4 B3 A5 D3 E4 E2 E3 E1 C2 D2 B1 A1 A2 B5 B2 2 1 2 12 1 2 1 2 12 1 2 1 8 21 109 3 4 5 6 7 1939 1939 39
  • 22. IN BI IN IN SYM_VER-2 SYM_VER-2 SYM_VER-2 OUT OUT OUT OUT OUT OUT Apple Inc. THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. 124578 B D 8 7 6 5 4 3 C B A NOTICE OF PROPRIETARY PROPERTY: PAGE 12 D A C PAGE TITLE SHEET IV ALL RIGHTS RESERVED R D SIZEDRAWING NUMBER REVISION BRANCH 6 3 THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT APN: 516S0973 518S0692 BUTTON CONNECTOR REAR CAMERA CONNECTOR PLUG: 516S0974 1.00K 1/32W 1% MF 01005 R2900 1.00K 1% 1/32W MF 01005 R2901 1.00K 1/32W 1% MF 01005 R2902 1.00K 1% MF 1/32W 01005 R2903 FF18-6A-R11AD-B-3H F-RT-SM J2960 CRITICAL X5R-CERM 10% 01005 6.3V 1000PF C2902 X5R 10V 10% 1UF 402 C2901 01005 5% 27PF 16V NP0-C0G C2900 L2900 0201 240OHM-350MA 18 644 C2905 01005 1000PF 10% X5R-CERM 6.3V X5R 10V 1UF 402 10% C2904 16V NP0-C0G 27PF 5% 01005 C2903 L2901 0201 240OHM-350MA 1000PF 6.3V X5R-CERM 01005 10% C2908 10% 402 1UF 10V X5R C2907C2906 01005 5% 27PF 16V NP0-C0G L2902 0201 240OHM-350MA 01005 1000PF 10% 6.3V X5R-CERM C2911C2910 X5R 10% 1UF 402 10V NP0-C0G 16V 27PF 5% 01005 C2909 L2903 0201 240OHM-350MA 644 201-1 12.8V-100PF DZ2960 201-1 12.8V-100PF DZ2961 12.8V-100PF 201-1 DZ2962 201-1 12.8V-100PF DZ2963 NP0-C0G 16V 27PF 5% 01005 C2970 01005 5% 27PF 16V NP0-C0G C2971 16V 27PF 5% 01005 NP0-C0G C2972 01005 5% 27PF 16V NP0-C0G C2973 F-ST-SM AA07-S022VA1 J2950 CRITICAL 6 44 5% 82PF CERM 0201 25V C2963 90-OHM-50MA TCM0605-1 L2910 L2911 90-OHM-50MA TCM0605-1 90-OHM-50MA TCM0605-1 L2912 6 45 6 45 6 45 6 45 6 45 6 45 SM XW2950 SM XW2951 0201 240-OHM-0.2A-0.8-OHM L2963 01005 120-OHM-210MA L2950 CERM 0201 25V 5% 82PF C2962 240-OHM-0.2A-0.8-OHM 0201 L2962 5% CERM 0201 25V 82PF C2961 0201 240-OHM-0.2A-0.8-OHM L2961 5% 82PF 25V 0201 CERM C2960 0201 240-OHM-0.2A-0.8-OHM L2960 1% 100K MF 1/32W 01005 R2950 BUTTON & REAR CAMERA CONN SYNC_DATE=N/ASYNC_MASTER=N/A MIPI0C_CAM_REAR_CLK_FILT_P ISP0_CAM_REAR_CLKISP0_CAM_REAR_CLK_FILT MIN_NECK_WIDTH=0.2 mm NET_SPACING_TYPE=PWR VOLTAGE=1.8V PP1V8_CAM_REAR_FILT MIN_LINE_WIDTH=0.6 mm MAX_NECK_LENGTH=3 MM MAX_NECK_LENGTH=5 MM NET_SPACING_TYPE=GND MIN_NECK_WIDTH=0.1 MM VOLTAGE=0V MIN_LINE_WIDTH=0.6 mm GND_AF_AVDD GPIO_BTN_POWER_R_L GPIO_BTN_VOL_UP_R_L MIPI0C_CAM_REAR_DATA_P<0> MIPI0C_CAM_REAR_DATA_N<0> MIPI0C_CAM_REAR_DATA_P<1> MIPI0C_CAM_REAR_DATA_N<1> MIPI0C_CAM_REAR_CLK_P MIPI0C_CAM_REAR_CLK_N GPIO_BTN_POWER_L_FILT GPIO_BTN_SRL_L_FILT GPIO_BTN_VOL_UP_L_FILT GPIO_BTN_VOL_DOWN_L_FILTGPIO_BTN_VOL_DOWN_R_LGPIO_BTN_VOL_DOWN_L GPIO_BTN_POWER_L GPIO_BTN_SRL_L GPIO_BTN_VOL_UP_L =PP1V8_CAM_REAR =PP2V8_CAM_REAR =PP2V8_CAM_REAR_AF =PP1V8_CAM_REAR ISP0_CAM_REAR_SCL ISP0_CAM_REAR_SDA ISP0_CAM_REAR_SHUTDOWN CAM_REAR_VSYNC PP2V8_CAM_REAR_AF_FILT VOLTAGE=2.8V MIN_LINE_WIDTH=0.6 mm MIN_NECK_WIDTH=0.2 mm NET_SPACING_TYPE=PWR MAX_NECK_LENGTH=3 MM MIPI0C_CAM_REAR_DATA_FILT_P<0> MIPI0C_CAM_REAR_DATA_FILT_N<0> MIPI0C_CAM_REAR_CLK_FILT_N MIPI0C_CAM_REAR_DATA_FILT_P<1> MIPI0C_CAM_REAR_DATA_FILT_N<1> PP2V8_CAM_REAR_FILT MIN_LINE_WIDTH=0.6 mm NET_SPACING_TYPE=PWR MIN_NECK_WIDTH=0.2 mm MAX_NECK_LENGTH=3 MM VOLTAGE=2.8V MAX_NECK_LENGTH=3 MM NET_SPACING_TYPE=PWR MIN_LINE_WIDTH=0.6 mm MIN_NECK_WIDTH=0.2 mm VOLTAGE=1.2V PP1V2_CAM_REAR_FILT=PP1V2_CAM_REAR MAX_NECK_LENGTH=5 MM NET_SPACING_TYPE=GND MIN_NECK_WIDTH=0.1 MM VOLTAGE=0V MIN_LINE_WIDTH=0.6 mm GND_CAM_AVDD GPIO_BTN_SRL_R_L 051-9374 13.0.0 29 OF 102 20 OF 46 1 2 1 2 1 2 1 2 6 5 4 3 2 1 2 1 2 1 2 1 21 2 1 2 1 2 1 21 2 1 2 1 2 1 21 2 1 2 1 2 1 21 1 2 1 2 1 2 1 2 2 1 2 1 2 1 2 1 25 26 24 23 22 20 18 16 10 14 12 8 6 4 2 21 19 17 15 7 9 11 13 5 3 1 2 1 4 32 1 4 32 1 4 32 1 1 2 1 2 21 21 2 1 21 2 1 21 2 1 21 1 2 45 4 442 442 4 93 02 39 39 93 02 6 45 45 45 45 45 39
  • 23. OUT OUT OUT OUT OUT IN OUT OUT BI IN BI PP PP OUT OUT IN IN IN IN IN OUT OUT OUT OUT OUT IN BI IN OUT IN IN IN PP PP OUT PP PP PP GND PP IN IN OUT OUT OUT OUT PP PP PP PP CLK RST VCC SWP GND DETECT I/O OUT IN REFERENCE DESIGNATOR(S) BOM OPTION TABLE_5_HEAD QTY DESCRIPTIONPART# TABLE_5_ITEM Apple Inc. THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. 124578 B D 8 7 6 5 4 3 C B A NOTICE OF PROPRIETARY PROPERTY: PAGE 12 D A C PAGE TITLE SHEET IV ALL RIGHTS RESERVED R D SIZEDRAWING NUMBER REVISION BRANCH 6 3 THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT PARTS TABLE FOR P105 SIM CARD, WHILE PINOUT IS BEING FIXED BB NOR SPI SIM CARD CONNECTOR 0X02BOOT_HSIC_OPTION AP INTERFACE & DEBUG CONNECTOR CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST. BOOT_CONFIG 0 0X01 SW REGISTER DZ101 X CXXX XW206 3 01456 0 52 55 X 5453 00 50 0 4948 0 0 1 0 0 0 0 0 1 X X X X 0 1 X 1 10 0 0 0 1 0 0 0 0 0 0 0 1 1 1 47 X0X00 X X X X 0X08 0X03 R104 XW C R U DZ U101 VALUE BOOT OPTIONS AP CONNECTIONS GPIO54/BOOT_CONFIG_0 BT UART 2 51 GPIO/BOOT_CONFIG CONFIGURATION NC GPIO51/BOOT_CONFIG_3 GPIO53/BOOT_CONFIG_1 GPIO48/BOOT_CONFIG_6 ENABLE SAHARA PROTOCOL BOOT_USB_OPTION BOOT_NAND_OPTION BOOT_DEFAULT_OPTION NC HSIC_BB_DATA HSIC_BB_STROBE DEBUG CONNECTOR 24 2123 2124 42444 42444 42444 42444 42444 2124 25 2124 PP31013_RF NOSTUFF SM P4MM PP31014_RF P4MM SM NOSTUFF 24 R31004_RF 1% MF 01005 1/32W 15.00K CELL 2325 21 25 21 37 21 25 21 25 21 25 2125 212532 21 25 21 2123 J31010_RF AXE654124 NOSTUFF M-ST-SM 23 24 21 25 21 25 21 25 21 22 24 25 28 21 22 24 21 25 PP31003_RF NOSTUFF P4MM SM PP31004_RF P4MM SM NOSTUFF 21 25 32 PP31005_RF SM P4MM NOSTUFF J31002_RF F-ST-SM NOSTUFF MM4829-2702 J31003_RF F-ST-SM MM4829-2702 NOSTUFF PP31001_RF SM P4MM NOSTUFF PP31006_RF P4MM NOSTUFF SM DZ31001_RF CELL TPD4E101DPW SON4 DZ31002_RF 12V-33PF 01005 CELL PP31007_RF SM P4MM NOSTUFF 2125 2125 2125 2125 21 37 21 23 24 PP31015_RF NOSTUFF P4MM SM PP31016_RF SM P4MM NOSTUFF PP31017_RF SM P4MM NOSTUFF PP31018_RF SM P4MM NOSTUFF R31101_RF 10K CELL 1/32W MF 01005 1% R31102_RF CELL MF 01005 1% 1/32W 10K R31103_RF CELL 10K 1/32W 01005 MF 1% R31104_RF 1/32W CELL 01005 10K 1% MF R31005_RF 0.00 MF NOSTUFF 1/32W 0% 01005 OMIT J31001_RF F-ST-SM SIM-CARD-N41 21 37 21 22 23 29 30 31 33 34 SYSTEM & DEBUG CONNECTORS CELLJ31001_RFP105 SIM TRAY1512S0088 I2S3_BT_BCLK PP_LDO14_2P65 LAT_SW1_CTL PP_LDO6_RUIM_1V8 SIMCRD_IO_CONN SIM_SWP SIM_DETECT SIMCRD_RST_CONN UART1_BT_CTS_L PP_BATT_VCC_CONN PMIC_RESOUT_L DEBUG_RST_L RESET_PMU_L RADIO_ON_L BB_UART_TXD BB_UART_RTS_L 50_HSIC_BB_DATA UART1_BT_RTS_L BT_PCM_SYNC WLAN_UART_TXD PMU_CLK_32K_WLAN HSIC1_BB_DATA UART1_BT_RXD PMU_GPIO_WLAN_REG_ON WLAN_REG_ON SIMCRD_RST_CONN BT_UART_RXD PP_LDO6_RUIM_1V8 SIM_DETECT GPIO_BB_HSIC_DEV_RDY GPIO_51 ANT_SEL_1 UART4_BB_RTS_L LAT_SW1_CTL PBL_RUN_BB_HSIC1_RDY BB_RST_L SIMCRD_IO_CONN BB_WAKE_HOST BT_REG_ON AP_HSIC1_RDY BB_UART_CTS_L UART3_WLAN_TXD PP_WL_BT_VDDIO_AP PMU_GPIO_WLAN_HOST_WAKE GPIO_WLAN_HSIC_DEV_RDY GPIO_WLAN_HSIC_HOST_RDY HSIC2_WLAN_STB PMU_GPIO_BT_HOST_WAKE BB_UART_RXD PS_HOLD BB_UART_CTS_L GPIO_DEBUG_LED BB_JTAG_TDO BB_JTAG_TMS BB_JTAG_TCK RF_RESET_L 90_BB_USB_D_N BB_USB_VBUS BB_JTAG_TRST_L BB_JTAG_RTCLK ANT_SEL_2 90_BB_USB_D_P BB_USB_VBUS UART4_BB_RXD GPIO_BB_GSM_TXBURST =PPBATT_VCC_RF GPIO_WLAN_HSIC_RESUME BT_WAKE BB_HSIC1_REMOTE_WAKE HSIC2_WLAN_DATA UART3_WLAN_RXD GPIO_BT_WAKE 50_HSIC_WLAN_STROBE BT_PCM_CLK BT_REG_ON BT_UART_TXD RESET_PMU_L AP_HSIC1_RDY SIMCRD_CLK_CONN BT_WAKE PP_SMPS3_MSME_1V8 RESET_DET_L BB_JTAG_TDI GPIO_BB_RADIO_ON_L GPIO_BB_RST_DET_L GPIO_BB_RST_L RESET_DET_L BB_RST_L TX_GTR_THRESH PMU_GPIO_BB_WAKE AP_WAKE_MODEM PBL_RUN_BB_HSIC1_RDY RST_SYSTEM_L GPIO_BB_IPC_GPIO RADIO_ON_L 90_BB_USB_D_P UART4_BB_TXD PP_LDO6_RUIM_1V8 SIMCRD_RST_CONN SIMCRD_IO_CONN SIM_DETECT PMU_GPIO_BB_RST_L GPIO_BB_DIAGS_RDY PMIC_SSBI SIMCRD_CLK_CONN BB_UART_TXD BB_UART_RXD PBL_RUN_BB_HSIC1_RDY AP_HSIC1_RDY 90_BB_USB_D_N 50_HSIC_BB_STROBE BT_UART_TXD 50_HSIC_BB_STROBE 50_HSIC_BB_DATA BB_ERROR_FLAG RADIO_ON_L RF_RESET_L DEV_HSIC3_RDY AP_HSIC3_RDY BB_WAKE_HOST BB_UART_RTS_L WLAN_UART_RXD WLAN_HOST_WAKE WLAN_HSIC3_RESUME ANT_PORTB_3 BT_UART_RXD PP_WLAN_MAIN_VCC USB_BB_D_N BB_VBUS_DET PP_BATT_VCC_CONN ANT_PORTB_1 I2S3_BT_DOUT I2S3_BT_DIN I2S3_BT_LRCK SPI_DATA_MOSI SPI_DATA_MISO SPI_CS_L SPI_CLK SIMCRD_CLK_CONN SLEEP_CLK_32K GPIO_BB_GPS_SYNC ANT_PORTB_1 ANT_PORTB_2 UART1_BT_TXD BT_UART_RTS_L UART4_BB_CTS_L USB_BB_D_P PP_SYNC CLK32K_AP WLAN_REG_ON BT_PCM_IN ANT_PORTB_3 HSIC1_BB_STB 50_HSIC_WLAN_DATA LAT_SW1_CTL ANT_SEL_2 ANT_SEL_1 GPIO_51 PP_SMPS3_MSME_1V8 GPIO_BB_HSIC_HOST_RDY =PPBATT_VCC_WL =PP1V8_S2R_WL BT_HOST_WAKE BT_PCM_OUT PMU_GPIO_BT_REG_ON BT_UART_CTS_L ANT_PORTB_2 ANT_PORTA_1 PP_LDO14_2P65 051-9374 13.0.0 31 OF 102 21 OF 46 1 1 1 2 50 42 44 46 48 32 34 36 38 40 26 22 24 28 30 16 14 12 18 20 2 10 8 6 4 49 47 45 43 41 33 31 29 27 25 23 21 35 37 39 7 5 3 1 19 17 15 9 11 13 52 54 51 53 55 58 57 56 1 1 1 4 2 3 1 4 2 3 1 1 1 5 32 41 1 2 1 1 1 1 1 1 2 1 2 1 2 1 2 1 2 3 2 1 6 8 9 10 11 13 5 12 7 4 44 132122273235 2125 212224 21 25 21 25 2125 4 44 2124 4 44 37 37 42 44 3 44 4 44 42 21 37 4 4 442125 4 44 37 42 4 4 3 44 42 2124 4 10 44 4 39 4 2137 25 3 44 4 44 4 37 37 2137 2137 2123 2125 4 4 4 2125 212324 25 42 25 2125 3 10 42 4 2123 2124 4 10 44 21 22 24 2125 2125 21 25 42 4 23 24 21 25 2125 2125 21 25 21 25 2124 2124 21 37 21 24 21 24 25 21 23 21 37 37 2125 2125 37 37 37 13 21 25 2137 37 10 44 42 2122232930313334 13 21 25 4 44 4 44 4 44 25 25 25 25 2125 23 24 4 132125 132125 4 44 37 4 44 10 44 25 37 2137 37 132125 3 44 37 2125 212532 212532 2125 2122242528 4 39 39 37 37 42 37 13 21 25 13 21 22 27 32 35
  • 24. OUT OUT OUT OUT IN IN IN OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT IN OUT OUT VDD_S4 VSW_S5 VSW_S3 VSW_S2 VREG_XO VREG_S5 VREG_S4 VREG_RFCLK VREG_L9 VREG_L8 VREG_L7 VREG_L6 VREG_L5 VREG_L4 VREG_L3 VREG_L2 VREG_L14 VREG_L13 VREG_L12 VREG_L11 VREG_L10 VOUT_LVS1 VDD_XO VDD_S5 VDD_S2 VDD_S1 VDD_L9 VDD_L8 VDD_L7 VDD_L5_L6_L13_L14 VDD_L4 VDD_L2_L3 VDD_L12 VDD_L10_L11 REF_GND REF_BYP VSW_S5_2 VREG_S3 VSW_S4 VDD_S3 VSW_S1 VREG_S1 VREG_S2 VREG (SYM 5 OF 5) Apple Inc. THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. 124578 B D 8 7 6 5 4 3 C B A NOTICE OF PROPRIETARY PROPERTY: PAGE 12 D A C PAGE TITLE SHEET IV ALL RIGHTS RESERVED R D SIZEDRAWING NUMBER REVISION BRANCH 6 3 THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT R L L211 CREATE A PLANE CREATE A PLANE CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST. R207 U C U201 C237 BASEBAND PMU (1 OF 2) 24 28 21 22 24 25 28 22 28 22 2228 21 23 29 30 31 33 34 2122242528 01005 20% X5R 0.1UF 4V CELL C32006_RF 22UF 20% 603 6.3V CELL X5R-CERM-1 C32009_RF CELL X5R-CERM-1 6.3V C32010_RF 603 20% 22UF NOSTUFF SHORT-10L-0.25MM-SM XW32009_RF 22UF 20% X5R-CERM-1 603 6.3V CELL C32008_RF 20% 6.3V CELL 603 X5R-CERM-1 22UF C32007_RF NOSTUFF SHORT-10L-0.25MM-SM XW32007_RF 24 24 25 13 21 27 32 35 24 21 24 36 23 24 24 28 24 24 XW32011_RF SHORT-10L-0.25MM-SM NOSTUFF 24 24 24 22 6.3V 1.0UF 0201-MUR CELL X5R 20% C32014_RF 20% 6.3V X5R CELL 0201-MUR 1.0UF C32012_RF 1.0UF 20% 0201-MUR 6.3V X5R CELL C32013_RF 20%1.0UF X5R 6.3V 0201-MUR CELL C32015_RF 0201-MUR 20% 1.0UF CELL X5R 6.3V C32016_RF 1.0UF 20% 6.3V X5R 0201-MUR CELL C32017_RF 20% X5R 6.3V 1.0UF CELL 0201-MUR C32018_RF X5R 1.0UF 20% 6.3V 0201-MUR CELL C32019_RF 6.3V 10UF CELL 20% 0402-1 CERM-X5R C32020_RF 10UF 20% 6.3V 0402-1 CELL CERM-X5R C32021_RF CERM-X5R 6.3V 20% CELL 10UF 0402-1 C32022_RF 10UF 6.3V 20% CERM-X5R 0402-1 CELL C32029_RF 6.3V 20% 0402-1 CERM-X5R 10UF CELL C32030_RF 24 24 20% X5R 1.0UF 6.3V CELL 0201-MUR C32031_RF BGA PM8018 CELL U32001_RF CELL 2.2UH-20%-1.2A-0.15OHM 0806 L32007_RF 2.2UH-20%-1.2A-0.15OHM 0806 CELL L32008_RF 2.2UH-20%-1.2A-0.15OHM 0806 CELL L32009_RF 2.2UH-20%-1.2A-0.15OHM L32010_RF CELL 0806 22UF 20% C32011_RF X5R-CERM-1 603 6.3V CELL 1.0UF X5R 20% 6.3V 0201-MUR CELL C32034_RF 0402 4.7UF 20% 10V X5R-CERM CELL C32026_RF 20% 10V X5R-CERM 4.7UF 0402 CELL C32001_RF 20% X5R-CERM 10V CELL 4.7UF 0402 C32002_RF 4.7UF 20% CELL 0402 10V X5R-CERM C32003_RF 4.7UF 20% 10V 0402 X5R-CERM CELL C32004_RF CERM-X5R 20% 0402-1 6.3V 10UF CELL C32035_RF CERM-X5R 20% 0402-1 10UF CELL 6.3V C32037_RF CERM-X5R CELL 20% 10UF 6.3V 0402-1 C32036_RF NOSTUFF 6.3V X5R-CERM 0.1UF 20% 01005 C32023_RF CELL 6.3V 20% 0402-1 CERM-X5R 10UF C32033_RF 6.3V 20% CERM-X5R 0402-1 CELL 10UF C32040_RF L32011_RF 2.2UH-20%-2.3A-0.115OHM CELL TFA252010-SM BASEBAND PMU (1 0F 2) PP_SMPS4_RF2_2V0PP_VSW_S4 PP_SMPS3_MSME_1V8 PP_SMPS5_DSP_1V05 PP_VSW_S3 PP_VSW_S5 S3_GND PP_LDO9_PLL_1V05 PP_LDO5_GPS_LNA_2V5 PP_LDO1 PP_LDO12_MDSP_SW_1V05 PP_LDO11_MDSP_FW_1V05 PP_LDO10_ADSP_1V05 PP_LDO8_VDDPX_1V2 PP_LDO7_DAC_1V8 PP_LDO4_VDDA_3V3 REF_BYP_8014_F2 S2_GNDS5_GND S1_GNDS4_GND PP_VREG S3_GND S5_GND PP_LDO3_AMUX_1V8 PP_LDO2_XO_HS_1V8 PP_SMPS5_DSP_1V05 PP_SMPS3_MSME_1V8 PP_SMPS4_RF2_2V0 S1_GND PP_VSW_S1 PP_SMPS1_MSMC_1V05 PP_VSW_S2 PP_LVS1 PP_LDO6_RUIM_1V8 PP_LDO13_VDDPX_2V95 PP_LDO14_2P65 PP_BATT_VCC_CONN PP_SMPS2_RF1_1V3 051-9374 13.0.0 32 OF 102 22 OF 46 2 1 2 1 2 1 21 2 1 2 1 21 21 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 98 24 88 82 87 48 42 90 20 76 105 13 77 54 63 17 11 84 32 31 29 23 43 55 65 53 8 101 89 95 104 70 58 75 5 78 44 64 59 34 28 100 12 81 18 6 92 97 79 83 102 21 21 21 21 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 21 2223 23 2223 2223 23 2223 2223 2223
  • 25. OUT OPT_1 PM_RESIN_N KPD_PWR* BAT_ID LED_DRV_N OPT_2 PM_MDM_INT_N PM_USR_INT_N PON_RESET* PON_TRIG SSBI PS_HOLD (SYM 1 OF 5) CONTROL GND0 XTAL_32K_OUT XTAL_32K_IN XTAL_19M_OUT XTAL_19M_IN XOADC_GND XO_THERM XO_OUT_D0_EN XO_OUT_D0 XO_OUT_A1 XO_OUT_A0 SLEEP_CLK RSVD GND1 (SYM 2 OF 5) CLOCKS MPP_06 MPP_05 MPP_04 MPP_03 MPP_02 MPP_01 GPIO_06 GPIO_05 GPIO_04 GPIO_03 GPIO_02 GPIO_01 (SYM 4 OF 5) MPP MISC GND_S3 GND_S2 GND_S1 GND_S4 GND_S5 GND VCOIN (SYM 3 OF 5) INPUT PWR IN IN IN OUT PP PP OUT IN IN OUT OUT IN IN BI IN OUT OUT IN IN TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM CRITICAL BOM OPTION TABLE_5_HEAD PART# DESCRIPTIONQTY REFERENCE DESIGNATOR(S) Apple Inc. THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. 124578 B D 8 7 6 5 4 3 C B A NOTICE OF PROPRIETARY PROPERTY: PAGE 12 D A C PAGE TITLE SHEET IV ALL RIGHTS RESERVED R D SIZEDRAWING NUMBER REVISION BRANCH 6 3 THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT TABLE_ALT_ITEM TABLE_ALT_ITEM PART NUMBER ALTERNATE FORPART NUMBER BOM OPTION REF DES COMMENTS: TABLE_ALT_HEAD GND1 PIN NO NEEDS TO BE 61 BOM OPTIONS NDK - 197S0410 NC PLACE CLOSE TO PA B3/13 CONFIG 0 0.50V B4_17 CONFIG 1 0.25V B4/17 CONFIG 0 PA_ID 1.10V PA CONFIG 0.25V R317 C R NC NC NC C309 L U U301 XW XW305 LXXX NC NC NC NC NC NC NC NC 0.50V N41 PROTO 1 CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST. 0.70V 0.90V 1.10V REVISIONBOARD_ID 1.30V N41 PROTO 3, X122 PROTO 0 N41 EVT 1, X122 PROTO 1 N41 EVT 2, X122 EVT N41 EVT 3, X122 DVT N41 PROTO 2, X122 RF DEV 1 KYOCERA - 197S0437 RAKON - 197S0409 61 NEEDS TO BE MADE 45 BASEBAND PMU (2 OF 2) ALTERNATES 1000PF 10% 6.3V X5R-CERM 01005 CELL C33006_RF 25 SHORT-10L-0.1MM-SM NOSTUFF XW33004_RF CELL MF 1% 100K 1/32W 01005 R33007_RF SHORT-10L-0.1MM-SM XW33003_RF CELL BGA PM8018 U32001_RF BGA PM8018 CELL U32001_RF PM8018 BGA CELL U32001_RF PM8018 BGA CELL U32001_RF 25 OMIT 1% MF 01005 1/32W 15.8K R33002_RF OMIT 01005 MF 1/32W 1% 102K R33004_RF NOSTUFF 0.00 0% MF 1/32W 01005 R33017_RF 5% MF CELL 01005 20.0K 1/32W R33018_RF 2125 2124 24 SHORT-10L-0.25MM-SM NOSTUFF XW33008_RF NOSTUFF SHORT-10L-0.25MM-SM XW33010_RF CELL 19.2MHZ-90PPM-10PF 2.5X2.0MM-SM1 Y33001_RF P4MMSM PP33001_RF SM P4MM PP33002_RF 26 0% 0.00 CELL 1/32W MF 01005 R33019_RF 1% 143K CELL 1/32W MF 01005 R33003_RF 100K 1/32W 01005 MF 1% NOSTUFF R33008_RF 4245 4245 CELL 0201 10KOHM-1%-0.31MA RT33001_RF 01005 100 1% 1/32W MF CELL R33010_RF 24 NP0-C0G 16V +/-0.1PF% 8.2PF 01005 CELL C33008_RF 01005 MF 1/32W 1% 392K CELL R33001_RF 21 24 24 222324 2124 21 21 24 25 222324 21 197S0437 CELL Y33001_RF197S0410 KYOCERA CRYSTAL CELL197S0410197S0409 RAKON CRYSTALY33001_RF BASEBAND PMU (2 OF 2)Y B4_171 R33004_RFPA_ID RES DIVIDER 102K118S0685 B3_131 YPA_ID RES DIVIDER 61.9K R33004_RF118S0656 B3_13118S0685 1 YR33002_RFPA_ID RES DIVIDER 102K B4_17Y118S0729 PA_ID RES DIVIDER 39K R33002_RF1 XTAL19M_OUT XO_THERM_Y1 PM_MDM_IRQ_L BOARD_ID PA_ID RADIO_ON_L RF_CLK MDM_CLK A0_PMCLK RSVD BB_RST_L PMIC_SSBI XO_GND S5_GND RESET_PMU_L OPT_2 PMIC_RESOUT_L PS_HOLD_PMIC S2_GND S4_GND S3_GND S1_GND PP_BATT_VCC_CONN PM_USR_IRQ_L D0_EN PP_LDO3_AMUX_1V8 PS_HOLD SLEEP_CLK_32K XO_GND BOARD_TEMP4_N VREF_DAC_BIAS BOARD_TEMP4_P PP_LDO3_AMUX_1V8 VDDPX_BIAS XTAL19M_IN XO_GND 051-9374 13.0.0 33 OF 102 23 OF 46 2 1 2 1 1 2 21 62 16 69 35 86 74 14 21 4 41 68 47 27 15 3 2 1 22 10 9 25 37 19 26 7 45 80 73 72 66 67 85 49 71 60 50 38 33 56 30 96 103 91 36 93 99 94 39 51 61 46 52 40 57 1 2 1 2 1 2 1 2 21 21 42 1 3 1 1 1 2 1 2 1 2 2 1 1 2 2 1 1 2 23 22 22 22 22 21222930313334 23 23