SlideShare a Scribd company logo
1 of 40
William Stallings
Computer Organization
and Architecture
7th
Edition
Chapter 10
Instruction Sets:
Characteristics and Functions
What is an Instruction Set?
• The complete collection of instructions
that are understood by a CPU
• Machine Code
• Binary
• Usually represented by assembly codes
Elements of an Instruction
• Operation code (Op code)
—Do this
• Source Operand reference
—To this
• Result Operand reference
—Put the answer here
• Next Instruction Reference
—When you have done that, do this...
Where have all the Operands Gone?
• Long time passing….
• (If you don’t understand, you’re too
young!)
• Main memory (or virtual memory or
cache)
• CPU register
• I/O device
Instruction Cycle State Diagram
Instruction Representation
• In machine code each instruction has a
unique bit pattern
• For human consumption (well,
programmers anyway) a symbolic
representation is used
—e.g. ADD, SUB, LOAD
• Operands can also be represented in this
way
—ADD A,B
Simple Instruction Format
Instruction Types
• Data processing
• Data storage (main memory)
• Data movement (I/O)
• Program flow control
Number of Addresses (a)
• 3 addresses
—Operand 1, Operand 2, Result
—a = b + c;
—May be a forth - next instruction (usually
implicit)
—Not common
—Needs very long words to hold everything
Number of Addresses (b)
• 2 addresses
—One address doubles as operand and result
—a = a + b
—Reduces length of instruction
—Requires some extra work
– Temporary storage to hold some results
Number of Addresses (c)
• 1 address
—Implicit second address
—Usually a register (accumulator)
—Common on early machines
Number of Addresses (d)
• 0 (zero) addresses
—All addresses implicit
—Uses a stack
—e.g. push a
— push b
— add
— pop c
—c = a + b
How Many Addresses
• More addresses
—More complex (powerful?) instructions
—More registers
– Inter-register operations are quicker
—Fewer instructions per program
• Fewer addresses
—Less complex (powerful?) instructions
—More instructions per program
—Faster fetch/execution of instructions
Design Decisions (1)
• Operation repertoire
—How many ops?
—What can they do?
—How complex are they?
• Data types
• Instruction formats
—Length of op code field
—Number of addresses
Design Decisions (2)
• Registers
—Number of CPU registers available
—Which operations can be performed on which
registers?
• Addressing modes (later…)
• RISC v CISC
Types of Operand
• Addresses
• Numbers
—Integer/floating point
• Characters
—ASCII etc.
• Logical Data
—Bits or flags
• (Aside: Is there any difference between numbers and
characters? Ask a C programmer!)
Pentium Data Types
• 8 bit Byte
• 16 bit word
• 32 bit double word
• 64 bit quad word
• Addressing is by 8 bit unit
• A 32 bit double word is read at addresses
divisible by 4
Specific Data Types
• General - arbitrary binary contents
• Integer - single binary value
• Ordinal - unsigned integer
• Unpacked BCD - One digit per byte
• Packed BCD - 2 BCD digits per byte
• Near Pointer - 32 bit offset within segment
• Bit field
• Byte String
• Floating Point
Pentium Numeric Data Formats
PowerPC Data Types
• 8 (byte), 16 (halfword), 32 (word) and 64
(doubleword) length data types
• Some instructions need operand aligned
on 32 bit boundary
• Can be big- or little-endian
• Fixed point processor recognises:
—Unsigned byte, unsigned halfword, signed
halfword, unsigned word, signed word,
unsigned doubleword, byte string (<128
bytes)
• Floating point
—IEEE 754
—Single or double precision
Types of Operation
• Data Transfer
• Arithmetic
• Logical
• Conversion
• I/O
• System Control
• Transfer of Control
Data Transfer
• Specify
—Source
—Destination
—Amount of data
• May be different instructions for different
movements
—e.g. IBM 370
• Or one instruction and different addresses
—e.g. VAX
Arithmetic
• Add, Subtract, Multiply, Divide
• Signed Integer
• Floating point ?
• May include
—Increment (a++)
—Decrement (a--)
—Negate (-a)
Shift and Rotate Operations
Logical
• Bitwise operations
• AND, OR, NOT
Conversion
• E.g. Binary to Decimal
Input/Output
• May be specific instructions
• May be done using data movement
instructions (memory mapped)
• May be done by a separate controller
(DMA)
Systems Control
• Privileged instructions
• CPU needs to be in specific state
—Ring 0 on 80386+
—Kernel mode
• For operating systems use
Transfer of Control
• Branch
—e.g. branch to x if result is zero
• Skip
—e.g. increment and skip if zero
—ISZ Register1
—Branch xxxx
—ADD A
• Subroutine call
—c.f. interrupt call
Branch Instruction
Nested Procedure Calls
Use of Stack
Stack Frame Growth Using Sample
Procedures P and Q
Exercise For Reader
• Find out about instruction set for Pentium
and PowerPC
• Start with Stallings
• Visit web sites
Byte Order
(A portion of chips?)
• What order do we read numbers that
occupy more than one byte
• e.g. (numbers in hex to make it easy to
read)
• 12345678 can be stored in 4x8bit
locations as follows
Byte Order (example)
• Address Value (1) Value(2)
• 184 12 78
• 185 34 56
• 186 56 34
• 186 78 12
• i.e. read top down or bottom up?
Byte Order Names
• The problem is called Endian
• The system on the left has the least
significant byte in the lowest address
• This is called big-endian
• The system on the right has the least
significant byte in the highest address
• This is called little-endian
Example of C Data Structure
Alternative View of Memory Map
Standard…What Standard?
• Pentium (80x86), VAX are little-endian
• IBM 370, Moterola 680x0 (Mac), and most
RISC are big-endian
• Internet is big-endian
—Makes writing Internet programs on PC more
awkward!
—WinSock provides htoi and itoh (Host to
Internet & Internet to Host) functions to
convert

More Related Content

What's hot

Computer architecture addressing modes and formats
Computer architecture addressing modes and formatsComputer architecture addressing modes and formats
Computer architecture addressing modes and formatsMazin Alwaaly
 
Computer architecture instruction formats
Computer architecture instruction formatsComputer architecture instruction formats
Computer architecture instruction formatsMazin Alwaaly
 
Logical micro-operations
Logical micro-operationsLogical micro-operations
Logical micro-operationsVATSAL TRIVEDI
 
Unit 3-pipelining &amp; vector processing
Unit 3-pipelining &amp; vector processingUnit 3-pipelining &amp; vector processing
Unit 3-pipelining &amp; vector processingvishal choudhary
 
Floating point arithmetic operations (1)
Floating point arithmetic operations (1)Floating point arithmetic operations (1)
Floating point arithmetic operations (1)cs19club
 
Input output organization
Input output organizationInput output organization
Input output organizationabdulugc
 
General register organization (computer organization)
General register organization  (computer organization)General register organization  (computer organization)
General register organization (computer organization)rishi ram khanal
 
Pipelining and vector processing
Pipelining and vector processingPipelining and vector processing
Pipelining and vector processingKamal Acharya
 
instruction format and addressing modes
instruction format and addressing modesinstruction format and addressing modes
instruction format and addressing modesRamaPrabha24
 
Pipelining
PipeliningPipelining
PipeliningAmin Omi
 
Data transfer and manipulation
Data transfer and manipulationData transfer and manipulation
Data transfer and manipulationSanjeev Patel
 
Instruction Execution Cycle
Instruction Execution CycleInstruction Execution Cycle
Instruction Execution Cycleutsav_shah
 
Accessing I/O Devices
Accessing I/O DevicesAccessing I/O Devices
Accessing I/O DevicesSlideshare
 
Direct access memory
Direct access memoryDirect access memory
Direct access memorymaliksiddique1
 
Instruction pipeline: Computer Architecture
Instruction pipeline: Computer ArchitectureInstruction pipeline: Computer Architecture
Instruction pipeline: Computer ArchitectureInteX Research Lab
 
Computer instructions
Computer instructionsComputer instructions
Computer instructionsAnuj Modi
 
Computer Organization and Architecture.
Computer Organization and Architecture.Computer Organization and Architecture.
Computer Organization and Architecture.CS_GDRCST
 
Arrays searching-sorting
Arrays searching-sortingArrays searching-sorting
Arrays searching-sortingAjharul Abedeen
 

What's hot (20)

Computer architecture addressing modes and formats
Computer architecture addressing modes and formatsComputer architecture addressing modes and formats
Computer architecture addressing modes and formats
 
Computer architecture instruction formats
Computer architecture instruction formatsComputer architecture instruction formats
Computer architecture instruction formats
 
Addressing modes
Addressing modesAddressing modes
Addressing modes
 
Logical micro-operations
Logical micro-operationsLogical micro-operations
Logical micro-operations
 
Unit 3-pipelining &amp; vector processing
Unit 3-pipelining &amp; vector processingUnit 3-pipelining &amp; vector processing
Unit 3-pipelining &amp; vector processing
 
Floating point arithmetic operations (1)
Floating point arithmetic operations (1)Floating point arithmetic operations (1)
Floating point arithmetic operations (1)
 
Input output organization
Input output organizationInput output organization
Input output organization
 
General register organization (computer organization)
General register organization  (computer organization)General register organization  (computer organization)
General register organization (computer organization)
 
Pipelining and vector processing
Pipelining and vector processingPipelining and vector processing
Pipelining and vector processing
 
instruction format and addressing modes
instruction format and addressing modesinstruction format and addressing modes
instruction format and addressing modes
 
Pipelining
PipeliningPipelining
Pipelining
 
Data transfer and manipulation
Data transfer and manipulationData transfer and manipulation
Data transfer and manipulation
 
Instruction Execution Cycle
Instruction Execution CycleInstruction Execution Cycle
Instruction Execution Cycle
 
Accessing I/O Devices
Accessing I/O DevicesAccessing I/O Devices
Accessing I/O Devices
 
Direct access memory
Direct access memoryDirect access memory
Direct access memory
 
Computer Organization
Computer OrganizationComputer Organization
Computer Organization
 
Instruction pipeline: Computer Architecture
Instruction pipeline: Computer ArchitectureInstruction pipeline: Computer Architecture
Instruction pipeline: Computer Architecture
 
Computer instructions
Computer instructionsComputer instructions
Computer instructions
 
Computer Organization and Architecture.
Computer Organization and Architecture.Computer Organization and Architecture.
Computer Organization and Architecture.
 
Arrays searching-sorting
Arrays searching-sortingArrays searching-sorting
Arrays searching-sorting
 

Similar to 10 instruction sets characteristics

10 instruction sets characteristics
10 instruction sets characteristics10 instruction sets characteristics
10 instruction sets characteristicsAnwal Mirza
 
10 instruction sets characteristics
10 instruction sets characteristics10 instruction sets characteristics
10 instruction sets characteristicsSher Shah Merkhel
 
10 Instruction Sets Characteristics
10  Instruction  Sets Characteristics10  Instruction  Sets Characteristics
10 Instruction Sets CharacteristicsJeanie Delos Arcos
 
Introduction to Computer Architecture and Organization
Introduction to Computer Architecture and OrganizationIntroduction to Computer Architecture and Organization
Introduction to Computer Architecture and OrganizationDr. Balaji Ganesh Rajagopal
 
pipeline and pipeline hazards
pipeline and pipeline hazards pipeline and pipeline hazards
pipeline and pipeline hazards Bharti Khemani
 
CNIT 127 Ch 1: Before you Begin
CNIT 127 Ch 1: Before you BeginCNIT 127 Ch 1: Before you Begin
CNIT 127 Ch 1: Before you BeginSam Bowne
 
MCA-I-COA- overview of register transfer, micro operations and basic computer...
MCA-I-COA- overview of register transfer, micro operations and basic computer...MCA-I-COA- overview of register transfer, micro operations and basic computer...
MCA-I-COA- overview of register transfer, micro operations and basic computer...Rai University
 
introduction to embedded systems part 1
introduction to embedded systems part 1introduction to embedded systems part 1
introduction to embedded systems part 1Hatem Abd El-Salam
 
CNIT 127 Ch Ch 1: Before you Begin
CNIT 127 Ch Ch 1: Before you BeginCNIT 127 Ch Ch 1: Before you Begin
CNIT 127 Ch Ch 1: Before you BeginSam Bowne
 
Dsp ajal
Dsp  ajalDsp  ajal
Dsp ajalAJAL A J
 
Lecture 03 basics of pic
Lecture 03 basics of picLecture 03 basics of pic
Lecture 03 basics of picVajira Thambawita
 
B.sc cs-ii-u-2.2-overview of register transfer, micro operations and basic co...
B.sc cs-ii-u-2.2-overview of register transfer, micro operations and basic co...B.sc cs-ii-u-2.2-overview of register transfer, micro operations and basic co...
B.sc cs-ii-u-2.2-overview of register transfer, micro operations and basic co...Rai University
 
Bca 2nd sem-u-2.2-overview of register transfer, micro operations and basic c...
Bca 2nd sem-u-2.2-overview of register transfer, micro operations and basic c...Bca 2nd sem-u-2.2-overview of register transfer, micro operations and basic c...
Bca 2nd sem-u-2.2-overview of register transfer, micro operations and basic c...Rai University
 
Micro[processor
Micro[processorMicro[processor
Micro[processorcollege
 
isa architecture
isa architectureisa architecture
isa architectureAJAL A J
 

Similar to 10 instruction sets characteristics (20)

10 instruction sets characteristics
10 instruction sets characteristics10 instruction sets characteristics
10 instruction sets characteristics
 
10 instruction sets characteristics
10 instruction sets characteristics10 instruction sets characteristics
10 instruction sets characteristics
 
Frist slider share
Frist slider shareFrist slider share
Frist slider share
 
10 Instruction Sets Characteristics
10  Instruction  Sets Characteristics10  Instruction  Sets Characteristics
10 Instruction Sets Characteristics
 
Lec05
Lec05Lec05
Lec05
 
Processors selection
Processors selectionProcessors selection
Processors selection
 
Introduction to Computer Architecture and Organization
Introduction to Computer Architecture and OrganizationIntroduction to Computer Architecture and Organization
Introduction to Computer Architecture and Organization
 
cs-procstruc.ppt
cs-procstruc.pptcs-procstruc.ppt
cs-procstruc.ppt
 
pipeline and pipeline hazards
pipeline and pipeline hazards pipeline and pipeline hazards
pipeline and pipeline hazards
 
CNIT 127 Ch 1: Before you Begin
CNIT 127 Ch 1: Before you BeginCNIT 127 Ch 1: Before you Begin
CNIT 127 Ch 1: Before you Begin
 
MCA-I-COA- overview of register transfer, micro operations and basic computer...
MCA-I-COA- overview of register transfer, micro operations and basic computer...MCA-I-COA- overview of register transfer, micro operations and basic computer...
MCA-I-COA- overview of register transfer, micro operations and basic computer...
 
Control unit
Control unitControl unit
Control unit
 
introduction to embedded systems part 1
introduction to embedded systems part 1introduction to embedded systems part 1
introduction to embedded systems part 1
 
CNIT 127 Ch Ch 1: Before you Begin
CNIT 127 Ch Ch 1: Before you BeginCNIT 127 Ch Ch 1: Before you Begin
CNIT 127 Ch Ch 1: Before you Begin
 
Dsp ajal
Dsp  ajalDsp  ajal
Dsp ajal
 
Lecture 03 basics of pic
Lecture 03 basics of picLecture 03 basics of pic
Lecture 03 basics of pic
 
B.sc cs-ii-u-2.2-overview of register transfer, micro operations and basic co...
B.sc cs-ii-u-2.2-overview of register transfer, micro operations and basic co...B.sc cs-ii-u-2.2-overview of register transfer, micro operations and basic co...
B.sc cs-ii-u-2.2-overview of register transfer, micro operations and basic co...
 
Bca 2nd sem-u-2.2-overview of register transfer, micro operations and basic c...
Bca 2nd sem-u-2.2-overview of register transfer, micro operations and basic c...Bca 2nd sem-u-2.2-overview of register transfer, micro operations and basic c...
Bca 2nd sem-u-2.2-overview of register transfer, micro operations and basic c...
 
Micro[processor
Micro[processorMicro[processor
Micro[processor
 
isa architecture
isa architectureisa architecture
isa architecture
 

More from dilip kumar

FLAT Notes
FLAT NotesFLAT Notes
FLAT Notesdilip kumar
 
18 parallel processing
18 parallel processing18 parallel processing
18 parallel processingdilip kumar
 
17 micro programmed control
17 micro programmed control17 micro programmed control
17 micro programmed controldilip kumar
 
16 control unit
16 control unit16 control unit
16 control unitdilip kumar
 
14 superscalar
14 superscalar14 superscalar
14 superscalardilip kumar
 
12 processor structure and function
12 processor structure and function12 processor structure and function
12 processor structure and functiondilip kumar
 
11 instruction sets addressing modes
11  instruction sets addressing modes 11  instruction sets addressing modes
11 instruction sets addressing modes dilip kumar
 
09 arithmetic
09 arithmetic09 arithmetic
09 arithmeticdilip kumar
 
08 operating system support
08 operating system support08 operating system support
08 operating system supportdilip kumar
 
07 input output
07 input output07 input output
07 input outputdilip kumar
 
06 external memory
06 external memory06 external memory
06 external memorydilip kumar
 
05 internal memory
05 internal memory05 internal memory
05 internal memorydilip kumar
 
04 cache memory
04 cache memory04 cache memory
04 cache memorydilip kumar
 
02 computer evolution and performance
02 computer evolution and performance02 computer evolution and performance
02 computer evolution and performancedilip kumar
 
01 introduction
01 introduction01 introduction
01 introductiondilip kumar
 

More from dilip kumar (18)

FLAT Notes
FLAT NotesFLAT Notes
FLAT Notes
 
18 parallel processing
18 parallel processing18 parallel processing
18 parallel processing
 
17 micro programmed control
17 micro programmed control17 micro programmed control
17 micro programmed control
 
16 control unit
16 control unit16 control unit
16 control unit
 
15 ia64
15 ia6415 ia64
15 ia64
 
14 superscalar
14 superscalar14 superscalar
14 superscalar
 
13 risc
13 risc13 risc
13 risc
 
12 processor structure and function
12 processor structure and function12 processor structure and function
12 processor structure and function
 
11 instruction sets addressing modes
11  instruction sets addressing modes 11  instruction sets addressing modes
11 instruction sets addressing modes
 
09 arithmetic
09 arithmetic09 arithmetic
09 arithmetic
 
08 operating system support
08 operating system support08 operating system support
08 operating system support
 
07 input output
07 input output07 input output
07 input output
 
06 external memory
06 external memory06 external memory
06 external memory
 
05 internal memory
05 internal memory05 internal memory
05 internal memory
 
04 cache memory
04 cache memory04 cache memory
04 cache memory
 
03 buses
03 buses03 buses
03 buses
 
02 computer evolution and performance
02 computer evolution and performance02 computer evolution and performance
02 computer evolution and performance
 
01 introduction
01 introduction01 introduction
01 introduction
 

Recently uploaded

High Profile Call Girls Nagpur Isha Call 7001035870 Meet With Nagpur Escorts
High Profile Call Girls Nagpur Isha Call 7001035870 Meet With Nagpur EscortsHigh Profile Call Girls Nagpur Isha Call 7001035870 Meet With Nagpur Escorts
High Profile Call Girls Nagpur Isha Call 7001035870 Meet With Nagpur Escortsranjana rawat
 
VICTOR MAESTRE RAMIREZ - Planetary Defender on NASA's Double Asteroid Redirec...
VICTOR MAESTRE RAMIREZ - Planetary Defender on NASA's Double Asteroid Redirec...VICTOR MAESTRE RAMIREZ - Planetary Defender on NASA's Double Asteroid Redirec...
VICTOR MAESTRE RAMIREZ - Planetary Defender on NASA's Double Asteroid Redirec...VICTOR MAESTRE RAMIREZ
 
GDSC ASEB Gen AI study jams presentation
GDSC ASEB Gen AI study jams presentationGDSC ASEB Gen AI study jams presentation
GDSC ASEB Gen AI study jams presentationGDSCAESB
 
IVE Industry Focused Event - Defence Sector 2024
IVE Industry Focused Event - Defence Sector 2024IVE Industry Focused Event - Defence Sector 2024
IVE Industry Focused Event - Defence Sector 2024Mark Billinghurst
 
Biology for Computer Engineers Course Handout.pptx
Biology for Computer Engineers Course Handout.pptxBiology for Computer Engineers Course Handout.pptx
Biology for Computer Engineers Course Handout.pptxDeepakSakkari2
 
microprocessor 8085 and its interfacing
microprocessor 8085  and its interfacingmicroprocessor 8085  and its interfacing
microprocessor 8085 and its interfacingjaychoudhary37
 
Call Girls Delhi {Jodhpur} 9711199012 high profile service
Call Girls Delhi {Jodhpur} 9711199012 high profile serviceCall Girls Delhi {Jodhpur} 9711199012 high profile service
Call Girls Delhi {Jodhpur} 9711199012 high profile servicerehmti665
 
APPLICATIONS-AC/DC DRIVES-OPERATING CHARACTERISTICS
APPLICATIONS-AC/DC DRIVES-OPERATING CHARACTERISTICSAPPLICATIONS-AC/DC DRIVES-OPERATING CHARACTERISTICS
APPLICATIONS-AC/DC DRIVES-OPERATING CHARACTERISTICSKurinjimalarL3
 
OSVC_Meta-Data based Simulation Automation to overcome Verification Challenge...
OSVC_Meta-Data based Simulation Automation to overcome Verification Challenge...OSVC_Meta-Data based Simulation Automation to overcome Verification Challenge...
OSVC_Meta-Data based Simulation Automation to overcome Verification Challenge...Soham Mondal
 
VIP Call Girls Service Kondapur Hyderabad Call +91-8250192130
VIP Call Girls Service Kondapur Hyderabad Call +91-8250192130VIP Call Girls Service Kondapur Hyderabad Call +91-8250192130
VIP Call Girls Service Kondapur Hyderabad Call +91-8250192130Suhani Kapoor
 
(MEERA) Dapodi Call Girls Just Call 7001035870 [ Cash on Delivery ] Pune Escorts
(MEERA) Dapodi Call Girls Just Call 7001035870 [ Cash on Delivery ] Pune Escorts(MEERA) Dapodi Call Girls Just Call 7001035870 [ Cash on Delivery ] Pune Escorts
(MEERA) Dapodi Call Girls Just Call 7001035870 [ Cash on Delivery ] Pune Escortsranjana rawat
 
College Call Girls Nashik Nehal 7001305949 Independent Escort Service Nashik
College Call Girls Nashik Nehal 7001305949 Independent Escort Service NashikCollege Call Girls Nashik Nehal 7001305949 Independent Escort Service Nashik
College Call Girls Nashik Nehal 7001305949 Independent Escort Service NashikCall Girls in Nagpur High Profile
 
HARMONY IN THE NATURE AND EXISTENCE - Unit-IV
HARMONY IN THE NATURE AND EXISTENCE - Unit-IVHARMONY IN THE NATURE AND EXISTENCE - Unit-IV
HARMONY IN THE NATURE AND EXISTENCE - Unit-IVRajaP95
 
CCS355 Neural Network & Deep Learning UNIT III notes and Question bank .pdf
CCS355 Neural Network & Deep Learning UNIT III notes and Question bank .pdfCCS355 Neural Network & Deep Learning UNIT III notes and Question bank .pdf
CCS355 Neural Network & Deep Learning UNIT III notes and Question bank .pdfAsst.prof M.Gokilavani
 
Software and Systems Engineering Standards: Verification and Validation of Sy...
Software and Systems Engineering Standards: Verification and Validation of Sy...Software and Systems Engineering Standards: Verification and Validation of Sy...
Software and Systems Engineering Standards: Verification and Validation of Sy...VICTOR MAESTRE RAMIREZ
 
main PPT.pptx of girls hostel security using rfid
main PPT.pptx of girls hostel security using rfidmain PPT.pptx of girls hostel security using rfid
main PPT.pptx of girls hostel security using rfidNikhilNagaraju
 
Artificial-Intelligence-in-Electronics (K).pptx
Artificial-Intelligence-in-Electronics (K).pptxArtificial-Intelligence-in-Electronics (K).pptx
Artificial-Intelligence-in-Electronics (K).pptxbritheesh05
 

Recently uploaded (20)

High Profile Call Girls Nagpur Isha Call 7001035870 Meet With Nagpur Escorts
High Profile Call Girls Nagpur Isha Call 7001035870 Meet With Nagpur EscortsHigh Profile Call Girls Nagpur Isha Call 7001035870 Meet With Nagpur Escorts
High Profile Call Girls Nagpur Isha Call 7001035870 Meet With Nagpur Escorts
 
VICTOR MAESTRE RAMIREZ - Planetary Defender on NASA's Double Asteroid Redirec...
VICTOR MAESTRE RAMIREZ - Planetary Defender on NASA's Double Asteroid Redirec...VICTOR MAESTRE RAMIREZ - Planetary Defender on NASA's Double Asteroid Redirec...
VICTOR MAESTRE RAMIREZ - Planetary Defender on NASA's Double Asteroid Redirec...
 
GDSC ASEB Gen AI study jams presentation
GDSC ASEB Gen AI study jams presentationGDSC ASEB Gen AI study jams presentation
GDSC ASEB Gen AI study jams presentation
 
IVE Industry Focused Event - Defence Sector 2024
IVE Industry Focused Event - Defence Sector 2024IVE Industry Focused Event - Defence Sector 2024
IVE Industry Focused Event - Defence Sector 2024
 
Biology for Computer Engineers Course Handout.pptx
Biology for Computer Engineers Course Handout.pptxBiology for Computer Engineers Course Handout.pptx
Biology for Computer Engineers Course Handout.pptx
 
microprocessor 8085 and its interfacing
microprocessor 8085  and its interfacingmicroprocessor 8085  and its interfacing
microprocessor 8085 and its interfacing
 
Call Girls Delhi {Jodhpur} 9711199012 high profile service
Call Girls Delhi {Jodhpur} 9711199012 high profile serviceCall Girls Delhi {Jodhpur} 9711199012 high profile service
Call Girls Delhi {Jodhpur} 9711199012 high profile service
 
APPLICATIONS-AC/DC DRIVES-OPERATING CHARACTERISTICS
APPLICATIONS-AC/DC DRIVES-OPERATING CHARACTERISTICSAPPLICATIONS-AC/DC DRIVES-OPERATING CHARACTERISTICS
APPLICATIONS-AC/DC DRIVES-OPERATING CHARACTERISTICS
 
OSVC_Meta-Data based Simulation Automation to overcome Verification Challenge...
OSVC_Meta-Data based Simulation Automation to overcome Verification Challenge...OSVC_Meta-Data based Simulation Automation to overcome Verification Challenge...
OSVC_Meta-Data based Simulation Automation to overcome Verification Challenge...
 
VIP Call Girls Service Kondapur Hyderabad Call +91-8250192130
VIP Call Girls Service Kondapur Hyderabad Call +91-8250192130VIP Call Girls Service Kondapur Hyderabad Call +91-8250192130
VIP Call Girls Service Kondapur Hyderabad Call +91-8250192130
 
(MEERA) Dapodi Call Girls Just Call 7001035870 [ Cash on Delivery ] Pune Escorts
(MEERA) Dapodi Call Girls Just Call 7001035870 [ Cash on Delivery ] Pune Escorts(MEERA) Dapodi Call Girls Just Call 7001035870 [ Cash on Delivery ] Pune Escorts
(MEERA) Dapodi Call Girls Just Call 7001035870 [ Cash on Delivery ] Pune Escorts
 
College Call Girls Nashik Nehal 7001305949 Independent Escort Service Nashik
College Call Girls Nashik Nehal 7001305949 Independent Escort Service NashikCollege Call Girls Nashik Nehal 7001305949 Independent Escort Service Nashik
College Call Girls Nashik Nehal 7001305949 Independent Escort Service Nashik
 
HARMONY IN THE NATURE AND EXISTENCE - Unit-IV
HARMONY IN THE NATURE AND EXISTENCE - Unit-IVHARMONY IN THE NATURE AND EXISTENCE - Unit-IV
HARMONY IN THE NATURE AND EXISTENCE - Unit-IV
 
CCS355 Neural Network & Deep Learning UNIT III notes and Question bank .pdf
CCS355 Neural Network & Deep Learning UNIT III notes and Question bank .pdfCCS355 Neural Network & Deep Learning UNIT III notes and Question bank .pdf
CCS355 Neural Network & Deep Learning UNIT III notes and Question bank .pdf
 
Call Us -/9953056974- Call Girls In Vikaspuri-/- Delhi NCR
Call Us -/9953056974- Call Girls In Vikaspuri-/- Delhi NCRCall Us -/9953056974- Call Girls In Vikaspuri-/- Delhi NCR
Call Us -/9953056974- Call Girls In Vikaspuri-/- Delhi NCR
 
Software and Systems Engineering Standards: Verification and Validation of Sy...
Software and Systems Engineering Standards: Verification and Validation of Sy...Software and Systems Engineering Standards: Verification and Validation of Sy...
Software and Systems Engineering Standards: Verification and Validation of Sy...
 
Exploring_Network_Security_with_JA3_by_Rakesh Seal.pptx
Exploring_Network_Security_with_JA3_by_Rakesh Seal.pptxExploring_Network_Security_with_JA3_by_Rakesh Seal.pptx
Exploring_Network_Security_with_JA3_by_Rakesh Seal.pptx
 
young call girls in Rajiv Chowk🔝 9953056974 🔝 Delhi escort Service
young call girls in Rajiv Chowk🔝 9953056974 🔝 Delhi escort Serviceyoung call girls in Rajiv Chowk🔝 9953056974 🔝 Delhi escort Service
young call girls in Rajiv Chowk🔝 9953056974 🔝 Delhi escort Service
 
main PPT.pptx of girls hostel security using rfid
main PPT.pptx of girls hostel security using rfidmain PPT.pptx of girls hostel security using rfid
main PPT.pptx of girls hostel security using rfid
 
Artificial-Intelligence-in-Electronics (K).pptx
Artificial-Intelligence-in-Electronics (K).pptxArtificial-Intelligence-in-Electronics (K).pptx
Artificial-Intelligence-in-Electronics (K).pptx
 

10 instruction sets characteristics

  • 1. William Stallings Computer Organization and Architecture 7th Edition Chapter 10 Instruction Sets: Characteristics and Functions
  • 2. What is an Instruction Set? • The complete collection of instructions that are understood by a CPU • Machine Code • Binary • Usually represented by assembly codes
  • 3. Elements of an Instruction • Operation code (Op code) —Do this • Source Operand reference —To this • Result Operand reference —Put the answer here • Next Instruction Reference —When you have done that, do this...
  • 4. Where have all the Operands Gone? • Long time passing…. • (If you don’t understand, you’re too young!) • Main memory (or virtual memory or cache) • CPU register • I/O device
  • 6. Instruction Representation • In machine code each instruction has a unique bit pattern • For human consumption (well, programmers anyway) a symbolic representation is used —e.g. ADD, SUB, LOAD • Operands can also be represented in this way —ADD A,B
  • 8. Instruction Types • Data processing • Data storage (main memory) • Data movement (I/O) • Program flow control
  • 9. Number of Addresses (a) • 3 addresses —Operand 1, Operand 2, Result —a = b + c; —May be a forth - next instruction (usually implicit) —Not common —Needs very long words to hold everything
  • 10. Number of Addresses (b) • 2 addresses —One address doubles as operand and result —a = a + b —Reduces length of instruction —Requires some extra work – Temporary storage to hold some results
  • 11. Number of Addresses (c) • 1 address —Implicit second address —Usually a register (accumulator) —Common on early machines
  • 12. Number of Addresses (d) • 0 (zero) addresses —All addresses implicit —Uses a stack —e.g. push a — push b — add — pop c —c = a + b
  • 13. How Many Addresses • More addresses —More complex (powerful?) instructions —More registers – Inter-register operations are quicker —Fewer instructions per program • Fewer addresses —Less complex (powerful?) instructions —More instructions per program —Faster fetch/execution of instructions
  • 14. Design Decisions (1) • Operation repertoire —How many ops? —What can they do? —How complex are they? • Data types • Instruction formats —Length of op code field —Number of addresses
  • 15. Design Decisions (2) • Registers —Number of CPU registers available —Which operations can be performed on which registers? • Addressing modes (later…) • RISC v CISC
  • 16. Types of Operand • Addresses • Numbers —Integer/floating point • Characters —ASCII etc. • Logical Data —Bits or flags • (Aside: Is there any difference between numbers and characters? Ask a C programmer!)
  • 17. Pentium Data Types • 8 bit Byte • 16 bit word • 32 bit double word • 64 bit quad word • Addressing is by 8 bit unit • A 32 bit double word is read at addresses divisible by 4
  • 18. Specific Data Types • General - arbitrary binary contents • Integer - single binary value • Ordinal - unsigned integer • Unpacked BCD - One digit per byte • Packed BCD - 2 BCD digits per byte • Near Pointer - 32 bit offset within segment • Bit field • Byte String • Floating Point
  • 20. PowerPC Data Types • 8 (byte), 16 (halfword), 32 (word) and 64 (doubleword) length data types • Some instructions need operand aligned on 32 bit boundary • Can be big- or little-endian • Fixed point processor recognises: —Unsigned byte, unsigned halfword, signed halfword, unsigned word, signed word, unsigned doubleword, byte string (<128 bytes) • Floating point —IEEE 754 —Single or double precision
  • 21. Types of Operation • Data Transfer • Arithmetic • Logical • Conversion • I/O • System Control • Transfer of Control
  • 22. Data Transfer • Specify —Source —Destination —Amount of data • May be different instructions for different movements —e.g. IBM 370 • Or one instruction and different addresses —e.g. VAX
  • 23. Arithmetic • Add, Subtract, Multiply, Divide • Signed Integer • Floating point ? • May include —Increment (a++) —Decrement (a--) —Negate (-a)
  • 24. Shift and Rotate Operations
  • 27. Input/Output • May be specific instructions • May be done using data movement instructions (memory mapped) • May be done by a separate controller (DMA)
  • 28. Systems Control • Privileged instructions • CPU needs to be in specific state —Ring 0 on 80386+ —Kernel mode • For operating systems use
  • 29. Transfer of Control • Branch —e.g. branch to x if result is zero • Skip —e.g. increment and skip if zero —ISZ Register1 —Branch xxxx —ADD A • Subroutine call —c.f. interrupt call
  • 33. Stack Frame Growth Using Sample Procedures P and Q
  • 34. Exercise For Reader • Find out about instruction set for Pentium and PowerPC • Start with Stallings • Visit web sites
  • 35. Byte Order (A portion of chips?) • What order do we read numbers that occupy more than one byte • e.g. (numbers in hex to make it easy to read) • 12345678 can be stored in 4x8bit locations as follows
  • 36. Byte Order (example) • Address Value (1) Value(2) • 184 12 78 • 185 34 56 • 186 56 34 • 186 78 12 • i.e. read top down or bottom up?
  • 37. Byte Order Names • The problem is called Endian • The system on the left has the least significant byte in the lowest address • This is called big-endian • The system on the right has the least significant byte in the highest address • This is called little-endian
  • 38. Example of C Data Structure
  • 39. Alternative View of Memory Map
  • 40. Standard…What Standard? • Pentium (80x86), VAX are little-endian • IBM 370, Moterola 680x0 (Mac), and most RISC are big-endian • Internet is big-endian —Makes writing Internet programs on PC more awkward! —WinSock provides htoi and itoh (Host to Internet & Internet to Host) functions to convert