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 The combinational logic requires for the
realization of a state machines can be done
using a ROM,PLA or PAL.
 Such systems have a capability of changing
the state machines output by changing the
program of PLD.
 The state machines realized using PLDs will
require less number of chips.
COMBINATIONAL PLD-BASED STATE MACHINES
 In some applications, the output sequence of
state machines need modification. This
requires a change in IFL so as to control a
new sequence. We may use PLDs for
implementing IFLs in such cases.
 It is possible to program a PLD in order to
create the correct signals which drive the
state flip flops.
COMBINATIONAL PLD-BASED STATE MACHINES
 If the sequence of state machine is to be
changed then it can be achieved simply by
replacing the techniques would not be easy.
 This concept of changeable ROM cartiges has
become very popular for state machines as well
as microprocessor control.
COMBINATIONAL PLD-BASED STATE MACHINES
COMBINATIONAL PLD-BASED STATE MACHINES
 PLD-(Programmable Logic Device)
• PLD are special type of ICs which can be
programmed by the users as per their
requirements.
• Therefore it is possible to implement a
combinational or sequential circuit using the
PLD Ics.
COMBINATIONAL PLD-BASED STATE MACHINES
 PLA-(Programmable Logic Array)
 There are two types of PLDs namely the PLA
i.e. Programmable logic arrays and PAL i.e.
The programmable array logic .Due to the use
of AND matrix followed by OR matrix, we can
use them for the implementation of logic
function in the SOP form.
 The output are connected to the device pins
through inverting buffers and flip flops.
 PAL-(Programmable Array Logic)
• PAL is the most commonly used type of PLD.
It is a programmable array of logic gates.
• The special feature of PAL is that it has a
programmable AND array and a fixed OR
array.
COMBINATIONAL PLD-BASED STATE MACHINES
 ROM-(Read Only Memory)
 can hold data permanently.
 It can be programmes only once by the
manufacturer as per the requirements of the
user.
◦ Originally not thought of as a programmable
device at all – simply a memory for holding
machine specific information, such as the
control store operation.
COMBINATIONAL PLD-BASED STATE MACHINES
 The IFL can be changed very quickly.
 The same EPROM can be erased and
reprogrammed any number of times.
 It is possible to debug and modify the system
under software control.
COMBINATIONAL PLD-BASED STATE MACHINES
ADVANTAGES OF ‘ROM’
 Values stored in registers represent the state
of the circuit
 Combinational logic computes:
◦ Next state
 Function of current state and inputs
◦ Outputs
 Function of current state and inputs (Mealy machine)
 Function of current state only (Moore machine)
Inputs
Outputs
Next State
Current State
output
logic
next state
logic
 States: S1, S2, ..., Sk
 Inputs: I1, I2, ..., Im
 Outputs: O1, O2, ..., On
 Transition function: Fs(Si, Ij)
 Output function: Fo(Si) or Fo(Si, Ij)
Inputs
Outputs
Next State
Current State
output
logic
next state
logic
Clock
Next State
State
0 1 2 3 4 5
THANK
YOU

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COMBINATIONAL PLD-BASED STATE MACHINES

  • 1.
  • 2.  The combinational logic requires for the realization of a state machines can be done using a ROM,PLA or PAL.  Such systems have a capability of changing the state machines output by changing the program of PLD.  The state machines realized using PLDs will require less number of chips. COMBINATIONAL PLD-BASED STATE MACHINES
  • 3.  In some applications, the output sequence of state machines need modification. This requires a change in IFL so as to control a new sequence. We may use PLDs for implementing IFLs in such cases.  It is possible to program a PLD in order to create the correct signals which drive the state flip flops. COMBINATIONAL PLD-BASED STATE MACHINES
  • 4.  If the sequence of state machine is to be changed then it can be achieved simply by replacing the techniques would not be easy.  This concept of changeable ROM cartiges has become very popular for state machines as well as microprocessor control. COMBINATIONAL PLD-BASED STATE MACHINES
  • 5. COMBINATIONAL PLD-BASED STATE MACHINES  PLD-(Programmable Logic Device) • PLD are special type of ICs which can be programmed by the users as per their requirements. • Therefore it is possible to implement a combinational or sequential circuit using the PLD Ics.
  • 6. COMBINATIONAL PLD-BASED STATE MACHINES  PLA-(Programmable Logic Array)  There are two types of PLDs namely the PLA i.e. Programmable logic arrays and PAL i.e. The programmable array logic .Due to the use of AND matrix followed by OR matrix, we can use them for the implementation of logic function in the SOP form.  The output are connected to the device pins through inverting buffers and flip flops.
  • 7.  PAL-(Programmable Array Logic) • PAL is the most commonly used type of PLD. It is a programmable array of logic gates. • The special feature of PAL is that it has a programmable AND array and a fixed OR array. COMBINATIONAL PLD-BASED STATE MACHINES
  • 8.  ROM-(Read Only Memory)  can hold data permanently.  It can be programmes only once by the manufacturer as per the requirements of the user. ◦ Originally not thought of as a programmable device at all – simply a memory for holding machine specific information, such as the control store operation. COMBINATIONAL PLD-BASED STATE MACHINES
  • 9.  The IFL can be changed very quickly.  The same EPROM can be erased and reprogrammed any number of times.  It is possible to debug and modify the system under software control. COMBINATIONAL PLD-BASED STATE MACHINES ADVANTAGES OF ‘ROM’
  • 10.  Values stored in registers represent the state of the circuit  Combinational logic computes: ◦ Next state  Function of current state and inputs ◦ Outputs  Function of current state and inputs (Mealy machine)  Function of current state only (Moore machine) Inputs Outputs Next State Current State output logic next state logic
  • 11.  States: S1, S2, ..., Sk  Inputs: I1, I2, ..., Im  Outputs: O1, O2, ..., On  Transition function: Fs(Si, Ij)  Output function: Fo(Si) or Fo(Si, Ij) Inputs Outputs Next State Current State output logic next state logic Clock Next State State 0 1 2 3 4 5