Looking For a Job Change in VLSI.

1. ACADEMICS
AREAS OF EXPERTISE
ÿ Technical Skills: 8051, 8086,LabVIEW Basics, Cadence, Xilinx(VHDL), Verilog, C,Ocean,Tcl,Shell scripting,Asic flow.
ÿ Operating Systems known: Redhat, Windows
ÿ Areas of Interest: VLSI, Digital Electronics, Analog Circuits, Embedded System, Automation
ÿ Project: Design and implementation of a efficient arithmetic divider based on vedic mathematicsTeam Size:1 Duration:6
Months
o Study of conventional divider with vedic dividers in the case of area . And making a vedic ALU
O Role: Programmingand Modeling.
o Technology: Xilinx.
ÿ Project:VEDIC MULTIPLIER DESIGNS-UrdhvaTiryakbhyam a study Team Team Size:1 Duration:6 Months
o This is a attendance register making using mat lab which can be implemented in school.
o Role: Programming and Modeling.
o Technology: Detecting the sound, identify and register in spared sheet.
ÿ Project:VODAR Team Size:5 Duration:6 Months
o This is a attendance register making using mat lab which can be implemented in school.
o Role: Programming and Modeling.
o Technology: Detecting the sound, identify and register in spared sheet.
ÿ Project:PROGRAMMABLE VEHICLE Team Size:5 Duration:3 Months
o This is a peon type vehicle using Arduino board which can be implemented in office.
o Role: Programming, Hardware Implementation and Modelling.
o Technology: Path Detection, Moving for given path.
COURSE INSTITUTION AGGREGATE YEAR
M.Tech(VLSI and Embedded systems) Govt. Engineering College,Idukki 7.98 2013-2015
B.Tech (Electronics and Communication Engineering) Govt Engineering College,sreekrishnapuram 67.7% 2008-2012
Class XII CMS Higher Secondary
School,Thrissur(State)
78% 2007
Class X Santha Higher Secondary
School,Thrissur(State)
88% 2005
Anuraj v
+91 9495133149
anurajavanoor@gmail.com
PROJECTS

2. SEMINARS
ÿ Seminars:Vedic Mathematics Based Multiplier.
o Trying to understand the vedic multiplication techniques.
ÿ Seminars: 3-Nanometer Nanowire Silicon Circuits.
o FET, changes of gate like a wires.
ÿ Seminars:A corpus based approach to speech enhancement from non-
stationary noise.
OIn the case of speech processing how to reduce the noise effect.
WORK EXPERIENCE
ÿ Software Engineer (Main frame) at UST global from sep-2013 to Nov-2013
ÿ Engineering intern at Entuple technologies, Bengaluru from 7-may-2015 to 31-Dec-2015.
ÿ Graduate Engineer Trainee at Entuple technologies, Bengaluru from 1-Jan-2016 to 1-Jul-2016.
ÿ Field Application Engineer at Entuple technologies, Bengaluru from 1-Jul-2016 to present.
ACHIEVEMENTS AND PUBLICATIONS
ÿ 3-Nanometer Nanowire Silicon Circuits ,GECIAN National Conference on Communication and Signal Processing (CASP - 2014),
March 27, 2014
ÿ Implementation of Vedic maths in fpga,GECIAN National Conference on Communication and Signal Processing (CASP - 2015),
September 29, 2015
ACHIEVEMENTS AND PUBLICATIONS
ÿ Participant in film festival at Govt.Engg.College pallakkad as a film maker “Pennum lahariyum”.
ACHIEVEMENTS AND PUBLICATIONS
ÿ Shajahan E S , Associate professor, Govt. Engg. College Idukki, 9447594170, shajes2007@gmail.com
Vattaparambil house, Avanoor, Thrissur, PIN: 680541