COMPUTER ARCHITECTURE UNIT-3 MEMORY

1. MEMORY
UNIT-3
ANKUR SRIVASTAVA
Assistant Professor,
Dept of CSE,
JETGI, Barabanki

2. BRAIN vs. MEMORY

3. WHAT WE WILL LEARN IN THIS LECTURE
Memory technologies
Hierarchal organization
Principle of locality
Analysis of hierarchy
Simple case organizations

4. Hierarchy

5. Semiconductor Memory

6. Semiconductor Memory Types

7. Read Only Memory (ROM)
• Permanent storage
• Nonvolatile
• Microprogramming (see later)
• Library subroutines
• Systems programs (BIOS)
• Function tables

8. Types of ROM
• Written during manufacture
• Very expensive for small runs
• Programmable (once)
• PROM
• Needs special equipment to program
• Read “mostly”
• Erasable Programmable (EPROM)
• Erased by UV
• Electrically Erasable (EEPROM)
• Takes much longer to write than read
• Flash memory
• Erase whole memory electrically, no byte-level erase
• But much faster write

9. Memory Organization Designs
• Physical arrangement is same as logical
• A 16Mbit chip is organized as 1M of 16 bit words
• One bit per chip system
• 16 instances of 1Mbit chips, with bit 1 of each word in chip 1 and so on
• A 16Mbit chip can be organised as a 2048 x 2048 x 4bit
array
• 16M = 224 = 211 * 211 * 4
• Reduces number of address pins
• Multiplex row address and column address
• 11 pins to address (211=2048)
• Adding one more pin doubles range of values so x4 capacity (because
each dimension of the square array is doubled)

10. Typical 16 Mb DRAM (4M x 4)

11. TYPICAL SPECIFICATIONS OF COMPUTERS TODAY

12. MEMORY TECHNOLOGIES
SEMICONDUCTOR
Register
SRAM
DRAM
FLASH
MAGNETIC
FDD
HDD
OPTICAL
CD
DVD
Random access
Random + sequentional

13. HIERARCHAL STRUCTURE
SPEED
CPU
SIZE COST/ BIT
Fastest
Memory
Slowest
Highest
Fastest
Memory
Memory
Biggest Lowest

14. DATA TRANSFER BETWEEN LEVELS

15. PRINCIPLE OF LOCALITY
Temporal locality
References repeated in time
The concept that a resource that is referenced at one point in time will be referenced again sometime in
the near future.
Spatial locality
Reference repeated in space
Special case: sequential locality
The concept that likelihood of referencing a resource is higher if a resource near it was just referenced.

16. MEMORY HIERARCHY ANALYSIS

17. CACHE ACCESS EXAMPLE.
Before the reference to Xn After the reference to Xn
X4 X4
X1 X1
Xn-2 Xn-2
Xn-1 Xn-1
X2 X2
X3 X3

18. DIRECT MAPPED CACHE

19. CACHE ACCESS MECHANISM

20. CACHE WITH 4 WORD BLOCKS

21. QUESTIONS
MM SIZE CACHE
SIZE
BLOCK
SIZE
TAG BITS TAG
DIRECTOR
Y
128 KB 16KB 256 B ------- -------
32 GB 32KB 1KB ------- -------
------- 512 KB 1 KB 7 -------

22. MORE FLEXIBLE BLOCK ARRANGEMENT

23. FULLY ASSOCIATIVE CACHE
Question:-
MM:- 32 GB
BLOCK:- 32 KB
TAG= ?
Propagation Delay Of Comparator=10 K ns
PD of OR Gate= 10 ns
HL=?

24. SET ASSOCIATIVE CACHE
MM SIZE CACHE SIZE BLOCK SIZE TAG BITS TAG
DIRESTOR
Y
SET
ASSOCIATIV
E
128 KB 16KB 256B ----- ----- 2-WAY
32GB 32KB 1KB ----- ----- 4-WAY
----- 512KB 1KB 7 ------ 8-WAY

25. 16 17 18 19
20 21 22 23
24 25 26 27
28 29 30 31
32 33 34 35
36 37 38 39
40 41 42 43
44 45 46 47
48 49 50 51
52 53 54 55
56 57 58 59
60 61 62 63
52 53 54 55
40 41 42 43
12 13 14 15
0 1 2 3
4 5 6 7
8 9 10 11
12 13 14 15
01
11
10
00
01 00 11
01 11 11
11 01 01
10 10 11
MORE EXAMPLE OF DIRECT MAPPING
TAG LINE BO

26. MORE EXAMPLE OF SET ASSOCIATIVE MAPPING
0 1 2 3
4 5 6 7
8 9 10 11
12 13 14 15
16 17 18 19
20 21 22 23
24 25 26 27
28 29 30 31
32 33 34 35
36 37 38 39
40 41 42 43
44 45 46 47
48 49 50 51
52 53 54 55
56 57 58 59
60 61 62 63
0
1
2
3
4
5
6
7
0,4
1,5
2,6
3,7
TAG SET BO

27. MORE EXAMPLE OF FULLY ASSOCIATIVE MAPPING
0 1 2 3
4 5 6 7
8 9 10 11
12 13 14 15
16 17 18 19
20 21 22 23
24 25 26 27
28 29 30 31
32 33 34 35
36 37 38 39
40 41 42 43
44 45 46 47
48 49 50 51
52 53 54 55
56 57 58 59
60 61 62 63
TAG BO

28. THANK YOU!