a ppt on digital electronics's topic flip flops and its converisons.

1. Presentation on,
FLIP-FLOP CONVERSION
Presented By,
1. Vrajrajsinh Parmar-160450107027
2. Parmar Yuvraj-160450107028
3. Patel Mihir-160450107038
4. Patel Shubham-160450107041
5. Rana Smit-160450107048
Guided By,
Rahul Patel
Electronics & Communication Department
Shri S’ad Vidya Mandal Institute of Technology, Bharuch

2. FLIP FLOP CONVERSIONS
• SR to D
• SR to JK
• SR to T
• JK to T
• JK to D
• JK to SR
• D to T
• D to SR
• T to D

3. PROCEDURE FOR CONVERSION
1. Draw the block diagram of the target flip flop from the given problem.
2. Write truth table for the target flip-flop.
3. Write excitation table for the available flip-flop.
4. Draw k-map for target flip-flop.
5. Draw the block diagram.

4. Input
Present
state
Flip flop InputsNext state
D Q n SQn+1 R
0 0 0 X
0 0 00 1
1 0 11 0
1 1 X1 0
SR(Available) to D(Target) Flip flop Conversion
Truth table(Target) Excitation table(Available)
Present
state
Next
state
Q n Qn+1
0 0
1 0
0 1
1 1
0

5. Input
Present
state
Flip flop InputsNext state
D Q n SQn+1 R
0 0 0 X
0 1 0 1
1 0 11 0
1 1 X1 0
SR to D Flip flop Conversion
K- MAP SIMPLIFICATION
Conversion Table
0
0

6. SR(Available) to JK(Target) Flip-Flop
1 1 01 0 1
Input Next State
Present
State
J K Qn+1Q n S
0 0 0 0
0 0 1 X
0 1 00 0
0 1 01 0
Flip-Flop Inputs
R
X
0
X
1
1 0 10 1 0
1 0 11 X 0
1 1 10 1 0
0
1
Conversion Table

7. SR to JK
K-map Simplification Logic Diagram (SR to JK)

8. SR(Available) to T(Target)
Input
Present
state
Flip flop InputsNext state
T Q n SQn+1 R
0 0 00 X
0 1 X1 0
1 0 11 0
1 1 00 1
K- MAP SIMPLIFICATION
Conversion Table

9. Logic Diagram (SR to T)

10. JK(Available) to T (Target)Conversion
Input
Present
state
Flip flop Inputs
Next
state
T Q n JQn+1 K
0 0 00 X
0 1 X1 0
1 0 11 x
1 1 x0 1
K- MAP SIMPLIFICATION
Conversion Table

11. Logic Diagram (JK to T)

12. JK(Available) to D(Target)Flip-flop Conversion
Input
Present
state
Flip flop Inputs
Next
state
D Q n JQn+1 K
0 0 00 X
0 1 X0 1
1 0 11 x
1 1 x1 0
K- MAP SIMPLIFICATION
Conversion Table

13. Logic Diagram (JK to D)

14. D(Available) to T(Target)Flip-Flop
Input
Present
state
Next state
T Q n Qn+1
0 0 0
0 1 1
1 0 1
1 1 0
D
0
1
0
1
Flip flop
Inputs
K- MAP SIMPLIFICATION
Conversion Table

15. Logic Diagram(D to T)

16. T (Available) to D(Target) Flip-flop Conversion
Input
Present
state
Next state
D Q n Qn+1
0 0 0
0 1 0
1 0 1
1 1 1
T
0
1
0
1
Flip flop
Inputs K- MAP
SIMPLIFICATION
Conversion Table

17. JK(Available) to SR(Target)Flip-flop conversion
Input Next State
Present
State
S R Qn+1Q n J
0 0 0 0
0 0 1 X
0 1 00 0
0 1 01 X
Flip-Flop Inputs
K
X
0
X
1
1 0 10 1 X
1 0 11 X 0
1 1 X0 X X
0
1
1 1 X1 X X
Conversion Table

18. JK(Available) to
SR(Target)Flip-flop
conversion Logic Diagram

19. D(Available) to SR(Target) Flip-Flop Conversion
Input
Next
State
Present
State
S R Qn+1Q n J
0 0 0 0
0 0 1 1
0 1 00 0
0 1 01 0
Flip-Flop Inputs
K
0
1
0
0
1 0 10 1 1
1 0 11 1 1
1 1 X0 X X
0
1
1 1 X1 X X
Conversion Table

20. D to SR
K- MAP SIMPLIFICATION Logic Diagram