SlideShare a Scribd company logo
1 of 9
ACCUMULATOR LOGIC
BY : SHIVAM BHARTI 
Inputs for Accumulator
 Set of 16 inputs come from the output of AC.
 Set of 16 inputs come from the output of DR.
 Set of 8 inputs come from the output of Input Register.
 The output of the adder and logic circuit provides the data input for the register.
Statements for Accumulator
 D0T5 : AC  AC ٨ DR AND with DR
 D1T5 : AC  AC + DR Add with DR
 D2T5 : AC  DR Transfer from DR
 pB11 : AC (0-7)  INPR Transfer from INPR
 rB9 : AC  AC Complement
 rB7 : AC  shr AC, AC (15)  E Shift right
 rB6 : AC  shl AC, AC (0)  E Shift left
 rB11 : AC  0 Clear
 rB5 : AC  AC +1 Increment
Circuits associated with Accumulator
Adder and logic
circuit
Accumulator register
Control gates
16
16
16
From DR
From INPR
16 16
LD
IN
R CLR
CLOCK
Control of AC Register
AccumulatorD0
T5
B9
D1
D2
r
B11
B7
B11
B5
B6
p
T5
AND
ADD
DR
INPR
COM
SHR
SHL
INC
CLR
16 16 to
BUS
clock
LD
INR CLR
From Adder and Logic
Control of AC Register……….
 The control function for the clear micro-operation is rB11 , where r = D7I’T3 and B11=IR(11).
 The output of the AND gate that generates this control function is connected to the CLR input of
the INR input of the register.
 The seven micro-operation are generated in the adder and logic circuit and are loaded into AC
at proper time.
Adder and Logic Circuit
 One stage of adder
and logic circuit
Stages of Adder and Logic circuit
 The adder and logic circuit can be sub-divided into 16 stages, with each bit corresponding to one
bit of AC.
 One stage of the adder and logic circuit consists of seven AND gates one OR gate and a full
adder (FA) as shown above.
 The input is labelled Ii output AC(i).
 When LD input is enabled, the 16 inputs Ii for i=0,1,2…15 are transferred to AC(i).
 The AND operation is achieved by AND ing AC(i) with the corresponding bit in DR(i).
 The transfer from INPR to AC is only for bits 0 through 7.
 The complement micro-operation is obtained by inverting the bit value in AC.
 Shift-right operation transfers bit from AC(i+1) and shift-left operation transfers the bit from AC(i-
1).
 The complete adder and logic circuit consists of 16 stages connected together.
Thanks………… 

More Related Content

What's hot

Microprogram Control
Microprogram Control Microprogram Control
Microprogram Control Anuj Modi
 
Register transfer and micro-operation
Register transfer and micro-operationRegister transfer and micro-operation
Register transfer and micro-operationNikhil Pandit
 
Instruction codes and computer registers
Instruction codes and computer registersInstruction codes and computer registers
Instruction codes and computer registersSanjeev Patel
 
Stack organization
Stack organizationStack organization
Stack organizationchauhankapil
 
Logic microoperations
Logic microoperationsLogic microoperations
Logic microoperationsNitesh Singh
 
Memory reference instruction
Memory reference instructionMemory reference instruction
Memory reference instructionSanjeev Patel
 
Computer Organisation - Addressing Modes
Computer Organisation - Addressing ModesComputer Organisation - Addressing Modes
Computer Organisation - Addressing ModesArunaDevi63
 
Addressing Modes
Addressing ModesAddressing Modes
Addressing ModesMayank Garg
 
bus and memory tranfer (computer organaization)
bus and memory tranfer (computer organaization)bus and memory tranfer (computer organaization)
bus and memory tranfer (computer organaization)Siddhi Viradiya
 
Control Unit Design
Control Unit DesignControl Unit Design
Control Unit DesignVinit Raut
 
General register organization (computer organization)
General register organization  (computer organization)General register organization  (computer organization)
General register organization (computer organization)rishi ram khanal
 
Timing and control
Timing and controlTiming and control
Timing and controlchauhankapil
 
Instruction cycle
Instruction cycleInstruction cycle
Instruction cycleKumar
 
Computer architecture input output organization
Computer architecture input output organizationComputer architecture input output organization
Computer architecture input output organizationMazin Alwaaly
 
8086 microprocessor-architecture
8086 microprocessor-architecture8086 microprocessor-architecture
8086 microprocessor-architectureprasadpawaskar
 

What's hot (20)

Addressing modes
Addressing modesAddressing modes
Addressing modes
 
Microprogram Control
Microprogram Control Microprogram Control
Microprogram Control
 
Register transfer and micro-operation
Register transfer and micro-operationRegister transfer and micro-operation
Register transfer and micro-operation
 
Microprogrammed Control Unit
Microprogrammed Control UnitMicroprogrammed Control Unit
Microprogrammed Control Unit
 
Instruction codes and computer registers
Instruction codes and computer registersInstruction codes and computer registers
Instruction codes and computer registers
 
Stack organization
Stack organizationStack organization
Stack organization
 
Logic microoperations
Logic microoperationsLogic microoperations
Logic microoperations
 
Memory reference instruction
Memory reference instructionMemory reference instruction
Memory reference instruction
 
INSTRUCTION CYCLE
INSTRUCTION CYCLEINSTRUCTION CYCLE
INSTRUCTION CYCLE
 
Instruction format
Instruction formatInstruction format
Instruction format
 
design of accumlator
design of accumlatordesign of accumlator
design of accumlator
 
Computer Organisation - Addressing Modes
Computer Organisation - Addressing ModesComputer Organisation - Addressing Modes
Computer Organisation - Addressing Modes
 
Addressing Modes
Addressing ModesAddressing Modes
Addressing Modes
 
bus and memory tranfer (computer organaization)
bus and memory tranfer (computer organaization)bus and memory tranfer (computer organaization)
bus and memory tranfer (computer organaization)
 
Control Unit Design
Control Unit DesignControl Unit Design
Control Unit Design
 
General register organization (computer organization)
General register organization  (computer organization)General register organization  (computer organization)
General register organization (computer organization)
 
Timing and control
Timing and controlTiming and control
Timing and control
 
Instruction cycle
Instruction cycleInstruction cycle
Instruction cycle
 
Computer architecture input output organization
Computer architecture input output organizationComputer architecture input output organization
Computer architecture input output organization
 
8086 microprocessor-architecture
8086 microprocessor-architecture8086 microprocessor-architecture
8086 microprocessor-architecture
 

Viewers also liked

Design of accumulator Based 3-Weight Pattern Generation using LP-LSFR
Design of accumulator Based 3-Weight Pattern Generation using LP-LSFRDesign of accumulator Based 3-Weight Pattern Generation using LP-LSFR
Design of accumulator Based 3-Weight Pattern Generation using LP-LSFRIOSR Journals
 
ALU arithmetic logic unit
ALU  arithmetic logic unitALU  arithmetic logic unit
ALU arithmetic logic unitKarthik Prof.
 
2-bit comparator
2-bit comparator2-bit comparator
2-bit comparatorIslam Adel
 
ControlLogix Counters FA16
ControlLogix Counters FA16ControlLogix Counters FA16
ControlLogix Counters FA16John Todora
 
Basic computer organization
Basic computer organizationBasic computer organization
Basic computer organizationNitesh Singh
 
Basic MIPS implementation
Basic MIPS implementationBasic MIPS implementation
Basic MIPS implementationkavitha2009
 
Processor organization & register organization
Processor organization & register organizationProcessor organization & register organization
Processor organization & register organizationGhanshyam Patel
 
Computer organisation
Computer organisationComputer organisation
Computer organisationMohd Arif
 
Basic computer organisation design
Basic computer organisation designBasic computer organisation design
Basic computer organisation designSanjeev Patel
 
10 chapter05 counters_fa14
10 chapter05 counters_fa1410 chapter05 counters_fa14
10 chapter05 counters_fa14John Todora
 
Lec18 pipeline
Lec18 pipelineLec18 pipeline
Lec18 pipelineGRajendra
 
Register organization, stack
Register organization, stackRegister organization, stack
Register organization, stackAsif Iqbal
 
IMAX PRESENTATION
IMAX PRESENTATIONIMAX PRESENTATION
IMAX PRESENTATIONSebby23
 

Viewers also liked (20)

Design of accumulator Based 3-Weight Pattern Generation using LP-LSFR
Design of accumulator Based 3-Weight Pattern Generation using LP-LSFRDesign of accumulator Based 3-Weight Pattern Generation using LP-LSFR
Design of accumulator Based 3-Weight Pattern Generation using LP-LSFR
 
ALU arithmetic logic unit
ALU  arithmetic logic unitALU  arithmetic logic unit
ALU arithmetic logic unit
 
2-bit comparator
2-bit comparator2-bit comparator
2-bit comparator
 
ControlLogix Counters FA16
ControlLogix Counters FA16ControlLogix Counters FA16
ControlLogix Counters FA16
 
Basic computer organization
Basic computer organizationBasic computer organization
Basic computer organization
 
Basic MIPS implementation
Basic MIPS implementationBasic MIPS implementation
Basic MIPS implementation
 
Lect12 organization
Lect12 organizationLect12 organization
Lect12 organization
 
Processor organization & register organization
Processor organization & register organizationProcessor organization & register organization
Processor organization & register organization
 
2.computer org.
2.computer org.2.computer org.
2.computer org.
 
3D GLASSES
3D GLASSES3D GLASSES
3D GLASSES
 
Computer organisation
Computer organisationComputer organisation
Computer organisation
 
Basic computer organisation design
Basic computer organisation designBasic computer organisation design
Basic computer organisation design
 
10 chapter05 counters_fa14
10 chapter05 counters_fa1410 chapter05 counters_fa14
10 chapter05 counters_fa14
 
3D Glasses PPt
3D Glasses PPt3D Glasses PPt
3D Glasses PPt
 
3d glasses
3d glasses 3d glasses
3d glasses
 
Lec18 pipeline
Lec18 pipelineLec18 pipeline
Lec18 pipeline
 
Register organization, stack
Register organization, stackRegister organization, stack
Register organization, stack
 
Parallel processing Concepts
Parallel processing ConceptsParallel processing Concepts
Parallel processing Concepts
 
Imax technology
Imax technology Imax technology
Imax technology
 
IMAX PRESENTATION
IMAX PRESENTATIONIMAX PRESENTATION
IMAX PRESENTATION
 

Similar to ACCUMULATOR LOGIC BREAKDOWN

Design of Accumulator Unit
Design of Accumulator UnitDesign of Accumulator Unit
Design of Accumulator UnitHarshad Koshti
 
AVR_Course_Day6 external hardware interrupts and analogue to digital converter
AVR_Course_Day6 external hardware  interrupts and analogue to digital converterAVR_Course_Day6 external hardware  interrupts and analogue to digital converter
AVR_Course_Day6 external hardware interrupts and analogue to digital converterMohamed Ali
 
Lecture 04 Logical Group of Instructions
Lecture 04 Logical Group of InstructionsLecture 04 Logical Group of Instructions
Lecture 04 Logical Group of InstructionsZeeshan Ahmed
 
Mc module5 lcd_interface_ppt_msj
Mc module5 lcd_interface_ppt_msjMc module5 lcd_interface_ppt_msj
Mc module5 lcd_interface_ppt_msjmangala jolad
 
Lab 9 D-Flip Flops: Shift Register and Sequence Counter
Lab 9 D-Flip Flops: Shift Register and Sequence CounterLab 9 D-Flip Flops: Shift Register and Sequence Counter
Lab 9 D-Flip Flops: Shift Register and Sequence CounterKatrina Little
 
DIGITAL VOLTMETER USING 8051 MICROCONTROLLER
DIGITAL VOLTMETER USING 8051 MICROCONTROLLERDIGITAL VOLTMETER USING 8051 MICROCONTROLLER
DIGITAL VOLTMETER USING 8051 MICROCONTROLLERChirag Lakhani
 
digitalvoltmeterusing805112b2-170214173216 (1).pdf
digitalvoltmeterusing805112b2-170214173216 (1).pdfdigitalvoltmeterusing805112b2-170214173216 (1).pdf
digitalvoltmeterusing805112b2-170214173216 (1).pdfsatyamsinha37
 
Registers and counters
Registers and countersRegisters and counters
Registers and countersHeman Pathak
 
adcanddac hai kya bhayy me know if-01.pptx
adcanddac hai kya bhayy me know if-01.pptxadcanddac hai kya bhayy me know if-01.pptx
adcanddac hai kya bhayy me know if-01.pptxshivraj3252
 
Io (2)
Io (2)Io (2)
Io (2)Aisu
 
Analog To Digital Conversion (ADC) Programming in LPC2148
Analog To Digital Conversion (ADC) Programming in LPC2148Analog To Digital Conversion (ADC) Programming in LPC2148
Analog To Digital Conversion (ADC) Programming in LPC2148Omkar Rane
 

Similar to ACCUMULATOR LOGIC BREAKDOWN (20)

Unit_2 (4).pptx
Unit_2 (4).pptxUnit_2 (4).pptx
Unit_2 (4).pptx
 
Design of Accumulator Unit
Design of Accumulator UnitDesign of Accumulator Unit
Design of Accumulator Unit
 
Chapter5 dek3133
Chapter5 dek3133Chapter5 dek3133
Chapter5 dek3133
 
AVR_Course_Day6 external hardware interrupts and analogue to digital converter
AVR_Course_Day6 external hardware  interrupts and analogue to digital converterAVR_Course_Day6 external hardware  interrupts and analogue to digital converter
AVR_Course_Day6 external hardware interrupts and analogue to digital converter
 
Adc interfacing
Adc interfacingAdc interfacing
Adc interfacing
 
Intel 8085 mp
Intel 8085 mpIntel 8085 mp
Intel 8085 mp
 
Lecture 04 Logical Group of Instructions
Lecture 04 Logical Group of InstructionsLecture 04 Logical Group of Instructions
Lecture 04 Logical Group of Instructions
 
Traffic signal design study
Traffic signal design studyTraffic signal design study
Traffic signal design study
 
Mc module5 lcd_interface_ppt_msj
Mc module5 lcd_interface_ppt_msjMc module5 lcd_interface_ppt_msj
Mc module5 lcd_interface_ppt_msj
 
8051 FINIAL
8051 FINIAL8051 FINIAL
8051 FINIAL
 
Lab 9 D-Flip Flops: Shift Register and Sequence Counter
Lab 9 D-Flip Flops: Shift Register and Sequence CounterLab 9 D-Flip Flops: Shift Register and Sequence Counter
Lab 9 D-Flip Flops: Shift Register and Sequence Counter
 
Pdf tp3076 national
Pdf tp3076 nationalPdf tp3076 national
Pdf tp3076 national
 
Lecture 12 (adc) rv01
Lecture 12  (adc) rv01Lecture 12  (adc) rv01
Lecture 12 (adc) rv01
 
DIGITAL VOLTMETER USING 8051 MICROCONTROLLER
DIGITAL VOLTMETER USING 8051 MICROCONTROLLERDIGITAL VOLTMETER USING 8051 MICROCONTROLLER
DIGITAL VOLTMETER USING 8051 MICROCONTROLLER
 
digitalvoltmeterusing805112b2-170214173216 (1).pdf
digitalvoltmeterusing805112b2-170214173216 (1).pdfdigitalvoltmeterusing805112b2-170214173216 (1).pdf
digitalvoltmeterusing805112b2-170214173216 (1).pdf
 
Registers and counters
Registers and countersRegisters and counters
Registers and counters
 
adcanddac hai kya bhayy me know if-01.pptx
adcanddac hai kya bhayy me know if-01.pptxadcanddac hai kya bhayy me know if-01.pptx
adcanddac hai kya bhayy me know if-01.pptx
 
Io (2)
Io (2)Io (2)
Io (2)
 
Dee2034 chapter 6 register
Dee2034 chapter 6 registerDee2034 chapter 6 register
Dee2034 chapter 6 register
 
Analog To Digital Conversion (ADC) Programming in LPC2148
Analog To Digital Conversion (ADC) Programming in LPC2148Analog To Digital Conversion (ADC) Programming in LPC2148
Analog To Digital Conversion (ADC) Programming in LPC2148
 

ACCUMULATOR LOGIC BREAKDOWN

  • 1. ACCUMULATOR LOGIC BY : SHIVAM BHARTI 
  • 2. Inputs for Accumulator  Set of 16 inputs come from the output of AC.  Set of 16 inputs come from the output of DR.  Set of 8 inputs come from the output of Input Register.  The output of the adder and logic circuit provides the data input for the register.
  • 3. Statements for Accumulator  D0T5 : AC  AC ٨ DR AND with DR  D1T5 : AC  AC + DR Add with DR  D2T5 : AC  DR Transfer from DR  pB11 : AC (0-7)  INPR Transfer from INPR  rB9 : AC  AC Complement  rB7 : AC  shr AC, AC (15)  E Shift right  rB6 : AC  shl AC, AC (0)  E Shift left  rB11 : AC  0 Clear  rB5 : AC  AC +1 Increment
  • 4. Circuits associated with Accumulator Adder and logic circuit Accumulator register Control gates 16 16 16 From DR From INPR 16 16 LD IN R CLR CLOCK
  • 5. Control of AC Register AccumulatorD0 T5 B9 D1 D2 r B11 B7 B11 B5 B6 p T5 AND ADD DR INPR COM SHR SHL INC CLR 16 16 to BUS clock LD INR CLR From Adder and Logic
  • 6. Control of AC Register……….  The control function for the clear micro-operation is rB11 , where r = D7I’T3 and B11=IR(11).  The output of the AND gate that generates this control function is connected to the CLR input of the INR input of the register.  The seven micro-operation are generated in the adder and logic circuit and are loaded into AC at proper time.
  • 7. Adder and Logic Circuit  One stage of adder and logic circuit
  • 8. Stages of Adder and Logic circuit  The adder and logic circuit can be sub-divided into 16 stages, with each bit corresponding to one bit of AC.  One stage of the adder and logic circuit consists of seven AND gates one OR gate and a full adder (FA) as shown above.  The input is labelled Ii output AC(i).  When LD input is enabled, the 16 inputs Ii for i=0,1,2…15 are transferred to AC(i).  The AND operation is achieved by AND ing AC(i) with the corresponding bit in DR(i).  The transfer from INPR to AC is only for bits 0 through 7.  The complement micro-operation is obtained by inverting the bit value in AC.  Shift-right operation transfers bit from AC(i+1) and shift-left operation transfers the bit from AC(i- 1).  The complete adder and logic circuit consists of 16 stages connected together.