3.7 GHz Microwave Amplifier Design

ELEC 4502 Fall 2018
Project 2:
Design of a 3.7GHz Microwave Ampliﬁer
Submitted by: Rashad Alsaﬀar - 101006781
Due Date: December 23, 2018
Section: A1O

ELEC 4502 Project 2 Report Rashad Alsaffar - 101006781
Contents
1 Introduction 3
1.1 Design Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2 Design Process 4
2.1 DC Bias Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.2 DC Bias Schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.3 Device Stability Check . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2.3.1 Linville’s Method . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2.3.2 Stability Circles . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2.3.3 Device Stability Conclusions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.4 Design for Maximum Available Gain . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.4.1 Source/Load Reflection Coefficients . . . . . . . . . . . . . . . . . . . . . . . . 7
2.4.2 Normalized Source/Load Impedances . . . . . . . . . . . . . . . . . . . . . . . 8
2.4.3 Issues with MAG Design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.5 Matching Network Development via Smith Chart . . . . . . . . . . . . . . . . . . . . 10
2.5.1 Input Matching Network . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
2.5.2 Output Matching Network . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
2.6 Final Microwave Amplifier Design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
2.7 Amplifier Measurements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
2.7.1 Amplifier Gain, Return Loss . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
2.7.2 Amplifier Stability . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
2.7.3 Amplifier VSWR Response . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
3 Further Analysis 14
3.1 BFP450 S-Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
3.2 DC Bias Components, Transistor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
3.3 Solder and Feed Lines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
4 Conclusion 14
5 References 15
6 Appendix A: Sample Calculations 16
7 Appendix B: BFP450 S-Parameters 20

1 Introduction
Microwave amplifiers are designed to increase the radio frequency power of a high frequency signal
and producing a stable bandwidth while negating the effects of noise.
Our microwave amplifier design will utilize a BFP450 GaAsFET bipolar junction transistor. To
establish this we will encounter multiple design steps. A DC bias network was provided to us with
set capacitor and inductor S2P files. The Infineon BFP450 datasheet [1] provided S-parameter files
for set DC bias conditions, i.e. voltage and current driven from a DC supply. A selected DC appli-
cation voltage/current would be chosen for this particular application.
The first stage of the design procedure was to check the device’s stability characteristics. Infi-
neon provided several S2P files characterizing S-parameters for the BFP450 at multiple frequencies
tailored to a selected DC voltage/current [1]. The S-parameters were also determined through ADS
simulations of the BFP450 amplifier configuration with no input or output matching networks.
After determining the stability of the device, the design procedure could be tailored towards one
of two methods: maximum available gain (MAG) or maximum stable gain (MSG). Within each
method the conjugate input and output reflection coefficients Γ∗
in and Γ∗
out can be derived to deter-
mine source and load reflection coefficients ΓS and ΓL, respectively.
The establishment of the reflection coefficients would provide for impedances and admittances nec-
essary to derive input and output matching networks. An alternative method for matching network
creation is also discussed. Each individual matching network was tuned to allow for maximum power
transfer and minimum return loss, ensuring the conditions of the circuit would meet the design
specifications described below:
1.1 Design Specifications
The list below displays the substrate properties for the Rogers 4350B material used for the amplifier
fabrication design:
− H: substrate height = 62 mil
− r: dielectric permittivity = 3.66 F/m
− µr: dielectric permeability = 0.999994 H/m
− Cond: substrate conductivity = 5.96 × 107
S/m
− T: conductor thickness = 35 µm
− tan δ: loss tangent = 0.0037
The detailed design specifications of the 3.7GHz microwave amplifier are detailed below:
− Gain = 6.5dB ±0.5dB
− Bandwidth = 250MHz @ 3.7GHz
− Input VSWR < 1.2
− Output VSWR < 1.5
− Source/Load Impedance = 50Ω
− Power Supply = +3V w/ max 100mA
− PCB Size = 2.5in long× 2.0in wide

2 Design Process
2.1 DC Bias Selection
The goal was to design an amplifier through its S-parameters to establish stability, design for max-
imum available gain, and create input/output matching networks for the transistor circuit. The
circuit is driven by a DC operating system via DC source. A DC bias point was selected from the
BFP450 Infineon datasheet [1]. A point was selected for 0.57mA at 3V, due to the maximum DC
voltage supply.
Figure 1: BFP450 DC Bias Characteristics Infineon Datasheet [1]
2.2 DC Bias Schematic
The DC current and voltage bias were selected based on the characteristics described above. The
maximum DC supply was 3V, and to aim for maximum gain, a diagonal line was drawn and a point
was selected in the middle of the line, approximately 0.57mA base current IB. A collector current IC
was selected as 90mA. The figure below displays the used DC bias network used within the circuit:
Figure 2: DC Bias Network established for Amplifier Circuit
A quarter-wavelength microstrip line of width 6mil is placed beneath each side of the DC bias circuit.
The determination of the length of said microstrips will be discussed within Section 2.6.

2.3 Device Stability Check
2.3.1 Linville’s Method
Stability could be determined through two different methods: plotting stability circles via Smith
Charts or using Linville’s Method. Linville’s Method can be applied by deriving stability conditions
via S-parameters of the device. The BFP450 webpage [4] provided S-parameters for the device at
specific bias conditions. A file indicating 3V at IC = 90mA was selected. The following S-parameters
were found below at center frequency, upper and lower bands. Note that although a bandwidth of
250MHz was required, the file provided frequency values from a range of 200MHz bandwidth, which
was used for the remaining calculations:
Frequency Band S11 S21 S12 S22
Lower-Band: 3.6GHz 0.7706 128.2◦
1.909 29.8◦
0.1179 33.9◦
0.5747 134.4◦
Center Freq: 3.7GHz 0.7732 126.8◦
1.85 28.5◦
0.12 32.7◦
0.5784 133.1◦
Upper-Band: 3.8GHz 0.7763 125.5◦
1.793 27◦
0.1221 31.6◦
0.5825 131.8◦
Table 1: BFP450 S-Parameters for Center Freq., Upper and Lower Band-Edges
The delta factor ∆ is determined using the expression below at center frequency and each band-edge.
Sample calculation can be seen within Appendix A.
∆ = S11S22 − S12S21 (1)
The ∆ factors were computed for each set of S-parameters and are displayed in the table below for
center frequency and each band-edge.
Frequency Band ∆
Lower-Band: 3.6GHz 0.66 −103.7◦
Center Freq: 3.7GHz 0.661 −106.3◦
Upper-Band: 3.8GHz 0.663 −108.8◦
Table 2: BFP450 ∆ for Center Freq., Upper and Lower Band-Edges
The Linville stability K-factor is determined using the expression below. Sample calculation can be
seen within Appendix A.
K =
1 + |∆|2
− |S11|2
− |S22|2
2|S12S21|
(2)
The K factors were computed for each set of S-parameters and are displayed in the table below for
center frequency and each band-edge.
Frequency Band K-Factor
Lower-Band: 3.6GHz 1.145
Center Freq: 3.7GHz 1.136
Upper-Band: 3.8GHz 1.137
Table 3: BFP450 K-Factors for Center Freq., Upper and Lower Band-Edges

2.3.2 Stability Circles
The ideal model of the BFP450 device was designed through a schematic within ADS, and is shown
below. DC bias conditions were put in place for all future measurements.
Figure 3: Ideal BFP450 Schematic w/ DC Bias Conditions
Device stability can also be determined via stability circles. Source and load stability circles can be
plotted within the Smith Chart on ADS, as shown below:
Figure 4: Source and Load Stability Circles for BFP450 Device
The unilateral ﬁgure of merit U can be calculated to determine if a device is bilateral, i.e. S12 = 0.
If U lies within bounds no less than a few tenths of a dB, the device is characterized as bilateral.
The unilateral ﬁgure of merit is expressed below. Sample calculation is displayed in Appendix A.
U =
|S12||S21||S11||S22|
(1 − |S11|2)(1 − |S22|2)
(3)

A calculated unilateral figure of merit was determined as 0.371. The bounds for U are characterized
by the transducer gain GT and the unilateral transducer gain GTU in the expression below:
1
(1 + U)2
<
GT
GTU
<
1
(1 − U)2
(4)
The defined expression above is calculated within Appendix A. The simplified expression for the
bounded unilateral figure of merit assumption at center frequency is displayed below:
0.532 <
GT
GTU
< 2.527 ⇒ −2.74dB <
GT
GTU
< 4.027dB
2.3.3 Device Stability Conclusions
For a device to have unconditional stability it must have a K-factor greater than 1, and a magnitude
of ∆ greater than 1. Table 3 displays |∆| less than 1. Table 4 displays K-factors all greater than 1.
These calculated terms confirm the device is unconditionally stable.
To determine the stable region within within Figure 4, we examine the of S-parameters S11 and
S22. Since magnitudes |S11| < 1 and |S22| < 1, this confirms that the stable region is located outside
of the source and load stability circles, respectively.
The derivation of the unilateral figure of merit allowed us to determine necessary bounds to evaluate
the transducer gain. The range is not within a few tenths of a dB, confirming that the device is in
fact bilateral. Due to the conclusion of a bilateral network and unconditionally stable device, we can
further evaluate matching networks tailored towards maximum available gain.
2.4 Design for Maximum Available Gain
2.4.1 Source/Load Reflection Coefficients
Previously we concluded we had a bilateral network and unconditionally stable device due to the
calculated stability conditions. Maximum available gain can now be established for said device, where
the input and output can be matched simultaneously. The necessary values required for matching
are the source and load reflection coefficients, ΓS and ΓL, respectively, detailed by the expressions
below:
ΓS = Γ∗
in =
B1 ± B2
1 − 4|C1|2
2C1
(5)
ΓL = Γ∗
out =
B2 ± B2
2 − 4|C2|2
2C2
(6)
The following constants are dependent on the device S-Parameter, characterized by the following
expressions:
B1 = 1 + |S11|2
− |S22|2
− |∆|2
(7)
B2 = 1 + |S22|2
− |S11|2
− |∆|2
(8)
C1 = S11 − ∆S∗
22 (9)
C2 = S22 − ∆S∗
11 (10)

The table below displays the calculated results for equations 5-10. Values are expressed for solutions
towards a matching network designed towards MAG. ΓS and ΓL can be solved using ±, so two results
will be displayed for each. Extended solutions for said equations are displayed within Appendix A.
Variable Result
ΓS(+) 1.353 − 132.8◦
ΓS(−) 0.739 − 132.8◦
ΓL(+) 3.022 − 171.2◦
ΓL(−) 0.331 − 171.2◦
B1 0.826
B2 0.3
C1 0.395 132.8◦
C2 0.0894 171.2◦
Table 4: Matching Condition Variables for Input/Output Networks
Given quadratic expressions from equations 5 and 6, two solutions were determined for ΓS and ΓL.
For the purpose of minimum reflection and maximum power transfer throughout the device, the
smaller of the two values was selected, i.e. the (-) results for both reflection coefficients.
MAG can now be calculated using the expression below. Sample calculations for the following
four expressions will be provided within Appendix A.
MAG = GTMAX = GS × GO × GL (11)
where each of the additional expressions within GTMAX are defined below:
GS =
1
1 − |ΓS|2
(12)
GO = |S21|2
(13)
GL =
1 − |ΓL|2
|1 − S22ΓL|2
(14)
Maximum available gain GTMAX was determined to be 7.04, equivalent to 8.48dB. The necessary
gain according to design specifications is 6.5±0.5dB, asserting our calculations thus far to obtain the
necessary gain.
2.4.2 Normalized Source/Load Impedances
The determined reflection coefficients for the input/output matching networks can be used to deter-
mine the impedances for said input/output matching networks. The expressions below evaluate the
normalized impedances for the necessary matching networks:
˜ZS =
1 + ΓS
1 − ΓS
(15)
˜ZL =
1 + ΓL
1 − ΓL
(16)

The normalized admittances are computed below to evaluate the source and load impedances and
implement them within the Smith Chart.
˜YS =
1
˜ZS
(17)
˜YL =
1
˜ZL
(18)
The table below details the calculated normalized impedances and admittances dedicated towards
the input and output matching networks. Results are expressed in polar and rectangular form. Sam-
ple calculations for equations 15-18 are provided within Appendix A.
Variable Result (Polar) Result (Rectangular)
˜ZS 0.46 −67.3◦
0.18 -j0.42
˜ZL 0.51 −6.5◦
0.51 - j0.06
˜YS 2.17 67.3◦
0.84 + j2.00
˜YL 1.97 6.5◦
1.96 + j0.22
Table 5: Normalized Source & Load Impedances/Admittances
2.4.3 Issues with MAG Design
A glaring issue was encountered when pursuing the development of input and output matching
circuits using MAG Design. When developing matching networks via load and source impedances
and admittances, the goal was to develop matching networks similar to the figure below:
Figure 5: Characterized Input/Output Matching Network for Amplifier Circuit
Realistically, the shunt lengths would have been smaller than the series lengths for both source and
load; unfortunately this was not the case.
When plotting source and load impedances and admittances within a Smith Chart, determined
series lengths were less than half of the determined shunt lengths, disapproving of our original incli-
nations for matching network design.
When developing and simulating the circuit within ADS, the amplifier gain had reportedly dropped
below -20dB, far from the required design specifications. Due to the issues surrounding MAG design
within our circuit, another solution was pursued to further develop successful matching networks.

2.5 Matching Network Development via Smith Chart
Various Smith Charts were developed and plotted regarding the ideal amplifier system characterized
in Figure 3. S-parameters S11, S22 and reflection coefficients Γin, Γout were measured at the design
frequency of 3.7GHz. In order to assert proper input and output matching networks S11 and S22
were designed as goal impedances for each individual input and output matching networks.
Individual matching circuits were designed with the conjugates of Γin and Γout acting as the TermG
impedances. Mentioned S-parameters acted as the goal load to track from the center 50Ω of the
Smith Chart towards said S-parameters. The following table represents the simulated input/output
reflection coefficients and S-parameters used within the matching networks:
Parameter Value
Γin 41.8 + j96.85
Γout 26.95 + j5.20
S11 29.55 - j94.00
S22 54.85 - j77.75
Table 6: Ideal BFP450 Γin, Γout, S11, S22
2.5.1 Input Matching Network
The following Smith Chart was designed within RF Buddy Online Smith Chart Tool, using various
series and shunt transmission lines surrounding 50Ω towards S11:
Figure 6: Input Matching Network Smith Chart Characterization
Each transmission line was expressed as an ideal TLIN component and tuned to evaluate S11 to-
wards the center of the Smitch Chart. This was followed by the inclusion of MLIN components,
where LineCalc was used to convert impedance and electrical length to microstrip dimensions. Said
MLIN components were tuned once again to meet desired conditions.
An MTEE component was placed between unmatched impedance components, mainly due to the
inclusion an MLOC component; an open-circut shunt stub is easier to design than a short-circuit
shunt stub, and is therefore used in our configuration. The addition of an MTAPER component
helped fashion unmatched microstrip impedances with minimal spacing required.

The schematic below details the implemented input matching circuit from the Smith Chart above:
Figure 7: Input Matching Network Schematic
2.5.2 Output Matching Network
The following Smith Chart was designed within RF Buddy Online Smith Chart Tool, using various
series and shunt transmission lines surrounding 50Ω towards S22:
Figure 8: Output Matching Network Smith Chart Characterization
The output matching network circuit was designed similarly to the input matching circuit, given the
components used within ADS. The schematic of the output matching circuit is displayed below:
Figure 9: Output Matching Network Schematic
Each established matching network required tuning of their microstrip dimensions to tweak existing
conditions towards a more suitable matching experience. Together the matching networks as well as
the established DC bias circuitry from Figure would connect to BFP450 conﬁguration, as well as the
DC bias circuitry.

2.6 Final Microwave Amplifier Design
Each matching network was created separately and joined together with the functioning BFP450 to
form a complete microwave amplifier.
Figure 10: Final Microwave Amplifier Schematic
where X1 identifies the BFP450 transistor connected to the DC bias network, X2 identifies as the
input matching network and X3 as the output matching network.
In reference to Section 2.2, the DC bias network was to be connected to both the base of the
transistor and within the input and output matching network simultaneously. To ensure the DC
effects of the bias network would have no impact on the transmission line network connected in se-
ries to the BFP450 a quarter-wavelength microstrip was placed at each end of the DC bias network.
Given it must have a width of 6mil, its length required further calculation.
A quarter-wavelength transmission line can be expressed as 0.25λ, where λ can be calculated in
the expression below:
λ =
c
f
√
r
(19)
Descriptive calculation of λ can be found within Appendix A. Given a relative dielectric of the used
substrate RO4350B as 3.66 [2], λ can be solved as 0.0424m. A quarter wavelength can be expressed
as 0.25 × λ, equivalent to 0.0106m or 417.32mil.
2.7 Amplifier Measurements
2.7.1 Amplifier Gain, Return Loss
The plot below displays the final microwave amplifier gain and return loss, characterized by S-
parameters S21 and S22, respectively:
Figure 11: ADS Simulation of Microwave Amplifier Gain and Return Loss

The plot above details the amplifier gain and return loss at the upper and lower band-edges, as
well as center frequency at 3.7GHz. The gain at center frequency, upper and lower band-edges is
measured to be 7.455dB, 7.483dB and 7.405dB. The amplifier gain lies within the ±0.5dB range from
the given design requirements. As for the amplified gain range beyond 6.5dB as per specifications,
a higher gain achievement through basic ADS simulations is appreciated, as in realistic scenarios a
device may not always replicate its simulation counterpart.
Figure 11 above displays amplifier return loss experiencing a very low value S22 at center frequency,
approximately -38.661dB. A minimum return loss asserts that maximum power transfer will occur
at the device’s operating frequency. The upper and lower band-edges experienced a return loss of
-25.372dB and -24.625dB, respectively.
2.7.2 Amplifier Stability
The plot below details the stability measurements of the amplifier:
Figure 12: ADS Simulation of Microwave Amplifier Stability Check
Previously in Section 2.3 we calculated device stability using stability circles and Linville’s Method,
each of which confirmed that our device was unconditionally stable. The plot above details two
factors, StabFact and StabMeasure, which correspond to the K-factor and |∆|, respectively. Since
K > 1 and |∆| > 0, we can assert the final amplifier design is unconditionally stable.
2.7.3 Amplifier VSWR Response
The plot below details the VSWR response of the amplifier:
Figure 13: ADS Simulation of Microwave Amplifier VSWR Response

Input VSWR was recorded at 2.645 while output VSWR was recorded at 1.024. According to design
specifications output VSWR remained under 1.5, however input VSWR was greater than 1.2. To
receive an ideal VSWR of 1, the input/output reflection coefficient must be nearly 0 to achieve this.
Issues due to an imperfect matching network may explain the deviating input VSWR result.
3 Further Analysis
3.1 BFP450 S-Parameters
The determination of the BFP450 S-parameters was recovered directly from Infineon [1] file base.
In hindsight, the ideal method to determine the S-parameters of the BFP450 at 3.7GHz and appro-
priate DC conditions, simulations should have been utilized to determine said parameters. Using
simulated-produced S-parameter values could have improved the MAG design method. This in turn
would potentially result in superior matching networks for the overall design. Appendix B contains
simulated plots for the BFP450 S-parameters with no matching networks attached.
3.2 DC Bias Components, Transistor
Each component used within the circuit is given an ideal value within ADS. However, when fabri-
cated to a PCB, the values of the used components have a tolerance, i.e. an estimate of component
value fluctuation depending on the application. This would in turn affect the VSWR and gain of the
fabricated circuit, causing deviation from the measured values.
The included capacitors GJM1555C1H6R0CB01D and C0805C104K5RACTU, inductor MLZ2012N220LT000,
and BFP450 transistor do not portray their simulation counterpart. Individually manufactured com-
ponents will have a varied tolerance value affecting their impact towards circuit gain and VSWR.
This effect explains the differences between simulated circuit responses via ADS and measured values.
3.3 Solder and Feed Lines
Solder was used to cement 50Ω SMA connectors on the input and output of the fabricated PCB.
The effect of using solder could potentially cause a slight phase shift as well as act as a source of loss
due to the solder material not being a perfect conductor. The skin dept within regions of the solder
decrease which correlates with increased conductor loss due to the surface roughness of the material.
This leads to increased return loss, another reason as to why measured and simulated values will differ.
The addition of input and output feed lines into the SMA connectors would have to connect to
the input and output matching networks. This would cause the amplifier to experience more loss
due to the lines. Longer microstrip lines experience more loss, justifying our aim to create matching
networks with small microstrip lines.
4 Conclusion
The amplifier project proved semi-successful in its approach and outcome. Many design procedures
were implemented to optimize the design of the BFP450 amplifier circuit. Amplifier traits such as
stability, input/output and source/load reflection coefficients, S-parameters, source/load impedances
and admittances, and maximum available gain were purposeful properties that led to the determi-
nation of developing matching networks.

Although MAG design did not go as planned within our approach another design method operated
by Smith Chart matching was attempted, and input/output matching networks were schematized
and simulated.
Due to issues developing an acceptable layout, a PCB was not fabricated for this project, how-
ever analysis has been determined for an ideal case with working microwave amplifiers. Due to
damaged transistors while testing, measured results were unable to be determined through the VNA.
Nonetheless, ADS simulations justified the operating nature of the amplifier at an acceptable gain
with minimum return loss at operating frequency. Input VSWR did not meet the design specifi-
cations, among faults within the matching networks, however future analysis using appropriately
determined S-parameters of the BFP450 may provide further insight towards fixing existing issues.
5 References
[1]: Infineon Technologies AG. (n.d.). BFP450. Retrieved from https://www.infineon.com/cms/en/
product/rf-wireless-control/rf-transistor/high-linearity-si-and-sigec-transistors-for-use-up-to-6-ghz/bfp450/
[2]: Rogers Corporation, RO4350B Laminates. Retrieved from https://www.rogerscorp.com/documents/
726/acs/RO4000-Laminates-RO4003C-and-RO4350BData-Sheet.pdf

6 Appendix A: Sample Calculations
Equation 1 - Determinant ∆:
∆ = S11S22 − S12S21
∆ = (0.7732 126.8◦
× 0.5784 133.1◦
) − (1.85 28.5◦
× 0.12 32.7◦
)
∆ = 0.661 − 106.3
Equation 2 - Linville K-Factor:
K =
1 + |∆|2
− |S11|2
− |S22|2
2|S12S21|
K =
1 + |0.661|2
− |0.7732|2
− |0.5784|2
2|0.12 32.7◦ × 1.85 28.5◦|
K = 1.136
Equations 3 - Unilateral Figure of Merit U:
U =
|S12||S21||S11||S22|
(1 − |S11|2)(1 − |S22|2)
U =
|0.12||1.85||0.7732||0.5784|
(1 − |0.7732|2)(1 − |0.5784|2)
U = 0.371
Equation 4 - Bounds for GT
GT U
Ratio:
1
(1 + U)2
<
GT
GTU
<
1
(1 − U)2
1
(1 + 0.371)2
<
GT
GTU
<
1
(1 − 0.371)2
0.532 <
GT
GTU
< 2.527
10 log10(0.532) <
GT
GTU
< 10 log10(2.527)
−2.74dB <
GT
GTU
< 4.027dB

Equations 7-10 - Reflection Coefficient Parameters:
B1 = 1 + |S11|2
− |S22|2
− |∆|2
B1 = 1 + |0.7732|2
− |0.5784|2
− |0.661|2
B1 = 0.826
B2 = 1 + |S22|2
− |S11|2
− |∆|2
B2 = 1 + |0.5784|2
− |0.7732|2
− |0.661|2
B2 = 0.3
C1 = S11 − ∆S∗
22
C1 = [0.7732 126.8◦
− (0.661 − 106.3◦
× 0.5784 − 133.1◦
)]
C1 = 0.395 132.8◦
C2 = S22 − ∆S∗
11
C2 = [0.5784 133.1◦
− (0.661 − 106.3◦
× 0.7732 − 126.8◦
)]
C2 = 0.0894 171.2◦
Equations 5-6 - Source/Load Reflection Coefficients:
ΓS = Γ∗
in =
B1 ± B2
1 − 4|C1|2
2C1
ΓS = Γ∗
in =
0.826 ± 0.8262 − 4|0.395|2
2 × 0.395 132.8◦
ΓS = 1.353 − 132.8◦
or 0.739 − 132.8◦
ΓL = Γ∗
out =
B2 ± B2
2 − 4|C2|2
2C2
ΓS = Γ∗
in =
0.3 ± 0.32 − 4|0.0.0894|2
2 × 0.0.094 171.2◦
ΓL = 3.022 − 171.2◦
or 0.331 − 171.2◦

Equations 12-14 - MAG Parameters:
GS =
1
1 − |ΓS|2
GS =
1
1 − |0.739|2
GS = 1.517
GO = |S21|2
GO = |1.85|2
GO = 3.423
GL =
1 − |ΓL|2
|1 − S22ΓL|2
GL =
1 − |0.331|2
|1 − (0.5784 133.1◦ × 0.331 − 171.2◦)|2
GL = 1.356
Equation 11 - MAG = GTMAX:
MAG = GTMAX = GS × GO × GL
MAG = GTMAX = 1.517 × 3.423 × 1.356
MAG = GTMAX = 7.041 ⇒ 10 log10(7.041) = 8.48dB
Equations 15, 17 - Source Impedance/Admittance:
˜ZS =
1 + ΓS
1 − ΓS
˜ZS =
1 + 0.739 − 132.8◦
1 − 0.739 − 132.8◦
˜ZS = 0.46 − 67.3◦
˜YS =
1
˜ZS
˜YS =
1
0.46 − 67.3◦
˜YS = 2.17 67.3◦

Equations 16, 18 - Load Impedance/Admittance:
˜ZL =
1 + ΓL
1 − ΓL
˜ZL =
1 + 0.331 − 171.2◦
1 − 0.331 − 171.2◦
˜ZL = 0.51 − 6.5◦
˜YS =
1
˜ZL
˜YS =
1
0.51 − 6.5◦
˜YS = 1.97 6.5◦
Equation 19 - Wavelength λ:
λ =
c
f
√
r
λ =
3 × 108
m/s
(3.7 × 109Hz)
√
3.66
λ = 0.0424m
Equation 19 cont. - Quarter Wavelenght λQW :
λQW = 0.25 × λ = 0.25 × 0.0424m
λQW = 0.0106m = 417.32mil

7 Appendix B: BFP450 S-Parameters
Figure 14: S-Parameters of BFP450 Transistor w/ DC Bias Network

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