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University of Washington
Department of Electrical Engineering
EE453 Electric Drives
Hybrid Electric Drive System
Authors:
Brianne Foster
Spencer Minder
William Yuen
Instructor:
Professor Mohamed A.
El-Sharkawi
March 10, 2009
Contents
0.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
0.2 Design Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
0.3 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
0.4 Circuit Design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
0.4.1 Power Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
0.4.2 Digital Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
0.4.3 Pulse-Width Modulation (PWM) . . . . . . . . . . . . . . . . 5
0.4.4 H-Bridge . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
0.5 Braking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
0.5.1 Dynamic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
0.5.2 Counter-current . . . . . . . . . . . . . . . . . . . . . . . . . . 7
0.6 Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
0.7 Cost Analysis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
0.8 Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Appendices 13
i
List of Figures
1 Block Diagram of the Motor Driver . . . . . . . . . . . . . . . . . . . 2
2 Circuit Schematic of the Motor Driver . . . . . . . . . . . . . . . . . 3
3 Logic Circuit in the GAL16V8 . . . . . . . . . . . . . . . . . . . . . . 5
4 Verilog Timing Diagram . . . . . . . . . . . . . . . . . . . . . . . . . 5
5 Dynamic Braking Current Loop Dissipation . . . . . . . . . . . . . . 7
6 Dynamic Braking MOSFETs . . . . . . . . . . . . . . . . . . . . . . . 7
7 Gate-to-Source Voltage of the the High and Low Side Driver . . . . . 8
8 GAL Signal to Ground at q1 and q2 . . . . . . . . . . . . . . . . . . 9
9 Voltage Across the Load at Various Points . . . . . . . . . . . . . . . 9
ii
List of Tables
1 Test Cases for the GAL16V8 Chip . . . . . . . . . . . . . . . . . . . . 4
2 List of All Components and Total Purchasing Price . . . . . . . . . . 10
iii
Electric Drive Design EE453, Winter 2009
0.1 Introduction
In recent years the demand for hybrid electric motors has increased significantly due
to rising oil costs and the transition to more energy efficient machines. The earlier
versions of these hybrid motor’s had simple controller circuits. Skip to the present
and the complexity of these circuits has multiplied. The advantages to using an
electric motor includes the uses of counter-current and regenerative braking. These
features allow the motor to use itself to brake and to generate energy in certain
braking situations. With the increase in demand for electric motor controllers this
report presents a cost efficient design of an electric motor controller. The design
utilizes a power supply circuit, Pulse Width Modulation speed and braking control,
and Bi-directional motor rotation.
0.2 Design Specifications
The specifications for the driver circuit are as follows:
Starting
• The motor should start by pushing a button
• The maximum starting current at full load should not exceed twice the rated
current
• The motor should reach the rated speed in less than 3 seconds
• The ramping of the speed should be smooth
Speed Control
• Speed change can be made on command
• User can regulate the speed by low power analog or digital devices
• Speed regulation should be smooth
• Motor should be able to run at low speeds without jerking
Braking
• User can select either dynamic or counter current braking
• The braking current should be limited to 3 times the rated current
• The user can select the rapidity of braking
Page 1 of 16
Electric Drive Design EE453, Winter 2009
0.3 Overview
Figure 1 shows a block diagram of the key components of the circuit. The components
include: the power supply circuit, the Pulse Width Modulation circuit, the digital
logic circuit, and the H-Bridge circuit.
Figure 1: Block Diagram of the Motor Driver
0.4 Circuit Design
The design of the motor drive circuit consisted of a power supply, digital logic incor-
porated in a gate-array logic (GAL) device, pulse-width modulation, H-bridge, and
several switches and push-buttons for easy user control. The circuit schematic can
be seen in Figure 2. Note that there are actually two SG3524 ICs but due to space
limitations, it could not be shown.
Page 2 of 16
Electric Drive Design EE453, Winter 2009
Figure 2: Circuit Schematic of the Motor Driver
Page 3 of 16
Electric Drive Design EE453, Winter 2009
0.4.1 Power Supply
The power supply consists of a 25.2V center-tapped 2A transformer, full-bridge rec-
tifier, 1000µF filter capacitor, and a variable voltage regulator. The voltage supplied
by the transformer is 40VDC. The filtering capacitor needed a high voltage rating
and capacitance in order to reduce ripple when a load is connected. This voltage is
stepped down to 26.4VDC via two parallel connected LM317t variable voltage regu-
lators. Supply voltages of 12VDC and 5VDC were created off of the 26.4VDC using
a 12V and 5V regulator. Extra caution was implemented by using two circuit break-
ers connected to the secondary side and a 2A fuse connected to the primary of the
transformer.
0.4.2 Digital Logic
To provide the basic control functions of the motor controller, digital logic was im-
plemented in a GAL16V8D IC. The advantages of digital logic are: its very robust,
it can be altered easily, and is cost efficient. The digital logic was programmed us-
ing Verilog HDL. This allowed flexibility in reprogramming any logic modifications.
The first step in the design process involved creating the desired user inputs such as
direction control, counter-current braking, and dynamic braking. Second, Karnaugh
maps(Kmaps) were created by determining the state of the output by changing the
input combinations. After simplying the Kmaps into logic equations, a logic diagram
was made. The logic diagram provides a visual representation of how the logic is con-
trolled and allows easy coding in Verilog HDL. Next the logic was coded and tested
in Verilog. Finally the logic, which can be seen in Figure 3, was put onto the GAL
device using ISPLEVER. A timing diagram from the Verilog test code and truth table
for the digital logic can be seen in Figure 4 and Table 1, respectively.
Table 1: Test Cases for the GAL16V8 Chip
Dir DynB ccB Output
0 0 0 q1, q2
0 0 1 q3, q4
0 1 0 q1
0 1 1 X
1 0 0 q3, q4
1 0 1 q1, q2
1 1 1 q3
Page 4 of 16
Electric Drive Design EE453, Winter 2009
Figure 3: Logic Circuit in the GAL16V8
Figure 4: Verilog Timing Diagram
0.4.3 Pulse-Width Modulation (PWM)
A SG3524 chip provided the pulse-width modulation for the circuit. The preferred
choice for motor speed control is a PWM signal. By varying the duty cycle of the
pulse width, the dc voltage supplied to the motor is regulated. Another advantage of
a PWM signal is that the pulses reach the full supply voltage and will produce more
torque in a motor by being able to overcome the internal motor resistance.
In this particular circuit, there are two PWM signals - one for speed control and
another for braking. Two PWM signals were used because the braking speed had to
be independent of the speed control. For example, in the single PWM case, if the
Page 5 of 16
Electric Drive Design EE453, Winter 2009
user were to accelerate at full speed and switch to counter-current braking, not only
would there be a large spike in current but the user would not be able to control the
rapidity of the braking. To eliminate this problem and create a more robust braking
system, a braking PWM was implemented.
0.4.4 H-Bridge
An H-bride consisting of all N-channel MOSFETs was implemented to allow forward
and reverse direction control of the DC motor. The driver for the MOSFETS is the
IRF2181 is a high-side and low-side driver IC.
One potential problem with using all N-channel MOSFETs is that its drain lead is
connected to VCC. The goal is to turn the MOSFET on such that the top of the
motor is at Vcc potential. This means that the MOSFET’s source lead will be raised
to VCC’s potential. The gate voltage needs to be 4.5 to 7V higher than the source
to keep the MOSFET turned on. In other words, the gate voltage needs to be higher
than VCC by 4.5 to 7V. This problem was fixed by a built-in charge-pump featured
in the MOSFET driver. The charge-pump consists of a boot-strap capacitor that
charges to a voltage of 10V, which allows the gate voltage to be higher than VCC.
0.5 Braking
In an electric motor, there are two different types of braking: dynamic and counter-
current. Dynamic braking is the traditional braking method in a vehicle where high
losses occur due to heat dissipation from friction. Counter-current braking utilizes
the motor to electrically brake without high losses. Regenerative braking, which
occurs when the motor speed becomes higher than the no-load speed without changing
direction, is the main advantage of counter-current braking.
0.5.1 Dynamic
Dynamic braking was implemented by using the H-bridge. The most efficient method
for dynamic braking involves turning on one MOSFET. The energy from the motor
is dissipated through a loop which comprises a high-side MOSFET q1 and a free-
wheeling diode from the other high-side MOSFET q3. This is displayed in Figure 5.
For the forward direction, MOSFET q1 on the high-side stays on while MOSFET q2
on the low-side turns off. For the reverse direction, MOSFET q3 on the high-side
stays on while MOSFET q4 on the low-side turns off. This methodology can be seen
in Figure 6.
Page 6 of 16
Electric Drive Design EE453, Winter 2009
Figure 5: Dynamic Braking Current Loop Dissipation
Figure 6: Dynamic Braking MOSFETs
0.5.2 Counter-current
The key concept of counter-current braking is utilizing the motor to brake itself. This
is done by supplying a torque in the opposite direction that the speed of the motor
is traveling. There are two types of counter-current braking: Plugging and Terminal
Voltage Reversal(TVR). Plugging is only applicable in constant torque situations.
Therefore the counter-current braking implemented in the circuit is TVR. Essentially
this is done by switching the motor into reverse direction and applying a low duty
cycle braking PWM. The digital logic in the circuit turns off the MOSFET pair
that is controlling the speed and switches to the opposite pair of MOSFETS. The
braking PWM is set to a low duty cycle to prevent shoot-thru in the H-bridge when
switching MOSFET pairs. The braking speed can then be ramped to a higher value.
Page 7 of 16
Electric Drive Design EE453, Winter 2009
As expected, the counter-current braking system is faster than the dynamic braking
system.
0.6 Results
The electric motor drive that was designed performed to the specifications. The mo-
tor can ramp-up to full speed and ramp-down to a slower speed as defined by the user.
In addition, the motor is capable of dynamic and controllable counter-current braking.
The first test involved testing the MOSFET driver ICs. Figure 7 shows the gate-to-
source voltage of the high and low side MOSFET. As expected, the VGS is greater
than VDS of q1 which indicates that the charge-pump of the upper MOSFET operates
properly.
(a) VGS q1 at 80% duty cycle (b) VGS q2 at 80% duty cycle
Figure 7: Gate-to-Source Voltage of the the High and Low Side Driver
The actual timing signal that was used to drive MOSFETs q1 and q2 from the
GAL16V8 can be seen in 8a and 8b.
When a DC motor is added as the load and the voltage is measured across it, the
output waveforms appear to be accurate. At 80% duty cycle, several waveforms were
captured to depict the voltage seen at the load. Figure 9a shows q1 from its source
to ground. Figure 9b shows q2 from its drain to ground. Finally, Figure 9c shows
the math function of subtracting 9a from 9b.
Page 8 of 16
Electric Drive Design EE453, Winter 2009
(a) GAL q1 signal at 80% duty cycle (b) GAL q2 signal at 80% duty cycle
Figure 8: GAL Signal to Ground at q1 and q2
(a) q1 Source-to-Ground Voltage (b) q2 Drain-to-Ground Voltage
(c) q1-Source to q2-Drain
Figure 9: Voltage Across the Load at Various Points
Page 9 of 16
Electric Drive Design EE453, Winter 2009
Using a digital multi-meter, the motor was placed in series and the measured braking
current was about 1.2A. The DC motor’s rated current was about 4A. This means
that the circuit design is below three times the rated current of the DC motor.
0.7 Cost Analysis
The list for all of the components, cost per unit, and total cost for the electric drive
circuit that was design can be seen in Table 2. To keep the project cost low, the
majority of the components were purchased in bulk from a online distributor (such
as Digi-Key).
Table 2: List of All Components and Total Purchasing Price
Item
Component Quantity Cost Per Unit ($)
25.2V CT 2.0A Transformer 1 10.49
25A, 50V Full-Wave Bridge Rectifier 1 3.29
IR2181 MOSFET Driver 2 3.60
IRFB4212 N-Channel MOSFETS 4 1.20
SG3524 PWM 2 1.60
L78S12 Voltage Regulator 1 0.68
LM317T Variable Voltage Regulator 1 0.60
L7805 Voltage Regulator 1 0.60
Resistors 16 0.10
Potentiometers 2 0.40
Ceramic Capacitors 17 0.20
1000µF, 50V Electrolytic Capacitor 1 0.70
Total 49 37.36
0.8 Conclusion
The electric motor controller design works according to the specifications. By using
digital logic to control the inputs such counter current braking, dynamic braking, and
direction, the circuit was streamlined and simple to implement. The motor controller
Page 10 of 16
Electric Drive Design EE453, Winter 2009
excelled in terms of cost efficiency, smooth speed and braking control, size, and user
control.
The driver circuit is also very versatile when it comes to using a higher voltage motor.
Since the IR2181 MOSFET driver chips are fully operational to +600V, this circuit
can handle up to +600V motor as a load. In order to drive a larger load, the only
components that need to be changed are a larger power supply, and MOSFETs and
boot-strap capacitors rated for higher voltages.
One possible improvement to the current design is the digital logic in the GAL IC. The
problem with the current logic is that there is not enough dead-time when counter-
current braking is activated. The present logic works when handled properly but it is
not ”dummy proof”. An attempt to implement a state machine in the logic did not
fully materialize due to time constraints and availability of a clock signal.
Page 11 of 16
Bibliography
[1] http://www.irf.com/product-info/datasheets/data/ir2181.pdf.
[2] http://www.irf.com/product-info/datasheets/data/irfb4212pbf.pdf.
[3] http://www.st.com/stonline/products/literature/ds/2148/l78s12c.
pdf.
[4] http://focus.ti.com/lit/ds/symlink/sg3524.pdf.
[5] El-Sharkawi, Mohamed. Fundamentals of Electric Drives. Toronto: Cengage-
Engineering, 2000, First Edition.
12
Appendices
13
Electric Drive Design EE453, Winter 2009
module testBench ;
wire q1 , q2 , q3 , q4 ;
motorControl mymotorControl (q1 , q2 , q3 , q4 , dynB , ccB , dir ,pWM,brpWM) ;
t e s t I t myTester (dynB , ccB , dir ,pWM,brpWM, q1 , q2 , q3 , q4 ) ;
endmodule
//Turtle state module(converts 4 bit lsfr output into one hot coding on led)
module motorControl (q1 , q2 , q3 , q4 , dynB , ccB , dir ,pWM,brpWM) ;
input dynB , ccB , dir ,pWM,brpWM;
output q1 , q2 , q3 , q4 ;
not invdynB (ndynB , dynB ) ;
not invdir ( ndir , dir ) ;
and andA(outandA , ndir , dynB) ,
andB(outandB , ndynB , outxorA ) ,
andC(outandC , dir , dynB) ,
andD(outandD , ndynB , outxorB ) ;
xor xorA( outxorA , ccB , ndir ) ,
xorB ( outxorB , ccB , dir ) ;
or orA( outorA , outandA , outandB ) ,
orB ( outorB , outandC , outandD ) ,
orC( outorC , dynB , ccB ) ;
not notorC (outNotOrC , outorC ) ;
and andE( outandE ,brpWM, outorC ) ,
andF( outandF ,pWM, outNotOrC ) ;
or orD( outorD , outandE , outandF ) ;
and andG(q1 , outorA , outorD ) ,
Page 14 of 16
Electric Drive Design EE453, Winter 2009
andH(q2 , outandB , outorD ) ,
andI (q3 , outorB , outorD ) ,
andJ (q4 , outandD , outorD ) ;
endmodule
module t e s t I t (dynB , ccB , dir ,pWM,brpWM, q1 , q2 , q3 , q4 ) ;
input q1 , q2 , q3 , q4 ;
output dynB , ccB , dir ,pWM,brpWM;
parameter period = 1;
parameter stimDelay = 10;
reg dynB , ccB , dir ,pWM,brpWM;
always
#period pWM = ˜pWM;
always
#period brpWM = ˜brpWM;
i n i t i a l
begin
dynB = 0;
ccB = 0;
dir= 0;
pWM= 1;
brpWM=0;
end
i n i t i a l
begin
$monitor( $time , ” dynB ccB dir pWM = %b%b%b%b /n q1 q2 q3 q4 = %b%b%b
dynB , ccB , dir ,pWM, q1 , q2 , q3 , q4 ) ;
begin
#stimDelay { dir , dynB , ccB}=0; //Expect to see q1, q2
only on
#stimDelay { dir , dynB , ccB}=1; //Expect to see q3, q4
only on
#stimDelay { dir , dynB , ccB}=2; //Expect q1 on only
#stimDelay { dir , dynB , ccB}=3; //not allowed
Page 15 of 16
Electric Drive Design EE453, Winter 2009
#stimDelay { dir , dynB , ccB}=4; // q3 and q4
#stimDelay { dir , dynB , ccB}=5;// Expect q1 and q2 on
#stimDelay { dir , dynB , ccB}=6;// Expect q3
end
#(2∗stimDelay ) ;
$stop ;
$finish ;
end
endmodule
Page 16 of 16

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Electric_Drives_FinalProj

  • 1. University of Washington Department of Electrical Engineering EE453 Electric Drives Hybrid Electric Drive System Authors: Brianne Foster Spencer Minder William Yuen Instructor: Professor Mohamed A. El-Sharkawi March 10, 2009
  • 2. Contents 0.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 0.2 Design Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 0.3 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 0.4 Circuit Design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 0.4.1 Power Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 0.4.2 Digital Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 0.4.3 Pulse-Width Modulation (PWM) . . . . . . . . . . . . . . . . 5 0.4.4 H-Bridge . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 0.5 Braking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 0.5.1 Dynamic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 0.5.2 Counter-current . . . . . . . . . . . . . . . . . . . . . . . . . . 7 0.6 Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 0.7 Cost Analysis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 0.8 Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Appendices 13 i
  • 3. List of Figures 1 Block Diagram of the Motor Driver . . . . . . . . . . . . . . . . . . . 2 2 Circuit Schematic of the Motor Driver . . . . . . . . . . . . . . . . . 3 3 Logic Circuit in the GAL16V8 . . . . . . . . . . . . . . . . . . . . . . 5 4 Verilog Timing Diagram . . . . . . . . . . . . . . . . . . . . . . . . . 5 5 Dynamic Braking Current Loop Dissipation . . . . . . . . . . . . . . 7 6 Dynamic Braking MOSFETs . . . . . . . . . . . . . . . . . . . . . . . 7 7 Gate-to-Source Voltage of the the High and Low Side Driver . . . . . 8 8 GAL Signal to Ground at q1 and q2 . . . . . . . . . . . . . . . . . . 9 9 Voltage Across the Load at Various Points . . . . . . . . . . . . . . . 9 ii
  • 4. List of Tables 1 Test Cases for the GAL16V8 Chip . . . . . . . . . . . . . . . . . . . . 4 2 List of All Components and Total Purchasing Price . . . . . . . . . . 10 iii
  • 5. Electric Drive Design EE453, Winter 2009 0.1 Introduction In recent years the demand for hybrid electric motors has increased significantly due to rising oil costs and the transition to more energy efficient machines. The earlier versions of these hybrid motor’s had simple controller circuits. Skip to the present and the complexity of these circuits has multiplied. The advantages to using an electric motor includes the uses of counter-current and regenerative braking. These features allow the motor to use itself to brake and to generate energy in certain braking situations. With the increase in demand for electric motor controllers this report presents a cost efficient design of an electric motor controller. The design utilizes a power supply circuit, Pulse Width Modulation speed and braking control, and Bi-directional motor rotation. 0.2 Design Specifications The specifications for the driver circuit are as follows: Starting • The motor should start by pushing a button • The maximum starting current at full load should not exceed twice the rated current • The motor should reach the rated speed in less than 3 seconds • The ramping of the speed should be smooth Speed Control • Speed change can be made on command • User can regulate the speed by low power analog or digital devices • Speed regulation should be smooth • Motor should be able to run at low speeds without jerking Braking • User can select either dynamic or counter current braking • The braking current should be limited to 3 times the rated current • The user can select the rapidity of braking Page 1 of 16
  • 6. Electric Drive Design EE453, Winter 2009 0.3 Overview Figure 1 shows a block diagram of the key components of the circuit. The components include: the power supply circuit, the Pulse Width Modulation circuit, the digital logic circuit, and the H-Bridge circuit. Figure 1: Block Diagram of the Motor Driver 0.4 Circuit Design The design of the motor drive circuit consisted of a power supply, digital logic incor- porated in a gate-array logic (GAL) device, pulse-width modulation, H-bridge, and several switches and push-buttons for easy user control. The circuit schematic can be seen in Figure 2. Note that there are actually two SG3524 ICs but due to space limitations, it could not be shown. Page 2 of 16
  • 7. Electric Drive Design EE453, Winter 2009 Figure 2: Circuit Schematic of the Motor Driver Page 3 of 16
  • 8. Electric Drive Design EE453, Winter 2009 0.4.1 Power Supply The power supply consists of a 25.2V center-tapped 2A transformer, full-bridge rec- tifier, 1000µF filter capacitor, and a variable voltage regulator. The voltage supplied by the transformer is 40VDC. The filtering capacitor needed a high voltage rating and capacitance in order to reduce ripple when a load is connected. This voltage is stepped down to 26.4VDC via two parallel connected LM317t variable voltage regu- lators. Supply voltages of 12VDC and 5VDC were created off of the 26.4VDC using a 12V and 5V regulator. Extra caution was implemented by using two circuit break- ers connected to the secondary side and a 2A fuse connected to the primary of the transformer. 0.4.2 Digital Logic To provide the basic control functions of the motor controller, digital logic was im- plemented in a GAL16V8D IC. The advantages of digital logic are: its very robust, it can be altered easily, and is cost efficient. The digital logic was programmed us- ing Verilog HDL. This allowed flexibility in reprogramming any logic modifications. The first step in the design process involved creating the desired user inputs such as direction control, counter-current braking, and dynamic braking. Second, Karnaugh maps(Kmaps) were created by determining the state of the output by changing the input combinations. After simplying the Kmaps into logic equations, a logic diagram was made. The logic diagram provides a visual representation of how the logic is con- trolled and allows easy coding in Verilog HDL. Next the logic was coded and tested in Verilog. Finally the logic, which can be seen in Figure 3, was put onto the GAL device using ISPLEVER. A timing diagram from the Verilog test code and truth table for the digital logic can be seen in Figure 4 and Table 1, respectively. Table 1: Test Cases for the GAL16V8 Chip Dir DynB ccB Output 0 0 0 q1, q2 0 0 1 q3, q4 0 1 0 q1 0 1 1 X 1 0 0 q3, q4 1 0 1 q1, q2 1 1 1 q3 Page 4 of 16
  • 9. Electric Drive Design EE453, Winter 2009 Figure 3: Logic Circuit in the GAL16V8 Figure 4: Verilog Timing Diagram 0.4.3 Pulse-Width Modulation (PWM) A SG3524 chip provided the pulse-width modulation for the circuit. The preferred choice for motor speed control is a PWM signal. By varying the duty cycle of the pulse width, the dc voltage supplied to the motor is regulated. Another advantage of a PWM signal is that the pulses reach the full supply voltage and will produce more torque in a motor by being able to overcome the internal motor resistance. In this particular circuit, there are two PWM signals - one for speed control and another for braking. Two PWM signals were used because the braking speed had to be independent of the speed control. For example, in the single PWM case, if the Page 5 of 16
  • 10. Electric Drive Design EE453, Winter 2009 user were to accelerate at full speed and switch to counter-current braking, not only would there be a large spike in current but the user would not be able to control the rapidity of the braking. To eliminate this problem and create a more robust braking system, a braking PWM was implemented. 0.4.4 H-Bridge An H-bride consisting of all N-channel MOSFETs was implemented to allow forward and reverse direction control of the DC motor. The driver for the MOSFETS is the IRF2181 is a high-side and low-side driver IC. One potential problem with using all N-channel MOSFETs is that its drain lead is connected to VCC. The goal is to turn the MOSFET on such that the top of the motor is at Vcc potential. This means that the MOSFET’s source lead will be raised to VCC’s potential. The gate voltage needs to be 4.5 to 7V higher than the source to keep the MOSFET turned on. In other words, the gate voltage needs to be higher than VCC by 4.5 to 7V. This problem was fixed by a built-in charge-pump featured in the MOSFET driver. The charge-pump consists of a boot-strap capacitor that charges to a voltage of 10V, which allows the gate voltage to be higher than VCC. 0.5 Braking In an electric motor, there are two different types of braking: dynamic and counter- current. Dynamic braking is the traditional braking method in a vehicle where high losses occur due to heat dissipation from friction. Counter-current braking utilizes the motor to electrically brake without high losses. Regenerative braking, which occurs when the motor speed becomes higher than the no-load speed without changing direction, is the main advantage of counter-current braking. 0.5.1 Dynamic Dynamic braking was implemented by using the H-bridge. The most efficient method for dynamic braking involves turning on one MOSFET. The energy from the motor is dissipated through a loop which comprises a high-side MOSFET q1 and a free- wheeling diode from the other high-side MOSFET q3. This is displayed in Figure 5. For the forward direction, MOSFET q1 on the high-side stays on while MOSFET q2 on the low-side turns off. For the reverse direction, MOSFET q3 on the high-side stays on while MOSFET q4 on the low-side turns off. This methodology can be seen in Figure 6. Page 6 of 16
  • 11. Electric Drive Design EE453, Winter 2009 Figure 5: Dynamic Braking Current Loop Dissipation Figure 6: Dynamic Braking MOSFETs 0.5.2 Counter-current The key concept of counter-current braking is utilizing the motor to brake itself. This is done by supplying a torque in the opposite direction that the speed of the motor is traveling. There are two types of counter-current braking: Plugging and Terminal Voltage Reversal(TVR). Plugging is only applicable in constant torque situations. Therefore the counter-current braking implemented in the circuit is TVR. Essentially this is done by switching the motor into reverse direction and applying a low duty cycle braking PWM. The digital logic in the circuit turns off the MOSFET pair that is controlling the speed and switches to the opposite pair of MOSFETS. The braking PWM is set to a low duty cycle to prevent shoot-thru in the H-bridge when switching MOSFET pairs. The braking speed can then be ramped to a higher value. Page 7 of 16
  • 12. Electric Drive Design EE453, Winter 2009 As expected, the counter-current braking system is faster than the dynamic braking system. 0.6 Results The electric motor drive that was designed performed to the specifications. The mo- tor can ramp-up to full speed and ramp-down to a slower speed as defined by the user. In addition, the motor is capable of dynamic and controllable counter-current braking. The first test involved testing the MOSFET driver ICs. Figure 7 shows the gate-to- source voltage of the high and low side MOSFET. As expected, the VGS is greater than VDS of q1 which indicates that the charge-pump of the upper MOSFET operates properly. (a) VGS q1 at 80% duty cycle (b) VGS q2 at 80% duty cycle Figure 7: Gate-to-Source Voltage of the the High and Low Side Driver The actual timing signal that was used to drive MOSFETs q1 and q2 from the GAL16V8 can be seen in 8a and 8b. When a DC motor is added as the load and the voltage is measured across it, the output waveforms appear to be accurate. At 80% duty cycle, several waveforms were captured to depict the voltage seen at the load. Figure 9a shows q1 from its source to ground. Figure 9b shows q2 from its drain to ground. Finally, Figure 9c shows the math function of subtracting 9a from 9b. Page 8 of 16
  • 13. Electric Drive Design EE453, Winter 2009 (a) GAL q1 signal at 80% duty cycle (b) GAL q2 signal at 80% duty cycle Figure 8: GAL Signal to Ground at q1 and q2 (a) q1 Source-to-Ground Voltage (b) q2 Drain-to-Ground Voltage (c) q1-Source to q2-Drain Figure 9: Voltage Across the Load at Various Points Page 9 of 16
  • 14. Electric Drive Design EE453, Winter 2009 Using a digital multi-meter, the motor was placed in series and the measured braking current was about 1.2A. The DC motor’s rated current was about 4A. This means that the circuit design is below three times the rated current of the DC motor. 0.7 Cost Analysis The list for all of the components, cost per unit, and total cost for the electric drive circuit that was design can be seen in Table 2. To keep the project cost low, the majority of the components were purchased in bulk from a online distributor (such as Digi-Key). Table 2: List of All Components and Total Purchasing Price Item Component Quantity Cost Per Unit ($) 25.2V CT 2.0A Transformer 1 10.49 25A, 50V Full-Wave Bridge Rectifier 1 3.29 IR2181 MOSFET Driver 2 3.60 IRFB4212 N-Channel MOSFETS 4 1.20 SG3524 PWM 2 1.60 L78S12 Voltage Regulator 1 0.68 LM317T Variable Voltage Regulator 1 0.60 L7805 Voltage Regulator 1 0.60 Resistors 16 0.10 Potentiometers 2 0.40 Ceramic Capacitors 17 0.20 1000µF, 50V Electrolytic Capacitor 1 0.70 Total 49 37.36 0.8 Conclusion The electric motor controller design works according to the specifications. By using digital logic to control the inputs such counter current braking, dynamic braking, and direction, the circuit was streamlined and simple to implement. The motor controller Page 10 of 16
  • 15. Electric Drive Design EE453, Winter 2009 excelled in terms of cost efficiency, smooth speed and braking control, size, and user control. The driver circuit is also very versatile when it comes to using a higher voltage motor. Since the IR2181 MOSFET driver chips are fully operational to +600V, this circuit can handle up to +600V motor as a load. In order to drive a larger load, the only components that need to be changed are a larger power supply, and MOSFETs and boot-strap capacitors rated for higher voltages. One possible improvement to the current design is the digital logic in the GAL IC. The problem with the current logic is that there is not enough dead-time when counter- current braking is activated. The present logic works when handled properly but it is not ”dummy proof”. An attempt to implement a state machine in the logic did not fully materialize due to time constraints and availability of a clock signal. Page 11 of 16
  • 16. Bibliography [1] http://www.irf.com/product-info/datasheets/data/ir2181.pdf. [2] http://www.irf.com/product-info/datasheets/data/irfb4212pbf.pdf. [3] http://www.st.com/stonline/products/literature/ds/2148/l78s12c. pdf. [4] http://focus.ti.com/lit/ds/symlink/sg3524.pdf. [5] El-Sharkawi, Mohamed. Fundamentals of Electric Drives. Toronto: Cengage- Engineering, 2000, First Edition. 12
  • 18. Electric Drive Design EE453, Winter 2009 module testBench ; wire q1 , q2 , q3 , q4 ; motorControl mymotorControl (q1 , q2 , q3 , q4 , dynB , ccB , dir ,pWM,brpWM) ; t e s t I t myTester (dynB , ccB , dir ,pWM,brpWM, q1 , q2 , q3 , q4 ) ; endmodule //Turtle state module(converts 4 bit lsfr output into one hot coding on led) module motorControl (q1 , q2 , q3 , q4 , dynB , ccB , dir ,pWM,brpWM) ; input dynB , ccB , dir ,pWM,brpWM; output q1 , q2 , q3 , q4 ; not invdynB (ndynB , dynB ) ; not invdir ( ndir , dir ) ; and andA(outandA , ndir , dynB) , andB(outandB , ndynB , outxorA ) , andC(outandC , dir , dynB) , andD(outandD , ndynB , outxorB ) ; xor xorA( outxorA , ccB , ndir ) , xorB ( outxorB , ccB , dir ) ; or orA( outorA , outandA , outandB ) , orB ( outorB , outandC , outandD ) , orC( outorC , dynB , ccB ) ; not notorC (outNotOrC , outorC ) ; and andE( outandE ,brpWM, outorC ) , andF( outandF ,pWM, outNotOrC ) ; or orD( outorD , outandE , outandF ) ; and andG(q1 , outorA , outorD ) , Page 14 of 16
  • 19. Electric Drive Design EE453, Winter 2009 andH(q2 , outandB , outorD ) , andI (q3 , outorB , outorD ) , andJ (q4 , outandD , outorD ) ; endmodule module t e s t I t (dynB , ccB , dir ,pWM,brpWM, q1 , q2 , q3 , q4 ) ; input q1 , q2 , q3 , q4 ; output dynB , ccB , dir ,pWM,brpWM; parameter period = 1; parameter stimDelay = 10; reg dynB , ccB , dir ,pWM,brpWM; always #period pWM = ˜pWM; always #period brpWM = ˜brpWM; i n i t i a l begin dynB = 0; ccB = 0; dir= 0; pWM= 1; brpWM=0; end i n i t i a l begin $monitor( $time , ” dynB ccB dir pWM = %b%b%b%b /n q1 q2 q3 q4 = %b%b%b dynB , ccB , dir ,pWM, q1 , q2 , q3 , q4 ) ; begin #stimDelay { dir , dynB , ccB}=0; //Expect to see q1, q2 only on #stimDelay { dir , dynB , ccB}=1; //Expect to see q3, q4 only on #stimDelay { dir , dynB , ccB}=2; //Expect q1 on only #stimDelay { dir , dynB , ccB}=3; //not allowed Page 15 of 16
  • 20. Electric Drive Design EE453, Winter 2009 #stimDelay { dir , dynB , ccB}=4; // q3 and q4 #stimDelay { dir , dynB , ccB}=5;// Expect q1 and q2 on #stimDelay { dir , dynB , ccB}=6;// Expect q3 end #(2∗stimDelay ) ; $stop ; $finish ; end endmodule Page 16 of 16