The document analyzes improving the performance of the Advanced Encryption Standard (AES) algorithm using parallel computing on multicore processors. It aims to implement AES using OpenMP to extract parallelism and reduce encryption/decryption times. The methodology divides input data blocks among processor cores to perform encryption/decryption simultaneously. Literature on previous AES parallel implementations is reviewed, highlighting advantages of using OpenMP on multicore CPUs over single-core and GPU approaches. Faster encryption/decryption times are expected compared to sequential processing.

1. ANALYZING THE EFFECTIVENESS OF THE ADVANCED ENCRYPTION STANDARD ALGORITHM ON MULTICORE PROCESSOR
DEPARTMENT OF COMPUTERSCIENCE AND ENGINEERING, BCE, SHRAVANABELAGOLA 1
CHAPTER 1
INTRODUCTION
1.1 AIM
To implement and improve the performance of Advanced Encryption Standard algorithm
by using multicore systems and Open MP API extracting as much parallelism as possible from
the algorithm in parallel implementation approach.
1.2 SCOPE
The requirement of information security on a network has become highly challenging.
Cryptography is a method to provide information confidentiality, authenticity and integrity. The
cryptography overcomes several challenges such as execution time, memory requirement, and
computation power. However, one cannot get desired outcomes by using sequential computation.
In this project, the introduction of parallel computation using multicore processors by
parallelizing the execution of the algorithm in multiple cores and also analyze the effectiveness
of the Advanced Encryption Standard (AES) algorithm on dual core processor by using Open
MP API to reduce the execution time. This process is validated using JAVA platform.
1.3 OBJECTIVES
 To facilitate encryption and decryption of large data.
 To reduce execution time by using multicore system.
 To compare the execution time of single core and multicore systems.
1.4 PROBLEM DEFINITION
Today, computer networks are becoming more important for exchanging information.
One of the most important requirements of these networks is to provide secure transmission of
information from one place to another. Cryptography is one of the techniques which provides the
most secure way to transfer the sensitive information from sender to intended receiver. Its main
purpose is to make sensitive information unreadable to all others except the intended receiver.
Advanced Encryption Algorithm is one of the most important cryptography algorithms for hiding

2. ANALYZING THE EFFECTIVENESS OF THE ADVANCED ENCRYPTION STANDARD ALGORITHM ON MULTICORE PROCESSOR
DEPARTMENT OF COMPUTERSCIENCE AND ENGINEERING, BCE, SHRAVANABELAGOLA 2
the sensitive information, but AES algorithm has many performance limitations such as memory
requirement and execution time.
One of the solutions to reduce the execution time of AES algorithm is by using parallel
computation. Parallel computation is a method in which several computations can be carried out
simultaneously on two or more microprocessors. Parallel computation can be performed by using
multicore and multiprocessor computers having multiple processing elements within a single
machine. OpenMP (Open multiprocessing) is one of the application programming interface
which is supported by multicore architectures to provide multithreaded shared memory
parallelism. So by using multicore architectures we can parallelize the execution of AES
algorithm among different cores to reduce the execution time of the algorithm.

3. ANALYZING THE EFFECTIVENESS OF THE ADVANCED ENCRYPTION STANDARD ALGORITHM ON MULTICORE PROCESSOR
DEPARTMENT OF COMPUTERSCIENCE AND ENGINEERING, BCE, SHRAVANABELAGOLA 3
CHAPTER 2
LITERATURE SURVEY
PERFORMANCE IMPROVEMENT OF ADVANCED ENCRYPTION
ALGORITHM USING PARALLEL COMPUTATION
Author: M. Nagendra, M. Chandra Sekhar.
Year: 2014
In this paper, mainly divide-and-conquer strategy is used in parallel computation to solve
the algorithms in parallel by partitioning and allocating, number of given subtask to available
processing units. Parallel computation can be performed using multicore processors by
parallelizing the execution of algorithm in multiple cores. In this paper we explore the
implementation of AES (Advanced Encryption Algorithm) cryptography algorithm on dual core
processor by using OpenMP API to reduce the execution time.
Disadvantages:
Divide and conquer strategy works slow for large data files and recursion is slow.
Sometimes once the problem is broken down into some sub problems, the same sub problem can
occur many times.
AN IMPLEMENTATION OF AES ALGORITHM ON MULTICORE
PROCESSORS FOR HIGH THROUGHPUT
Author: Supachai Thongsuk, Prabhas Chongstitvatana.
Year: 2014
AES algorithm is a block encryption algorithm established by the U.S. National Institute
of Standards and Technology (NIST) in 2001. It has been adopted by many data security systems
and now used worldwide. Most of AES implementations are for single-core processors. To

4. ANALYZING THE EFFECTIVENESS OF THE ADVANCED ENCRYPTION STANDARD ALGORITHM ON MULTICORE PROCESSOR
DEPARTMENT OF COMPUTERSCIENCE AND ENGINEERING, BCE, SHRAVANABELAGOLA 4
achieve high performance for large data, this work proposed an AES algorithm for multi-core
processors. Using parallelism inherent in large data, all cores are working concurrently to speed
up the task.
Disadvantages:
In this paper, Open MP (Open multiprocessing) is not used. Open MP is one of the
application programming interface which is supported by multicore architectures to provide
multithreaded shared memory parallelism. So by using multicore architectures we can parallelize
the execution of AES algorithm among different cores to reduce the execution time of the
algorithm.
DESIGN OF AN EFFICIENT ARCHITECTURE FOR ADVANCED
ENCRYPTION STANDARD ALGORITHM USING SYSTOLIC
STRUCTURES
Author: Suresh Sharma, T S B Sudarshan.
Year: 2005
This Paper presents a systolic architecture for Advanced Encryption standard (AES). Use
of systolic architecture has improved the hardware complexity and the rate of
encryption/decryption. Similarities of encryption and decryption are used to provide a high
performance using an efficient architecture. The efficiency of the design is quite high due to use
of short and balanced combinational paths in the design. The encryption or decryption rate is 3.2-
Bits per clock-cycle and due to the use of pipelined systolic architecture and balanced
combinational paths maximum clock frequency for the design is quite high.
Disadvantages:
Here only one core is used irrespective of the size of the file which has to be encrypted or
decrypted. This method will work slowly if the data file is big in size. It may work well for data
files which are small but it is sure that it takes much longer time to encrypt and decrypt the data
for bigger files

5. ANALYZING THE EFFECTIVENESS OF THE ADVANCED ENCRYPTION STANDARD ALGORITHM ON MULTICORE PROCESSOR
DEPARTMENT OF COMPUTERSCIENCE AND ENGINEERING, BCE, SHRAVANABELAGOLA 5
HIGH THROUGHPUT PIPELINED AES ENCRYPTION CORE IN FPGA
Author: V S Kolte, A D Narkhede
Year: 2009
In this paper, they introduced what is ASCP and how to realize our AES architecture in
FPGA. The ASCP (Advanced Soft Crypto-Processor) is 32-bit RISC CPU, it established high-
efficient development platform with integrated software/hardware tools. In the design, make use
of ASCP to finish a cryptographic system, flexibility is the advantage. Because the development
of ASCP is quite complete, it is convenient in replacing the circuit to make use of development
platform of ASCP to realize the hardware. In this paper, they proposed the AES architecture with
coprocessor interface to increasing speed of operation. The implementation results on FPGA are
slightly better in timing performance; also it is helpful in fast verification and gives reliable
hardware information. Our core can be utilized in various applications of 128-bit AES
encryption and decryption. Different potential modes of operation for 128-bit AES were
analyzed with respect to advantages and disadvantages in various applications.
Disadvantages:
There is no concept of parallel programming in this paper, which requires more time for
encryption/decryption of data.
AREA OPTIMIZED ADVANCED ENCRYPTION STANDARD
Author: Sandip R. Aher, G. U. Kharat.
Year: 2014
This paper shows various approaches for efficient FPGA implementations of the
Advanced Encryption Standard algorithm. For different applications of the AES algorithm may
require different speed/area tradeoffs, they propose a vital study of the possible implementation
schemes, but also the discussion of design methodology and algorithmic optimization in order to
improve previous reported results. They propose system to evaluate hardware efficiency at

6. ANALYZING THE EFFECTIVENESS OF THE ADVANCED ENCRYPTION STANDARD ALGORITHM ON MULTICORE PROCESSOR
DEPARTMENT OF COMPUTERSCIENCE AND ENGINEERING, BCE, SHRAVANABELAGOLA 6
different steps of the design process. They also use an optimal pipeline that takes the place and
route constraints into account.
Disadvantages:
Algorithm will be implemented using single core systems and thus it works slower for
large files.
PARALLEL EXECUTION OF AES-CTR ALGORITHM USING
EXTENDED BLOCK SIZE
Author: Nhat-Phuong Tran, Myungho Lee, Sigwon Hong , Seung-Jae Lee.
Year: 2011
In this paper, they propose a new approach to parallelize AES-CTR algorithm by
extending the size of the block which is encrypted at one time across the unit block boundaries.
The proposed approach leads to significant performance improvements using a general-purpose
multi-core processor and a Graphic Processing Unit (GPU) which become popular these days. In
particular, the performance improvement on GPU is dramatic; close to 9-times faster compared
with the original coarse-grain parallelization approach, mainly thanks to the “multi-core” nature
of the GPU architecture.
Disadvantages:
In this paper, GPU is used which consumes more power, so this could effect battery life
and also cost of GPU is high.

7. ANALYZING THE EFFECTIVENESS OF THE ADVANCED ENCRYPTION STANDARD ALGORITHM ON MULTICORE PROCESSOR
DEPARTMENT OF COMPUTERSCIENCE AND ENGINEERING, BCE, SHRAVANABELAGOLA 7
2.1 Advantages of proposed system over existing system
In this project, the concept of parallel programming by using a multi-core processor is
proposed and also this project shows how to efficiently and effectively implement the Advanced
Encryption Algorithm by using multicore systems and openMP API, extracting as much
parallelism as possible from the algorithm in parallel implementation approach.
An extensive quantitative evaluation of execution time for both sequential and parallel
implementations are shown. The AES algorithm is implemented using multi core systems and
thus it works faster even for large files and time taken to encrypt/decrypt the large data is
reduced. The comparision of execution time of single core system and multicore system is also
shown.

8. ANALYZING THE EFFECTIVENESS OF THE ADVANCED ENCRYPTION STANDARD ALGORITHM ON MULTICORE PROCESSOR
DEPARTMENT OF COMPUTERSCIENCE AND ENGINEERING, BCE, SHRAVANABELAGOLA 8
CHAPTER 3
METHODOLOGY
 The input is a text file consisting of n-blocks of data.
 The first n/2 blocks can be assigned to one core for encryption/decryption, while another
n/2 blocks can be assigned to another core for performing encryption/decryption.
 The encryption/decryption on multiple blocks of data is done simultaneously by using the
concept of simultaneous multithreading, some of the blocks by one core and some of the
blocks by another core. This process will continue until the end of the file.

9. ANALYZING THE EFFECTIVENESS OF THE ADVANCED ENCRYPTION STANDARD ALGORITHM ON MULTICORE PROCESSOR
DEPARTMENT OF COMPUTERSCIENCE AND ENGINEERING, BCE, SHRAVANABELAGOLA 9
HARDWARE AND SOFTWARE REQUIREMENTS:
 Intel Core 2 Duo processor
 2 GB RAM
 40 GB hard disk
 JDK 1.8
 Eclipse
 Apache tomcat 9
 MySQL
RESULTS EXPECTED:
To obtain an improved execution time for AES algorithm in multicore system over single
core system.
Signature of Students:
Chethan B.M. 4BB13CS011 …………………..
Nikhil Jain C.S. 4BB13CS021 …………………..
Sharath M.S. 4BB13CS029 …………………..
Mrs. Kavitha C.R. Mr. Nagaraju S. Mrs. Kavitha C.R.
Asso. Prof. & Guide Asst. Prof. & Coordinator Asso. Prof. & HOD