1. IEEE TRANSACTIONS ON SMART GRID, VOL. 3, NO. 1, MARCH 2012
413
Evaluation and Efficiency Comparison of Front End
AC-DC Plug-in Hybrid Charger Topologies
Fariborz Musavi, Member, IEEE, Murray Edington, Member, IEEE, Wilson Eberle, Member, IEEE, and
William G. Dunford, Senior Member, IEEE
Abstract—As a key component of a plug-in hybrid electric vehicle (PHEV) charger system, the front-end ac-dc converter must
achieve high efficiency and power density. This paper presents a
topology survey evaluating topologies for use in front end ac-dc
converters for PHEV battery chargers. The topology survey is focused on several boost power factor corrected converters, which
offer high efficiency, high power factor, high density, and low cost.
Experimental results are presented and interpreted for five prototype converters, converting universal ac input voltage to 400 V
dc. The results demonstrate that the phase shifted semi-bridgeless
PFC boost converter is ideally suited for automotive level I residential charging applications in North America, where the typical
supply is limited to 120 V and 1.44 kVA or 1.92 kVA. For automotive level II residential charging applications in North America and
Europe the bridgeless interleaved PFC boost converter is an ideal
topology candidate for typical supplies of 240 V, with power levels
of 3.3 kW, 5 kW, and 6.6 kW.
Index Terms—AC-DC power converters, DC-DC power converters, power conversion, power electronics, power quality.
I. INTRODUCTION
A
PLUG-IN HYBRID electric vehicle (PHEV) is a hybrid
vehicle with a battery electric storage system that can be
recharged by connecting a plug to an external electric power
source. The vehicle charging ac inlet requires an onboard ac-dc
charger with power factor correction [1]. An onboard 3.4 kW
charger can charge a depleted battery pack in PHEVs to 95%
charge in about 4 h from a 240 V supply [2].
A variety of power architectures, circuit topologies, and control methods have been developed for PHEV battery chargers.
However, due to large low frequency ripple in the output
current, the single-stage ac-dc power conversion architecture
is only suitable for lead acid batteries. Conversely, two-stage
ac-dc/dc-dc power conversion provides inherent low frequency
ripple rejection.
Manuscript received February 26, 2011; revised July 26, 2011; accepted August 10, 2011. Date of publication October 20, 2011; date of current version
February 23, 2012. This work was sponsored and supported by Delta-Q Technologies Corporation. Paper no. TSG-00078-2011.
F. Musavi is with the Research Department, Delta-Q Technologies Corp.,
Burnaby, BC V5G 3H3 Canada (e-mail: fmusavi@delta-q.com).
M. Edington is with the Engineering Department, Delta-Q Technologies
Corp., Burnaby, BC V5G 3H3 Canada (e-mail: medington@delta-q.com).
W. Eberle is with the School of Engineering, University of British Columbia/
Okanagan, Kelowna, BC V1V 1V7 Canada (e-mail: wilson.eberle@ubc.ca).
W. G. Dunford is with the Department of Electrical and Computer Engineering, University of British Columbia, Vancouver, BC V6T 1Z4 Canada
(e-mail: wgd@ece.ubc.ca).
Color versions of one or more of the figures in this paper are available online
at http://ieeexplore.ieee.org.
Digital Object Identifier 10.1109/TSG.2011.2166413
Fig. 1. Simplified block diagram of a universal battery charger.
Therefore, the two-stage approach is preferred for PHEV battery chargers, where the power rating is relatively high, and
lithium-ion batteries, requiring low voltage ripple, are used as
the main energy storage system [3]. A simplified block diagram
of a universal input two-stage battery charger used for PHEVs
is illustrated in Fig. 1.
The ac-dc plus PFC stage rectifies the input ac voltage and
transfers it into a regulated intermediate dc link bus. At the same
time, power factor correction is achieved [4]. The isolated dc-dc
stage that follows then converts the dc bus voltage to a regulated
output dc voltage for charging batteries.
The most common topologies used in the following dc-dc
section are phase shifted ZVS topology [5]–[8], LLC resonant
topology [9]–[11], and capacitive output filter soft switching
converter [12].
Boost circuit-based PFC topologies operated in continuous conduction mode (CCM) and boundary conduction
mode (BCM) are surveyed in this paper, targeting front end
single-phase ac-dc power factor corrected converters in PHEV
battery chargers.
In the six sections that follow, five different boost based
PFC topologies are discussed and experimental results are
presented for each. The topologies in each section include:
II. Conventional Boost Converter, III. Interleaved Boost Converter, IV. Phase Shifted Semi-Bridgeless Boost Converter, V.
Bridgeless Interleaved Boost Converter, and VI. Bridgeless
Interleaved Resonant Boost Converter. A topology comparison
is presented in Section VII and the conclusions are presented
in Section VIII.
II. CONVENTIONAL BOOST CONVERTER
The conventional boost topology is the most popular
topology for PFC applications. It uses a dedicated diode bridge
to rectify the ac input voltage to dc, which is then followed by
the boost section, as shown in Fig. 2.
In this topology, the output capacitor ripple current is very
high [13] and is the difference between diode current and the
dc output current. Furthermore, as the power level increases,
the diode bridge losses significantly degrade the efficiency, so
1949-3053/$26.00 © 2011 IEEE

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IEEE TRANSACTIONS ON SMART GRID, VOL. 3, NO. 1, MARCH 2012
Fig. 2. Conventional PFC boost converter.
TABLE I
CONVENTIONAL BOOST CONVERTER PROTOTYPE COMPONENTS
Fig. 4. Efficiency versus output power at different input voltages for a conventional boost converter.
Fig. 5. Interleaved PFC boost converter.
B. Performance Evaluation of the Conventional Boost
Converter
Fig. 3. Input current, input voltage, and output voltage of a conventional boost
V. Y-axis scales: Iin 10 A/div, Vin 100 V/div and Vo
converter at
100 V/div.
dealing with the heat dissipation in a limited area becomes problematic.
The inductor volume also becomes a problematic design
issue at high power. Another challenge is the power rating limitation for current sense resistors at high power. Due to these
constraints, this topology is good for the low to medium power
range, up to approximately 1 kW. For power levels
kW,
typically, designers parallel discrete semiconductors, or use
expensive
Diode semiconductor modules in
order to deliver greater output power. An example of a module
commonly used in industry is the APT50N60JCCU2 from
Microsemi Corporation.
A. Experimental Results of the Conventional Boost Converter
An experimental prototype was built to verify the operation
of the conventional boost PFC converter. The components used
to build the prototype are listed in Table I.
Fig. 3 shows the input voltage, input current and PFC bus
voltage of the converter under the following test conditions:
V,
A,
kW,
V,
kHz.
Fig. 4 shows the efficiency of a conventional boost converter
at input voltages ranging from 90 V to 265 V. As it can be noted
from this graph, the efficiency drops significantly at low input
line as the power increases. To solve this problem for power
levels
kW, discrete semiconductors are paralleled, or expensive modules are used. This reduces the power loss in the
MOSFETs, but at low line, the input current increases and consequently the input bridge losses increase. As a result, the inductor current also increases.
This requires a design compromise between the core, inductor
size and inductance value. A lower inductance value for a boost
inductor increases the input current ripple and consequently increases the input EMI filter size. It also increases the output capacitor high frequency ripple, thereby reducing the output capacitor lifetime. Therefore, it can be concluded that a conventional boost converter is not the preferred topology for PHEV
battery charging applications.
III. INTERLEAVED BOOST CONVERTER
The interleaved boost converter, illustrated in Fig. 5, consists
of two boost converters in parallel operating 180 out of phase
[14]–[16].
The input current is the sum of the two input inductor currents. Because the inductors’ ripple currents are out of phase,
they tend to cancel each other and reduce the input ripple current caused by the boost switching action. The interleaved boost
converter has the advantage of paralleled semiconductors. Furthermore, by switching 180 out of phase, it doubles the effective switching frequency and introduces smaller input current
ripple, so the input EMI filter is relatively small [17]–[19]. With
ripple cancellation at the output, it also reduces stress on output

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415
TABLE II
INTERLEAVED BOOST CONVERTER PROTOTYPE COMPONENTS
Fig. 7. Efficiency versus output power at different input voltages for an interleaved boost converter.
Fig. 6. Input current, input voltage, and output voltage of an interleaved boost
V. Y-axis scales: Iin 10 A/div, Vin 100 V/div, and Vo
converter at
100 V/div.
Fig. 8. Bridgeless PFC boost converter.
capacitors. However, similar to the boost, this topology has the
heat management problem for the input diode bridge rectifiers;
therefore, it is limited to power levels up to approximately 3.5
kW.
A. Experimental Results of the Interleaved Boost Converter
An experimental prototype was built to verify the operation
of the interleaved boost PFC converter. The components used
to build the prototype are listed in Table II.
Fig. 6 shows the input voltage, input current and PFC bus
voltage of the converter under the following test conditions:
V,
A,
kW,
V,
kHz.
B. Performance Evaluation of the Interleaved Boost Converter
Fig. 7 shows the efficiency of an interleaved boost converter
at input voltages ranging from 90 V to 240 V. As it can be noted
from these graphs, the output power level has increased. Hence,
the efficiency profiles for each curve resemble those from the
conventional boost converter.
Despite the stated advantages of interleaving, the total power
losses are the same compared to a conventional boost converter.
IV. PHASE SHIFTED SEMI-BRIDGELESS BOOST CONVERTER
The bridgeless boost PFC topology avoids the need for the
rectifier input bridge yet maintains the classic boost topology
[20]–[27], as shown in Fig. 8.
It is an attractive solution for applications
kW, where
power density and efficiency are important. This converter
solves the problem of heat management in the input rectifier
Fig. 9. Phase shifted semi-bridgeless PFC boost converter [31].
diode bridge inherent to the conventional boost PFC, but it
introduces increased EMI [28], [29]. Another disadvantage of
this topology is the floating input line with respect to the PFC
ground, making it impossible to sense the input voltage without
a low frequency transformer or an optical coupler. Also, in
order to sense the input current, complex circuitry is needed to
sense the current in the MOSFET and diode paths separately,
since the current path does not share the same ground during
each half-line cycle [20], [30]. In order to address these issues,
a phase shifted semi-bridgeless boost converter, shown in Fig. 9
was introduced in [31].
However, this topology does not achieve high full load efficiency since there is high power stress in the main MOSFETs
due to high intrinsic body diode losses.
A. Experimental Results of the Phase Shifted Semi-Bridgeless
Boost Converter
An experimental prototype was built to verify the operation
of the phase shifted semi-bridgeless boost PFC converter. The
components used to build the prototype are listed in Table III.
Fig. 10 shows the input voltage, input current and PFC bus
voltage of the converter under the following test conditions:

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Fig. 10. Input current, input voltage, and output voltage of a phase shifted semiV. Y-axis scales: Iin 10 A/div, Vin 100
bridgeless boost converter at
V/div and Vo 100 V/div.
Fig. 12. THD as a function of output power at
V, and 70 kHz switching frequency.
V and 240 V,
TABLE III
COMPONENT USED IN THE SEMI-BRIDGELESS BOOST CONVERTER PROTOTYPE
Fig. 13. Power factor as a function of output power at
V, and 70 kHz switching frequency.
V,
Fig. 11. Efficiency versus output power at different input voltages for a phase
shifted semi-bridgeless boost converter.
V,
kHz.
A,
kW,
V,
B. Performance Evaluation of the Semi-Bridgeless Boost
Converter
Fig. 11 shows the efficiency of phase shifted semi-bridgeless
boost converter at input voltages ranging from 90 V to 240 V.
As it can be noted from this graph, the efficiency is significantly
improved at light load.
In order to verify the quality of the input current, the input
current THD is shown in Fig. 12. The power factor and harmonic orders are given and compared with EN 61000-3-2 standard in Figs. 13 and 14. It is noted that mains current THD is
less than 5% from 50% load to full load and it is compliant to
EN 61000-3-2 (Figs. 12 and 14). The converter power factor is
Fig. 14. Harmonics orders at
EN61000-3-2 standard.
V and 240
V and 240 V, compared against
shown over entire load range for 120 and 240 V input in Fig. 13.
The power factor is greater than 0.99 from 50% load to full load.
These results show that the phase shifted semi-bridgeless
PFC boost converter is ideally suited for automotive level I
residential charging applications in North America where the
typical supply is limited to 120 V and 1.44 kVA or 1.92 kVA.
As an example, for 120 V input voltage and 1700 W load the
efficiency is 95%, which is the same efficiency achieved with an
interleaved boost converter operating with the same conditions.
But at lighter loads, the semi-bridgeless converter achieves
much higher efficiency. This is critical for converters used in
applications such as battery chargers. In battery chargers, the
converter is fully loaded for only one third of the total charging
time (i.e., during the bulk charging stage). However, during the
absorption and float stages, which are two thirds of the total

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Fig. 15. Bridgeless interleaved PFC boost converter [34].
TABLE IV
BRIDGELESS INTERLEAVED BOOST CONVERTER PROTOTYPE COMPONENTS
Fig. 17. Efficiency versus output power at different input voltages for a bridgeless interleaved boost converter.
Fig. 16. Input current, input voltage, and output voltage of a bridgeless interV. Y-axis scales: Iin 10 A/div, Vin 100
leaved boost converter at
V/div, and Vo 100 V/div.
charging time, the charger is only partially loaded, so light load
efficiency is an important consideration.
V. BRIDGELESS INTERLEAVED BOOST CONVERTER
The bridgeless interleaved topology, shown in Fig. 15, was
proposed as a solution to operate at power levels above 3.5
kW. In comparison to the interleaved boost PFC, it introduces
two MOSFETs and also replaces four slow diodes with two fast
diodes. The gating signals are 180 out of phase, similar to the
interleaved boost. A detailed converter description and steady
state operation analysis are given in [32]–[34]. This converter
topology shows a high input power factor, high efficiency over
the entire load range, and low input current harmonics.
Since the proposed topology shows high input power factor,
high efficiency over the entire load range, and low input current
harmonics, it is a potential option for single phase PFC in high
power level II battery charging applications.
A. Experimental Results of the Bridgeless Interleaved Boost
Converter
An experimental prototype was built to verify the operation
of the bridgeless interleaved boost PFC converter. The components used to build the prototype are listed in Table IV. Fig. 16
Fig. 18. THD as a function of output power at
V, and 70 kHz switching frequency.
V and 240 V,
shows the input voltage, input current and PFC bus voltage of
the converter under the following test conditions:
V,
A,
kW,
V,
kHz.
B. Performance Evaluation of the Bridgeless Interleaved
Boost Converter
Fig. 17 shows the efficiency of the bridgeless interleaved
boost converter at input voltages ranging from 90 V to 240 V.
In general, this converter achieves higher efficiency than
both phase shifted semi-bridgeless converter and interleaved
boost at the same power levels. In addition, due to the improved
efficiency, greater output power can be achieved for a given
input current. For example, at 240 V input, the maximum
output power increases from 3.4 kW for the phase shifted
semi-bridgeless converter up to 4.2 kW for the bridgeless
interleaved boost converter.
Curves of the input current total harmonic distortion are provided in Fig. 18 for full load at 120 V and 240 V input. It is
noted that the input current THD is less than 5% from half load
to full load.
Power factor is another useful parameter to show the quality
of input current. The converter power factor is provided in
Fig. 19 for the entire load range at 120 V and 240 V input. The
power factor is greater than 0.99 from half load to full load.

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Fig. 21. Bridgeless interleaved resonant PFC boost converter [35].
Fig. 19. Power factor as a function of output power at
V, and 70 kHz switching frequency.
V,
V and 240
Fig. 22. Efficiency versus output power at 230 V input voltages for a bridgeless
interleaved resonant boost converter by Infineon Technologies AG [35].
TABLE V
BRIDGELESS INTERLEAVED RESONANT BOOST CONVERTER PROTOTYPE
COMPONENTS
Fig. 20. Harmonics orders at
EN61000-3-2 standard.
V and 240 V, compared against
In order to verify the quality of the input current in the proposed topology, its harmonics up to the 39th harmonic are given
and compared with the EN 61000-3-2 standard in Fig. 20 for 120
V and 240 V input. All converter harmonics are well below IEC
standard, which is required for PHEV chargers.
These results demonstrate that the bridgeless interleaved
boost converter is ideally suited for automotive level II residential charging applications in North America and Europe where
the typical supply is limited to input voltages of 240/250 V, and
power levels up to approximately 8 kVA—depending on the
input supply breaker limitation.
VI. BRIDGELESS INTERLEAVED RESONANT BOOST CONVERTER
The bridgeless interleaved resonant topology operating in
BCM was first introduced by Infineon Technologies [35] and
proposed for front end ac-dc stage of level II on-board chargers.
The topology is illustrated in Fig. 21.
Compared to the bridgeless interleaved boost converter, it replaces the four fast diodes with four slow diodes; however, it
requires two high side drivers for MOSFETs -Q1 and Q2 as
well as two low side drivers for Q3 and Q4. The other drawbacks with this topology include the need for at least two sets
of current sensors, two snubbers, and a complex digital control
scheme.
A. Experimental Results and Performance Evaluation of the
Bridgeless Interleaved Resonant Boost Converter
The operation of this converter and efficiency was reported
in [35]. The components used for the prototype are listed in
Table V. Fig. 22 shows the reported efficiency (reproduced) of
the converter under the following test conditions:
V,
A,
,
V. This converter achieves
a peak efficiency of 97.9% at 2.7 kW load, but the efficiency
degrades rapidly beyond the output power of 2.7 kW, so based
on the reported data, it is not an ideal candidate for automotive
level II charging.
VII. TOPOLOGY COMPARISON
Prototypes of the converter presented in Sections II–V were
built to provide data for a qualitative and quantitative performance comparison. The ac power source and dc electronics load
used in the test set-up are California Instrument Model 5001 iX
and Chroma Model 63204 respectively. Loss analysis modeling
was also performed to gain insight into the noted qualitative advantages/disadvantages of each prototype in comparison to the
measured efficiency.

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Fig. 24. Efficiency versus output power for different PFC boost converters.
Fig. 23. Loss distribution in semiconductors at
kW, and
kHz.
V,
V,
Fig. 23 shows the modeled loss distribution within the semiconductors for these topologies at
V,
W,
V, and
kHz. The regular diode losses consist
of only conduction losses in bridge rectifier diodes, i.e., reverse
recovery losses were neglected due to the low frequency mains
input. Due to the low reverse recovery characteristics ofSiC, these
diodes were selected for the boost diodes. Therefore reverse recovery losses were neglected for these diodes, so that only conduction losses were considered. Switching loss, conduction loss,
gate charge loss and
CV loss are included in the MOSFET
losses. The inductor losses were neglected in the comparison.
The regular diodes in input bridge rectifiers have the largest
share of losses among the topologies with the input bridge rectifier. The bridgeless topologies eliminate this large loss component
W . However, the tradeoff is that the MOSFET
losses are higher and the intrinsic body diodes of MOSFETs
conduct, producing new losses
W . The fast diodes in
the bridgeless interleaved PFC have slightly lower power losses,
since the boost diode average current is lower in these topologies. Overall the MOSFETs have increased current stress in the
bridgeless topologies, but the total semiconductor losses for the
bridgeless interleaved boost are 37% lower than the benchmark
conventional boost and 37% lower than the interleaved boost.
Since the bridge rectifier losses are so large, it was expected that bridgeless interleaved boost converter would have
the lowest power losses among the topologies studied in
Sections II–V. Also, it was noted that the losses in the input
bridge rectifiers were 56% of total losses in the conventional
PFC converter and in the interleaved PFC converter. Therefore
eliminating the input bridges in PFC converters is justified
despite the fact that new losses are introduced.
A more detailed circuit analysis and loss evaluation for the
proposed level I and level II chargers are given in [31], [34]
Fig. 24 illustrates the measured efficiency as a function of
output power for all five topologies studied under the following
operating conditions:
kHz,
V, and
V. All semiconductor and magnetic devices used in prototype units were the same. Limited information was available
for Infineon bridgeless interleaved resonant converter. Notably
it was measured at 230 V input voltage.
TABLE VI
TOPOLOGY OVERVIEW/COMPARISON
Table VI demonstrates an overall overview and comparison of all candidate topologies discussed for the front end
ac-dc stage of a PHEV battery charger. The phase shifted
semi-bridgeless PFC converter was the topology of choice for
level I chargers and the bridgeless interleaved PFC converter is
an optimal topology for level II chargers.
VIII. CONCLUSIONS
A topology survey aimed at evaluating topologies for use
in front end ac-dc converters for PHEV battery chargers is
presented in this paper. The potential converter solutions have
been analyzed and their performance characteristics are presented. Several prototype converter circuits were built to verify
the proof-of-concept. The results show that the phase shifted
semi bridgeless converter is ideally suited for automotive level
I residential charging applications in North America where
the typical supply is limited to 120 V and 1.44 kVA or 1.92
kVA. For high power level II residential charging applications,
the bridgeless interleaved boost converter is an ideal topology
candidate in North America and Europe where the typical
supply is limited to input voltages of 240/250 V and power
levels up to 8 kVA.

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Fariborz Musavi (S’10–M’11) received the B.Sc.
degree from Iran University of Science and Technology, Tehran, Iran, in 1994, the M.Sc. degree from
Concordia University, Montreal, QC, Canada, in
2001, and the Ph.D. degree in electrical engineering
with emphasis in power electronics from the University of British Columbia, Vancouver, BC, Canada.
Since 2001, he has been with several high-tech
companies including EMS Technologies Inc., Montreal, QC, Canada, DRS Pivotal Power, Bedford, NS,
Canada and Alpha Technologies, Bellingham, WA,
USA. Currently he is with Delta-Q Technologies Corp., Burnaby, BC, Canada,
where he works as the Manager of Research, Engineering and is engaged in
research on simulation, analysis, and design of battery chargers for industrial
and automotive applications. His current research interests include high power,
high efficiency converter topologies, high power factor rectifiers, grid-tied
inverters, electric vehicles, and sustainable and renewable energy sources.
Dr. Musavi is a Registered Professional Engineer in the Province of British
Columbia. He was the recipient of the First Prize Paper Award from the IEEE
Industry Applications Society Industrial Power Converter Committee in 2011.
Murray Edington (M’02) studied engineering
at Cambridge University and the University of
Newcastle upon Tyne.
He has 14 years experience in developing automotive power electronics products (specifically EV and
hybrid system components) and 11 years previous experience in the development of industrial power electronics products. Industrial experience includes positions at Ricardo Consulting Engineers, Motorola Automotive Industrial Electronics Group, Farnell Advance Power, and Wavedriver Ltd. He is currently Director of Product Engineering at Delta-Q Technologies Corp., Vancouver, BC,
Canada.

9. MUSAVI et al.: EVALUATION AND EFFICIENCY COMPARISON OF FRONT END AC-DC PLUG-IN HYBRID CHARGER TOPOLOGIES
Wilson Eberle (S’98–M’07) received the B.Sc.,
M.Sc., and Ph.D. degrees from the Department
of Electrical and Computer Engineering, Queen’s
University, Kingston, ON, Canada, in 2000, 2003,
and 2008, respectively.
From 1997 to 1999, he was an Engineering Co-Op
Student at Ford Motor Company, Windsor, ON, and
at Astec Advanced Power Systems, Nepean, ON.
He is currently an Assistant Professor in the School
of Engineering, University of British Columbia,
Kelowna, BC, Canada. He is the author or coauthor
of more than 20 technical papers published in various conferences and IEEE
journals. He is the holder of one U.S. pending patent. He is also the holder of
international pending patents. His current research interests include high-efficiency, high-power density, low-power dc-dc converters, digital control
techniques for dc-dc converters, electromagnetic interference (EMI) filter
design for switching converters, and resonant gate drive techniques for dc-dc
converters.
Dr. Eberle was the recipient of the Ontario Graduate Scholarship and has
won awards from the Power Source Manufacturer’s Association (PSMA) and
the Ontario Centres of Excellence (OCE) to present papers at conferences.
421
William G. Dunford (S’78–M’81–SM’92) was a
student at Imperial College, London, UK, and the
University of Toronto, Toronto, ON, Canada.
Industrial experience includes positions at the
Royal Aircraft Establishment (now Qinetiq),
Schlumberger, and Alcatel. He has had a long term
interest in photovoltaic powered systems and is also
involved in projects in the automotive and energy
harvesting areas. He is a director of Legend Power
Systems, Burnaby, BC, Canada, where he has also
been active in product development. He has also
been a faculty member at Imperial College and the University of Toronto, and is
now on the faculty of the University of British Columbia, Vancouver, Canada.
Dr. Dunford has served in various positions on the Advisory Committee of
the IEEE Power Electronics Society and chaired PESC in 1986 and 2001.