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A robust fsm watermarking scheme for ip protection of sequential circuit design copy
1. BES GROUP OF EDUCATIONAL INSTITUTIONS
ANGALLU,MADANAPALLE
DEPARTMENT OF ECE
A Robust FSM Watermarking Scheme for IP Protection of Sequential Circuit Design
Under the Guidance of Submitted by
K. Balachandra, M.TECH V. R. NITHYA
Associate Professor 149M1D5708
2. ABSTRACT :
To protect a VLSI design against IP infringement is by embedding a signature
An active approach to protect a VLSI design against IP infringement is by embedding a
signature that can only be uniquely generated by the IP author into the design during
the process of its creation.
4. INTRODUCTION :
WATERMARK:
This is science of embedding copyright information in original files .The information
embedded is called watermark
Digital Watermarks are may be used to verify the authenticity.
It is prominently used for tracing copyright infringements .
7. Existing System & DRAWBACKS
EXISTING SYSTEM :
Static watermarking
To detect the output without protected design
DRAWBACKS:
Not suitable for large design
More time to detect Watermark bits
8. PROPOSED System
Dynamic /Digital watermarking
The watermark is embedded in the state transitions of FSM at the behavioral
level
Robust against state reduction attacks.
In this System it takes less time to detect watermark bits for implementation
10. GENERATION OF WATERMARK SEQUENCE
Message, is first encoded into a binary string and then encrypted by a
provable cryptographic algorithm with the secret key of the IP owner
We use Secure Hash algorithm and Pseudo random generator to create a
watermark.
14. ADVANTAGES
The proposed watermarking scheme is robust against state reduction attacks.
It is different from other transition based embedding methods in that it has lower
embedding overhead and has overcome the vulnerability of auxiliary inputs.
Watermark bits can be detected by FSM easily and it can be implemented in VLSI
Design
15. APPLICATIONS
The watermark should be able to withstand after normal signal processing operations
such as image cropping, transformation, compression.
Depending on the ability of the watermark to withstand normal signal processing
operations, digital watermarking can be categorized as robust, fragile and semi-fragile
watermarking.
Robust watermarks are detectable even after some image processing operations has
been performed on the watermarked image such as image scaling, bending, and
cropping, and so on. Robust watermarks are mainly used for copyright protection.
16. FUTURE ENHANCEMENT
• The copying of digital content without quality loss is not so difficult. Due to this, there
are more chances of copying of such digital information. So, there is great need of
prohibiting such illegal copyright of digital media.
• Digital watermarking (DWM) is the powerful solution to this problem.
• Digital watermarking is nothing but the technology in which there is embedding of
various information in digital content which we have to protect from illegal copying.
• Digital watermarks are of different types as robust, fragile, visible and invisible.
Application is depending upon these watermarks classifications.
17. CONCLUSION
The proposed method offers a high degree of tamper resistance and provides an
easy and noninvasive copy detection.
The FSM watermark is highly resilient to all conceivable watermark removal
attacks.
18. REFERENCES
[1] Intellectual Property Protection Development Working Group, Intellectual
Property Protection: Schemes, Alternatives and Discussion. VSI Alliance, Aug.
2001, white paper, version 1.1
[2] I. Hong and M. Potkonjak, “Techniques for intellectual property protection of
DSP designs,” in Proc. IEEE Int. Conf. Acoust. Speech Signal Process., vol. 5.
May 1998, pp. 3133–3136.
[3] A. T. Abdel-Hamid, S. Tahar, and E. M. Aboulhamid, “A survey on IP
watermarking techniques,” in Design Automation for Embedded Systems, vol.
10. Berlin, Germany: Springer-Verlag, Jul. 2005, pp. 1–17.
[4] D. Kirovski, Y. Y. Hwang, M. Potkonjak, and J. Cong, “Protecting
combinational logic synthesis solutions,” IEEE Trans. Comput.-Aided Design
Integr. Circuits Syst., vol. 25, no. 12, pp. 2687–2696, Dec.2006.