SlideShare a Scribd company logo
1 of 24
Your Route to Design Success:
PCB Routing Tips from the Pros
4/26/2019 PCB Routing Flow 1
4/26/2019 2
Routing is Critical to Success
Over 50% of total design time can
be spent in the routing phase.
- Cadence User Study
PCB Routing Flow
4/26/2019 3
Define Your Process Upfront
PCB Routing Flow
Placement
Stackup
Constraints/
Criticals
Auto / Interactive
Routing
Cleanup &
Verification
1. Define placement strategy
2. Complete placement
3. Set your boundaries
4. PCB Stack up and impedance requirements
5. Define routing constraints defined for critical nets
– (Diff pair rules, matched length, Impedance control, physical and
spacing rules etc.)
6. Fan out vias established for signal and power connections
7. Define power distribution solution
– (Split planes, pre-poured power islands around regulators, high current
devices, etc.)
8. Route critical nets
– (diff pairs, clocks, matched groups etc.)
9. Bulk routing of remaining nets
10. Final cleanup, DFM checking
Recommended Route Process Flow
PCB Routing Flow4/23/2019 4
5
Mechanical constraints should be evaluated and implemented such as
mechanical mounting holes, mechanical cut outs, route keep-out regions
Connector placements usually have specific X,Y placements and should
be completed first followed by adding fixed properties so they are locked in
Large pin count devices should be placed next, using the signal rats nest
as a guide for orientation to minimize rats nest twisting or crossovers for
better signal flow
Parts should be grouped together by function and rats nest optimized for
routing (Room properties help here)
Decoupling caps should be placed near the device power pins to increase
their effectiveness
Placement
Strategy
PCB Routing Flow4/23/2019
6
Parts should be placed on the coarsest grid based on the pin pitch
of the majority of the parts
Placement grid will be divisible by the routing grid
– example: If most of the parts have a 50 mil pin pitch, then the routing
grid could be 5, 10, 25, or 50 mil
Fan-out of complex parts can be achieved at the library level for
future re-use
Fan-out grid is a multiple of the pin pitch grid
Placement Grid
Tips & Best Practices
PCB Routing Flow4/23/2019
7
Define route keep-ins to manage clearance of
copper planes, vias and trace routing to the
board edge
Make sure to define any required via or route
keep-outs under any connectors. Some
connectors have metal shields etc. that may
short signals
Assembly requirements to be considered
and implemented such as v-scores, break off
tabs, fiducials etc.
Set your Boundaries
Defining Keep-In and Keep-Outs
PCB Routing Flow4/23/2019
8
Take care when defining your stack-up
Stack-up has direct impact on differential
impedance, single ended impedance
Impedance targets should be modeled and
evaluated before moving forward
Results will help you define physical width
and gap spacing rules for differential pairs
PCB Stack-Up
PCB Routing Flow4/23/2019
9
Differential pair parameters defined in the
electrical domain
Length rules defined for clock lines,
matched groups etc.
Physical trace widths, spacing rules, and
via size should be defined based on
board density and current requirements
for any high power devices
Defining Constraints
Why?
PCB Routing Flow4/23/2019
10
Fanout vias are used when designing
multilayer designs
Fanout vias for signal pins allows access
to multiple signal layers for routing.
This provides additional space and routing
channels for designs with increased
density and pin counts
Fanout vias for power must be established
for power distribution and to complete
connectivity to inner plane layers
Fanouts and Power Distribution
PCB Routing Flow4/23/2019
11
Split plane boundaries are established
for separation between copper pours
Saves space/layers for providing power
distribution on less layers
Assigned colors to different power
nets helps to determine split plane
boundary location
Separation widths between planes in
high voltage areas may be increased to
prevent arc-over
Establish Split for PWR Distribution
PCB Routing Flow4/23/2019
12
Critical nets are routed to meet impedance
rules and timing requirements
Common design practices include not
routing high speed signals over plane splits
Why? It causes impedance discontinuities
that impact signal integrity
Segment over void check highlights violations
Routing Critical Nets
PCB Routing Flow4/23/2019
4/26/2019 13PCB Routing Flow
Great, All My Critical
Signals Are Done.
Now What?
14
How do I handle all the rest of the normal ‘boring’ connections?
What is the best use of my time?
Question: What about an auto-router?
Answer: It depends….
What people say about auto-routers…
• It will take too much time to learn the auto-router
• The results are not good (I can do a better job)
• I will spend too much time doing cleanup
• Route quality may impact the performance of the design
Auto-routers often get a bad rap!
‘Bulk’ Routing
PCB Routing Flow4/23/2019
4/26/2019 15
Bulk Routing
Pros & Cons
PCB Routing Flow
Manual / Interactive Routing
+ More control
+ Less upfront planning required
+ Easier to adjust to changes on the fly
- Can take longer
- Can be error prone (human error)
- Less time to test ‘what-if’ strategies
Autorouting
+ Fast
+ Can try many routing strategies quickly
+ Reusable
- Less granular control
- Can be hard to adjust to design change
- Can be difficult to convey user intent
4/26/2019 16
Ultimately…
PCB Routing Flow
The goal is to finish the
route effectively, making
the best use of your time
and expertise. Routers are
just tools. Use what works
best for the job at hand.
17
PCB Route Cleanup
PCB Routing Flow4/23/2019
What kind of route defects should I look for?
90-degree corners
Acute Angles
Non-ideal Pad Entry
Here’s a few… Plus some more…
• Parallel line gap
• Uncoupled diff pair segments
• Arc radius
• Non arc corners
• Miter / corner size
18
Manual Inspection is an
option. Often tedious and
error-prone.
Ideally, your CAD tool
provides routines to help
identify problems for you.
Most are easy to fix once
they are found
How to Find and Fix?
PCB Routing Flow4/23/2019
4/26/2019 PCB Routing Flow 19
• Ensuring your design is manufacturable is crucial
• Hopefully your CAD program provides ways to embed DFM rules
and checking into the design process
*Check-out our webinar on Real-Time In-Design DFM for more info
DFM
4/26/2019 20 20
Demo Time
PCB Routing Flow
4/26/2019 21PCB Routing Flow
Bonus
Managing/Routing
Large BUS Structures
4/26/2019 22
Demo Time
PCB Routing Flow
4/26/2019 23PCB Routing Flow
Routing is one of the most critical and time
consuming stages in the design process. With the
proper processes, knowledge, and tools you can
be confident in your ability to achieve routing closure.
4/26/2019 24
Thank you
Watch the Full Webinar on Demand
https://resources.ema-eda.com/pcb-layout-
routing/your-route-to-design-success-pcb-routing-tips-
from-the-pros
EMA Design Automation
800-813-7494
edc@ema-eda.com
www.ema-eda.com
PCB Routing Flow

More Related Content

What's hot

Rf design and review guidelines
Rf design and review guidelinesRf design and review guidelines
Rf design and review guidelinesJOSE T Y
 
Zuken - Gigabit LVDS Signaling on a PCB assisted by Simulation and S-Paramete...
Zuken - Gigabit LVDS Signaling on a PCB assisted by Simulation and S-Paramete...Zuken - Gigabit LVDS Signaling on a PCB assisted by Simulation and S-Paramete...
Zuken - Gigabit LVDS Signaling on a PCB assisted by Simulation and S-Paramete...Zuken
 
Modified design for Full Swing SERF and High Speed SERF
Modified design for Full Swing SERF and High Speed SERFModified design for Full Swing SERF and High Speed SERF
Modified design for Full Swing SERF and High Speed SERFIJERA Editor
 
Topograhical synthesis
Topograhical synthesis   Topograhical synthesis
Topograhical synthesis Deiptii Das
 
Design Simulation and Measurement v3
Design Simulation and Measurement v3Design Simulation and Measurement v3
Design Simulation and Measurement v3Xu Jiang
 
Physical Design Flow Challenges at 28nm on Multi-million Gate Blocks
Physical Design Flow Challenges at 28nm on Multi-million Gate BlocksPhysical Design Flow Challenges at 28nm on Multi-million Gate Blocks
Physical Design Flow Challenges at 28nm on Multi-million Gate BlockseInfochips (An Arrow Company)
 
Performance Analysis of a Low-Power High-Speed Hybrid 1-Bit Full Adder Circui...
Performance Analysis of a Low-Power High-Speed Hybrid 1-Bit Full Adder Circui...Performance Analysis of a Low-Power High-Speed Hybrid 1-Bit Full Adder Circui...
Performance Analysis of a Low-Power High-Speed Hybrid 1-Bit Full Adder Circui...IRJET Journal
 
Naveed RF Engineer
Naveed RF EngineerNaveed RF Engineer
Naveed RF EngineerNaveed Ahmad
 
Resume_Babasaheb Chavan_BE(ETC)_9.2_Years_Exp in Telecom domain
Resume_Babasaheb Chavan_BE(ETC)_9.2_Years_Exp in Telecom domainResume_Babasaheb Chavan_BE(ETC)_9.2_Years_Exp in Telecom domain
Resume_Babasaheb Chavan_BE(ETC)_9.2_Years_Exp in Telecom domainBabasaheb Chavan
 
Iaetsd design and simulation of high speed cmos full adder (2)
Iaetsd design and simulation of high speed cmos full adder (2)Iaetsd design and simulation of high speed cmos full adder (2)
Iaetsd design and simulation of high speed cmos full adder (2)Iaetsd Iaetsd
 
Corning slideshare 3
Corning slideshare 3Corning slideshare 3
Corning slideshare 3julieeelaine
 
Yan zhang resume
Yan zhang   resumeYan zhang   resume
Yan zhang resumeYanZhang314
 
Design challenges in physical design
Design challenges in physical designDesign challenges in physical design
Design challenges in physical designDeiptii Das
 
Carrier ethernet-for-power-utilities-presentation
Carrier ethernet-for-power-utilities-presentationCarrier ethernet-for-power-utilities-presentation
Carrier ethernet-for-power-utilities-presentationNir Cohen
 
Wcdma radio-network-optimization-guide
Wcdma radio-network-optimization-guideWcdma radio-network-optimization-guide
Wcdma radio-network-optimization-guideDobrin Dobrev
 
THE NEXT GENERATION OF ADVANCED ROBOTICS
THE NEXT GENERATION OF ADVANCED ROBOTICSTHE NEXT GENERATION OF ADVANCED ROBOTICS
THE NEXT GENERATION OF ADVANCED ROBOTICSSunil Jain
 
IRJET- Signal Integrity Analysis of High Speed Interconnects in SATA Conn...
IRJET-  	  Signal Integrity Analysis of High Speed Interconnects in SATA Conn...IRJET-  	  Signal Integrity Analysis of High Speed Interconnects in SATA Conn...
IRJET- Signal Integrity Analysis of High Speed Interconnects in SATA Conn...IRJET Journal
 

What's hot (20)

Rf design and review guidelines
Rf design and review guidelinesRf design and review guidelines
Rf design and review guidelines
 
Zuken - Gigabit LVDS Signaling on a PCB assisted by Simulation and S-Paramete...
Zuken - Gigabit LVDS Signaling on a PCB assisted by Simulation and S-Paramete...Zuken - Gigabit LVDS Signaling on a PCB assisted by Simulation and S-Paramete...
Zuken - Gigabit LVDS Signaling on a PCB assisted by Simulation and S-Paramete...
 
Modified design for Full Swing SERF and High Speed SERF
Modified design for Full Swing SERF and High Speed SERFModified design for Full Swing SERF and High Speed SERF
Modified design for Full Swing SERF and High Speed SERF
 
Topograhical synthesis
Topograhical synthesis   Topograhical synthesis
Topograhical synthesis
 
Design Simulation and Measurement v3
Design Simulation and Measurement v3Design Simulation and Measurement v3
Design Simulation and Measurement v3
 
Physical Design Flow Challenges at 28nm on Multi-million Gate Blocks
Physical Design Flow Challenges at 28nm on Multi-million Gate BlocksPhysical Design Flow Challenges at 28nm on Multi-million Gate Blocks
Physical Design Flow Challenges at 28nm on Multi-million Gate Blocks
 
Performance Analysis of a Low-Power High-Speed Hybrid 1-Bit Full Adder Circui...
Performance Analysis of a Low-Power High-Speed Hybrid 1-Bit Full Adder Circui...Performance Analysis of a Low-Power High-Speed Hybrid 1-Bit Full Adder Circui...
Performance Analysis of a Low-Power High-Speed Hybrid 1-Bit Full Adder Circui...
 
Naveed RF Engineer
Naveed RF EngineerNaveed RF Engineer
Naveed RF Engineer
 
Resume_Babasaheb Chavan_BE(ETC)_9.2_Years_Exp in Telecom domain
Resume_Babasaheb Chavan_BE(ETC)_9.2_Years_Exp in Telecom domainResume_Babasaheb Chavan_BE(ETC)_9.2_Years_Exp in Telecom domain
Resume_Babasaheb Chavan_BE(ETC)_9.2_Years_Exp in Telecom domain
 
Iaetsd design and simulation of high speed cmos full adder (2)
Iaetsd design and simulation of high speed cmos full adder (2)Iaetsd design and simulation of high speed cmos full adder (2)
Iaetsd design and simulation of high speed cmos full adder (2)
 
Corning slideshare 3
Corning slideshare 3Corning slideshare 3
Corning slideshare 3
 
Yan zhang resume
Yan zhang   resumeYan zhang   resume
Yan zhang resume
 
Design challenges in physical design
Design challenges in physical designDesign challenges in physical design
Design challenges in physical design
 
Carrier ethernet-for-power-utilities-presentation
Carrier ethernet-for-power-utilities-presentationCarrier ethernet-for-power-utilities-presentation
Carrier ethernet-for-power-utilities-presentation
 
Adeel Ahmed-CV
Adeel Ahmed-CVAdeel Ahmed-CV
Adeel Ahmed-CV
 
serdes
serdesserdes
serdes
 
Wcdma radio-network-optimization-guide
Wcdma radio-network-optimization-guideWcdma radio-network-optimization-guide
Wcdma radio-network-optimization-guide
 
THE NEXT GENERATION OF ADVANCED ROBOTICS
THE NEXT GENERATION OF ADVANCED ROBOTICSTHE NEXT GENERATION OF ADVANCED ROBOTICS
THE NEXT GENERATION OF ADVANCED ROBOTICS
 
ahsan elahi CV3
ahsan elahi CV3ahsan elahi CV3
ahsan elahi CV3
 
IRJET- Signal Integrity Analysis of High Speed Interconnects in SATA Conn...
IRJET-  	  Signal Integrity Analysis of High Speed Interconnects in SATA Conn...IRJET-  	  Signal Integrity Analysis of High Speed Interconnects in SATA Conn...
IRJET- Signal Integrity Analysis of High Speed Interconnects in SATA Conn...
 

Similar to Your Route to Design Success - PCB Routing Tips from the Pros

Placement and routing in full custom physical design
Placement and routing in full custom physical designPlacement and routing in full custom physical design
Placement and routing in full custom physical designDeiptii Das
 
Floorplanning in physical design
Floorplanning in physical designFloorplanning in physical design
Floorplanning in physical designMurali Rai
 
ODSA PHY Layer
ODSA PHY LayerODSA PHY Layer
ODSA PHY Layerjennimenni
 
Serial Link Design - Meeting the Need for Speed
Serial Link Design - Meeting the Need for SpeedSerial Link Design - Meeting the Need for Speed
Serial Link Design - Meeting the Need for SpeedEMA Design Automation
 
Breadboard powerpoint explantion.ppt
Breadboard powerpoint explantion.pptBreadboard powerpoint explantion.ppt
Breadboard powerpoint explantion.pptJohnVincentPINTO
 
Panduit EMEA SI Webinar 9
Panduit EMEA SI Webinar 9Panduit EMEA SI Webinar 9
Panduit EMEA SI Webinar 9Panduit
 
High Voltage PCB Design Presentation by Altium
High Voltage PCB Design Presentation by AltiumHigh Voltage PCB Design Presentation by Altium
High Voltage PCB Design Presentation by AltiumAltium
 
Rf hardware design and integration 4x4 mimo for ultra wide band base station
Rf hardware design and integration 4x4 mimo for ultra wide band base stationRf hardware design and integration 4x4 mimo for ultra wide band base station
Rf hardware design and integration 4x4 mimo for ultra wide band base stationZaryal Social
 
TechShanghai2016 - 从全局角度实现IC、封装和PCB的协同优化
TechShanghai2016 - 从全局角度实现IC、封装和PCB的协同优化TechShanghai2016 - 从全局角度实现IC、封装和PCB的协同优化
TechShanghai2016 - 从全局角度实现IC、封装和PCB的协同优化Hardway Hou
 
Six Hidden Costs in a 99 Cent Wireless SoC Considerations when choosing betwe...
Six Hidden Costs in a 99 Cent Wireless SoC Considerations when choosing betwe...Six Hidden Costs in a 99 Cent Wireless SoC Considerations when choosing betwe...
Six Hidden Costs in a 99 Cent Wireless SoC Considerations when choosing betwe...Pallavi Das
 
IC reverse engineering
IC reverse engineeringIC reverse engineering
IC reverse engineeringhelloseo1
 
ECE 24 Final Report 052609
ECE 24 Final Report 052609ECE 24 Final Report 052609
ECE 24 Final Report 052609crh342
 

Similar to Your Route to Design Success - PCB Routing Tips from the Pros (20)

Circuit Mechanix Jun 2016
Circuit Mechanix Jun 2016Circuit Mechanix Jun 2016
Circuit Mechanix Jun 2016
 
Placement and routing in full custom physical design
Placement and routing in full custom physical designPlacement and routing in full custom physical design
Placement and routing in full custom physical design
 
Pd flow i
Pd flow iPd flow i
Pd flow i
 
Floorplanning in physical design
Floorplanning in physical designFloorplanning in physical design
Floorplanning in physical design
 
ODSA PHY Layer
ODSA PHY LayerODSA PHY Layer
ODSA PHY Layer
 
ODSA - PHY Layer
ODSA - PHY LayerODSA - PHY Layer
ODSA - PHY Layer
 
Black_Box_Cabling_Guide.pdf
Black_Box_Cabling_Guide.pdfBlack_Box_Cabling_Guide.pdf
Black_Box_Cabling_Guide.pdf
 
63151777 core-design
63151777 core-design63151777 core-design
63151777 core-design
 
Serial Link Design - Meeting the Need for Speed
Serial Link Design - Meeting the Need for SpeedSerial Link Design - Meeting the Need for Speed
Serial Link Design - Meeting the Need for Speed
 
Breadboard powerpoint explantion.ppt
Breadboard powerpoint explantion.pptBreadboard powerpoint explantion.ppt
Breadboard powerpoint explantion.ppt
 
Panduit EMEA SI Webinar 9
Panduit EMEA SI Webinar 9Panduit EMEA SI Webinar 9
Panduit EMEA SI Webinar 9
 
High Voltage PCB Design Presentation by Altium
High Voltage PCB Design Presentation by AltiumHigh Voltage PCB Design Presentation by Altium
High Voltage PCB Design Presentation by Altium
 
Pcb manufacturing companies
Pcb manufacturing companies Pcb manufacturing companies
Pcb manufacturing companies
 
Rf hardware design and integration 4x4 mimo for ultra wide band base station
Rf hardware design and integration 4x4 mimo for ultra wide band base stationRf hardware design and integration 4x4 mimo for ultra wide band base station
Rf hardware design and integration 4x4 mimo for ultra wide band base station
 
03 profibus design_good_practices
03 profibus design_good_practices03 profibus design_good_practices
03 profibus design_good_practices
 
TechShanghai2016 - 从全局角度实现IC、封装和PCB的协同优化
TechShanghai2016 - 从全局角度实现IC、封装和PCB的协同优化TechShanghai2016 - 从全局角度实现IC、封装和PCB的协同优化
TechShanghai2016 - 从全局角度实现IC、封装和PCB的协同优化
 
Chapter1.slides
Chapter1.slidesChapter1.slides
Chapter1.slides
 
Six Hidden Costs in a 99 Cent Wireless SoC Considerations when choosing betwe...
Six Hidden Costs in a 99 Cent Wireless SoC Considerations when choosing betwe...Six Hidden Costs in a 99 Cent Wireless SoC Considerations when choosing betwe...
Six Hidden Costs in a 99 Cent Wireless SoC Considerations when choosing betwe...
 
IC reverse engineering
IC reverse engineeringIC reverse engineering
IC reverse engineering
 
ECE 24 Final Report 052609
ECE 24 Final Report 052609ECE 24 Final Report 052609
ECE 24 Final Report 052609
 

More from EMA Design Automation

Design for Manufacturing (DFM) and Why it Matters
Design for Manufacturing (DFM) and Why it MattersDesign for Manufacturing (DFM) and Why it Matters
Design for Manufacturing (DFM) and Why it MattersEMA Design Automation
 
Let's Get Flexible: Expert Tips for Designing Flex PCBs
Let's Get Flexible: Expert Tips for Designing Flex PCBsLet's Get Flexible: Expert Tips for Designing Flex PCBs
Let's Get Flexible: Expert Tips for Designing Flex PCBsEMA Design Automation
 
Your PCB Power Delivery Network (PDN) Gives Your Board Life
Your PCB Power Delivery Network (PDN) Gives Your Board LifeYour PCB Power Delivery Network (PDN) Gives Your Board Life
Your PCB Power Delivery Network (PDN) Gives Your Board LifeEMA Design Automation
 
Modeling an Embedded Device for PSpice Simulation
Modeling an Embedded Device for PSpice SimulationModeling an Embedded Device for PSpice Simulation
Modeling an Embedded Device for PSpice SimulationEMA Design Automation
 
PTC Live: Integrating PTC Windchill with Cadence PCB Design
PTC Live: Integrating PTC Windchill with Cadence PCB DesignPTC Live: Integrating PTC Windchill with Cadence PCB Design
PTC Live: Integrating PTC Windchill with Cadence PCB DesignEMA Design Automation
 
Implementing a Flexible Design Reuse Methodology
Implementing a Flexible Design Reuse MethodologyImplementing a Flexible Design Reuse Methodology
Implementing a Flexible Design Reuse MethodologyEMA Design Automation
 
ECAD MCAD Design Data Management with PTC Windchill and Cadence Allegro PCB
ECAD MCAD Design Data Management with PTC Windchill and Cadence Allegro PCBECAD MCAD Design Data Management with PTC Windchill and Cadence Allegro PCB
ECAD MCAD Design Data Management with PTC Windchill and Cadence Allegro PCBEMA Design Automation
 
OrCAD Library Builder Overview Presentation
OrCAD Library Builder Overview PresentationOrCAD Library Builder Overview Presentation
OrCAD Library Builder Overview PresentationEMA Design Automation
 
OrCAD Documentation Editor PCB Documentation Environment
OrCAD Documentation Editor PCB Documentation EnvironmentOrCAD Documentation Editor PCB Documentation Environment
OrCAD Documentation Editor PCB Documentation EnvironmentEMA Design Automation
 
Analog Mixed Signal Simulation With PSpice
Analog Mixed Signal Simulation With PSpiceAnalog Mixed Signal Simulation With PSpice
Analog Mixed Signal Simulation With PSpiceEMA Design Automation
 

More from EMA Design Automation (16)

How does your Stack-up, stack up?
How does your Stack-up, stack up?How does your Stack-up, stack up?
How does your Stack-up, stack up?
 
Design for Manufacturing (DFM) and Why it Matters
Design for Manufacturing (DFM) and Why it MattersDesign for Manufacturing (DFM) and Why it Matters
Design for Manufacturing (DFM) and Why it Matters
 
Let's Get Flexible: Expert Tips for Designing Flex PCBs
Let's Get Flexible: Expert Tips for Designing Flex PCBsLet's Get Flexible: Expert Tips for Designing Flex PCBs
Let's Get Flexible: Expert Tips for Designing Flex PCBs
 
Your PCB Power Delivery Network (PDN) Gives Your Board Life
Your PCB Power Delivery Network (PDN) Gives Your Board LifeYour PCB Power Delivery Network (PDN) Gives Your Board Life
Your PCB Power Delivery Network (PDN) Gives Your Board Life
 
What's New - OrCAD 17.2 QIR 6
What's New - OrCAD 17.2 QIR 6What's New - OrCAD 17.2 QIR 6
What's New - OrCAD 17.2 QIR 6
 
PCB Data Management Webinar
PCB Data Management WebinarPCB Data Management Webinar
PCB Data Management Webinar
 
PCB Virtual Prototyping with PSpice
PCB Virtual Prototyping with PSpicePCB Virtual Prototyping with PSpice
PCB Virtual Prototyping with PSpice
 
Modeling an Embedded Device for PSpice Simulation
Modeling an Embedded Device for PSpice SimulationModeling an Embedded Device for PSpice Simulation
Modeling an Embedded Device for PSpice Simulation
 
PTC Live: Integrating PTC Windchill with Cadence PCB Design
PTC Live: Integrating PTC Windchill with Cadence PCB DesignPTC Live: Integrating PTC Windchill with Cadence PCB Design
PTC Live: Integrating PTC Windchill with Cadence PCB Design
 
OrCAD Panel Editor
OrCAD Panel EditorOrCAD Panel Editor
OrCAD Panel Editor
 
Implementing a Flexible Design Reuse Methodology
Implementing a Flexible Design Reuse MethodologyImplementing a Flexible Design Reuse Methodology
Implementing a Flexible Design Reuse Methodology
 
ECAD MCAD Design Data Management with PTC Windchill and Cadence Allegro PCB
ECAD MCAD Design Data Management with PTC Windchill and Cadence Allegro PCBECAD MCAD Design Data Management with PTC Windchill and Cadence Allegro PCB
ECAD MCAD Design Data Management with PTC Windchill and Cadence Allegro PCB
 
OrCAD Library Builder Overview Presentation
OrCAD Library Builder Overview PresentationOrCAD Library Builder Overview Presentation
OrCAD Library Builder Overview Presentation
 
OrCAD Documentation Editor PCB Documentation Environment
OrCAD Documentation Editor PCB Documentation EnvironmentOrCAD Documentation Editor PCB Documentation Environment
OrCAD Documentation Editor PCB Documentation Environment
 
PCB Design and Data Management
PCB Design and Data ManagementPCB Design and Data Management
PCB Design and Data Management
 
Analog Mixed Signal Simulation With PSpice
Analog Mixed Signal Simulation With PSpiceAnalog Mixed Signal Simulation With PSpice
Analog Mixed Signal Simulation With PSpice
 

Recently uploaded

Gfe Mayur Vihar Call Girls Service WhatsApp -> 9999965857 Available 24x7 ^ De...
Gfe Mayur Vihar Call Girls Service WhatsApp -> 9999965857 Available 24x7 ^ De...Gfe Mayur Vihar Call Girls Service WhatsApp -> 9999965857 Available 24x7 ^ De...
Gfe Mayur Vihar Call Girls Service WhatsApp -> 9999965857 Available 24x7 ^ De...srsj9000
 
Biology for Computer Engineers Course Handout.pptx
Biology for Computer Engineers Course Handout.pptxBiology for Computer Engineers Course Handout.pptx
Biology for Computer Engineers Course Handout.pptxDeepakSakkari2
 
High Profile Call Girls Nagpur Isha Call 7001035870 Meet With Nagpur Escorts
High Profile Call Girls Nagpur Isha Call 7001035870 Meet With Nagpur EscortsHigh Profile Call Girls Nagpur Isha Call 7001035870 Meet With Nagpur Escorts
High Profile Call Girls Nagpur Isha Call 7001035870 Meet With Nagpur Escortsranjana rawat
 
APPLICATIONS-AC/DC DRIVES-OPERATING CHARACTERISTICS
APPLICATIONS-AC/DC DRIVES-OPERATING CHARACTERISTICSAPPLICATIONS-AC/DC DRIVES-OPERATING CHARACTERISTICS
APPLICATIONS-AC/DC DRIVES-OPERATING CHARACTERISTICSKurinjimalarL3
 
Call Girls Delhi {Jodhpur} 9711199012 high profile service
Call Girls Delhi {Jodhpur} 9711199012 high profile serviceCall Girls Delhi {Jodhpur} 9711199012 high profile service
Call Girls Delhi {Jodhpur} 9711199012 high profile servicerehmti665
 
SPICE PARK APR2024 ( 6,793 SPICE Models )
SPICE PARK APR2024 ( 6,793 SPICE Models )SPICE PARK APR2024 ( 6,793 SPICE Models )
SPICE PARK APR2024 ( 6,793 SPICE Models )Tsuyoshi Horigome
 
microprocessor 8085 and its interfacing
microprocessor 8085  and its interfacingmicroprocessor 8085  and its interfacing
microprocessor 8085 and its interfacingjaychoudhary37
 
Heart Disease Prediction using machine learning.pptx
Heart Disease Prediction using machine learning.pptxHeart Disease Prediction using machine learning.pptx
Heart Disease Prediction using machine learning.pptxPoojaBan
 
ZXCTN 5804 / ZTE PTN / ZTE POTN / ZTE 5804 PTN / ZTE POTN 5804 ( 100/200 GE Z...
ZXCTN 5804 / ZTE PTN / ZTE POTN / ZTE 5804 PTN / ZTE POTN 5804 ( 100/200 GE Z...ZXCTN 5804 / ZTE PTN / ZTE POTN / ZTE 5804 PTN / ZTE POTN 5804 ( 100/200 GE Z...
ZXCTN 5804 / ZTE PTN / ZTE POTN / ZTE 5804 PTN / ZTE POTN 5804 ( 100/200 GE Z...ZTE
 
Microscopic Analysis of Ceramic Materials.pptx
Microscopic Analysis of Ceramic Materials.pptxMicroscopic Analysis of Ceramic Materials.pptx
Microscopic Analysis of Ceramic Materials.pptxpurnimasatapathy1234
 
VIP Call Girls Service Hitech City Hyderabad Call +91-8250192130
VIP Call Girls Service Hitech City Hyderabad Call +91-8250192130VIP Call Girls Service Hitech City Hyderabad Call +91-8250192130
VIP Call Girls Service Hitech City Hyderabad Call +91-8250192130Suhani Kapoor
 
What are the advantages and disadvantages of membrane structures.pptx
What are the advantages and disadvantages of membrane structures.pptxWhat are the advantages and disadvantages of membrane structures.pptx
What are the advantages and disadvantages of membrane structures.pptxwendy cai
 
HARMONY IN THE NATURE AND EXISTENCE - Unit-IV
HARMONY IN THE NATURE AND EXISTENCE - Unit-IVHARMONY IN THE NATURE AND EXISTENCE - Unit-IV
HARMONY IN THE NATURE AND EXISTENCE - Unit-IVRajaP95
 
Past, Present and Future of Generative AI
Past, Present and Future of Generative AIPast, Present and Future of Generative AI
Past, Present and Future of Generative AIabhishek36461
 
Call Girls Narol 7397865700 Independent Call Girls
Call Girls Narol 7397865700 Independent Call GirlsCall Girls Narol 7397865700 Independent Call Girls
Call Girls Narol 7397865700 Independent Call Girlsssuser7cb4ff
 
(ANVI) Koregaon Park Call Girls Just Call 7001035870 [ Cash on Delivery ] Pun...
(ANVI) Koregaon Park Call Girls Just Call 7001035870 [ Cash on Delivery ] Pun...(ANVI) Koregaon Park Call Girls Just Call 7001035870 [ Cash on Delivery ] Pun...
(ANVI) Koregaon Park Call Girls Just Call 7001035870 [ Cash on Delivery ] Pun...ranjana rawat
 

Recently uploaded (20)

Gfe Mayur Vihar Call Girls Service WhatsApp -> 9999965857 Available 24x7 ^ De...
Gfe Mayur Vihar Call Girls Service WhatsApp -> 9999965857 Available 24x7 ^ De...Gfe Mayur Vihar Call Girls Service WhatsApp -> 9999965857 Available 24x7 ^ De...
Gfe Mayur Vihar Call Girls Service WhatsApp -> 9999965857 Available 24x7 ^ De...
 
young call girls in Rajiv Chowk🔝 9953056974 🔝 Delhi escort Service
young call girls in Rajiv Chowk🔝 9953056974 🔝 Delhi escort Serviceyoung call girls in Rajiv Chowk🔝 9953056974 🔝 Delhi escort Service
young call girls in Rajiv Chowk🔝 9953056974 🔝 Delhi escort Service
 
9953056974 Call Girls In South Ex, Escorts (Delhi) NCR.pdf
9953056974 Call Girls In South Ex, Escorts (Delhi) NCR.pdf9953056974 Call Girls In South Ex, Escorts (Delhi) NCR.pdf
9953056974 Call Girls In South Ex, Escorts (Delhi) NCR.pdf
 
Biology for Computer Engineers Course Handout.pptx
Biology for Computer Engineers Course Handout.pptxBiology for Computer Engineers Course Handout.pptx
Biology for Computer Engineers Course Handout.pptx
 
High Profile Call Girls Nagpur Isha Call 7001035870 Meet With Nagpur Escorts
High Profile Call Girls Nagpur Isha Call 7001035870 Meet With Nagpur EscortsHigh Profile Call Girls Nagpur Isha Call 7001035870 Meet With Nagpur Escorts
High Profile Call Girls Nagpur Isha Call 7001035870 Meet With Nagpur Escorts
 
APPLICATIONS-AC/DC DRIVES-OPERATING CHARACTERISTICS
APPLICATIONS-AC/DC DRIVES-OPERATING CHARACTERISTICSAPPLICATIONS-AC/DC DRIVES-OPERATING CHARACTERISTICS
APPLICATIONS-AC/DC DRIVES-OPERATING CHARACTERISTICS
 
Call Girls Delhi {Jodhpur} 9711199012 high profile service
Call Girls Delhi {Jodhpur} 9711199012 high profile serviceCall Girls Delhi {Jodhpur} 9711199012 high profile service
Call Girls Delhi {Jodhpur} 9711199012 high profile service
 
SPICE PARK APR2024 ( 6,793 SPICE Models )
SPICE PARK APR2024 ( 6,793 SPICE Models )SPICE PARK APR2024 ( 6,793 SPICE Models )
SPICE PARK APR2024 ( 6,793 SPICE Models )
 
microprocessor 8085 and its interfacing
microprocessor 8085  and its interfacingmicroprocessor 8085  and its interfacing
microprocessor 8085 and its interfacing
 
Heart Disease Prediction using machine learning.pptx
Heart Disease Prediction using machine learning.pptxHeart Disease Prediction using machine learning.pptx
Heart Disease Prediction using machine learning.pptx
 
ZXCTN 5804 / ZTE PTN / ZTE POTN / ZTE 5804 PTN / ZTE POTN 5804 ( 100/200 GE Z...
ZXCTN 5804 / ZTE PTN / ZTE POTN / ZTE 5804 PTN / ZTE POTN 5804 ( 100/200 GE Z...ZXCTN 5804 / ZTE PTN / ZTE POTN / ZTE 5804 PTN / ZTE POTN 5804 ( 100/200 GE Z...
ZXCTN 5804 / ZTE PTN / ZTE POTN / ZTE 5804 PTN / ZTE POTN 5804 ( 100/200 GE Z...
 
Microscopic Analysis of Ceramic Materials.pptx
Microscopic Analysis of Ceramic Materials.pptxMicroscopic Analysis of Ceramic Materials.pptx
Microscopic Analysis of Ceramic Materials.pptx
 
VIP Call Girls Service Hitech City Hyderabad Call +91-8250192130
VIP Call Girls Service Hitech City Hyderabad Call +91-8250192130VIP Call Girls Service Hitech City Hyderabad Call +91-8250192130
VIP Call Girls Service Hitech City Hyderabad Call +91-8250192130
 
🔝9953056974🔝!!-YOUNG call girls in Rajendra Nagar Escort rvice Shot 2000 nigh...
🔝9953056974🔝!!-YOUNG call girls in Rajendra Nagar Escort rvice Shot 2000 nigh...🔝9953056974🔝!!-YOUNG call girls in Rajendra Nagar Escort rvice Shot 2000 nigh...
🔝9953056974🔝!!-YOUNG call girls in Rajendra Nagar Escort rvice Shot 2000 nigh...
 
What are the advantages and disadvantages of membrane structures.pptx
What are the advantages and disadvantages of membrane structures.pptxWhat are the advantages and disadvantages of membrane structures.pptx
What are the advantages and disadvantages of membrane structures.pptx
 
Exploring_Network_Security_with_JA3_by_Rakesh Seal.pptx
Exploring_Network_Security_with_JA3_by_Rakesh Seal.pptxExploring_Network_Security_with_JA3_by_Rakesh Seal.pptx
Exploring_Network_Security_with_JA3_by_Rakesh Seal.pptx
 
HARMONY IN THE NATURE AND EXISTENCE - Unit-IV
HARMONY IN THE NATURE AND EXISTENCE - Unit-IVHARMONY IN THE NATURE AND EXISTENCE - Unit-IV
HARMONY IN THE NATURE AND EXISTENCE - Unit-IV
 
Past, Present and Future of Generative AI
Past, Present and Future of Generative AIPast, Present and Future of Generative AI
Past, Present and Future of Generative AI
 
Call Girls Narol 7397865700 Independent Call Girls
Call Girls Narol 7397865700 Independent Call GirlsCall Girls Narol 7397865700 Independent Call Girls
Call Girls Narol 7397865700 Independent Call Girls
 
(ANVI) Koregaon Park Call Girls Just Call 7001035870 [ Cash on Delivery ] Pun...
(ANVI) Koregaon Park Call Girls Just Call 7001035870 [ Cash on Delivery ] Pun...(ANVI) Koregaon Park Call Girls Just Call 7001035870 [ Cash on Delivery ] Pun...
(ANVI) Koregaon Park Call Girls Just Call 7001035870 [ Cash on Delivery ] Pun...
 

Your Route to Design Success - PCB Routing Tips from the Pros

  • 1. Your Route to Design Success: PCB Routing Tips from the Pros 4/26/2019 PCB Routing Flow 1
  • 2. 4/26/2019 2 Routing is Critical to Success Over 50% of total design time can be spent in the routing phase. - Cadence User Study PCB Routing Flow
  • 3. 4/26/2019 3 Define Your Process Upfront PCB Routing Flow Placement Stackup Constraints/ Criticals Auto / Interactive Routing Cleanup & Verification
  • 4. 1. Define placement strategy 2. Complete placement 3. Set your boundaries 4. PCB Stack up and impedance requirements 5. Define routing constraints defined for critical nets – (Diff pair rules, matched length, Impedance control, physical and spacing rules etc.) 6. Fan out vias established for signal and power connections 7. Define power distribution solution – (Split planes, pre-poured power islands around regulators, high current devices, etc.) 8. Route critical nets – (diff pairs, clocks, matched groups etc.) 9. Bulk routing of remaining nets 10. Final cleanup, DFM checking Recommended Route Process Flow PCB Routing Flow4/23/2019 4
  • 5. 5 Mechanical constraints should be evaluated and implemented such as mechanical mounting holes, mechanical cut outs, route keep-out regions Connector placements usually have specific X,Y placements and should be completed first followed by adding fixed properties so they are locked in Large pin count devices should be placed next, using the signal rats nest as a guide for orientation to minimize rats nest twisting or crossovers for better signal flow Parts should be grouped together by function and rats nest optimized for routing (Room properties help here) Decoupling caps should be placed near the device power pins to increase their effectiveness Placement Strategy PCB Routing Flow4/23/2019
  • 6. 6 Parts should be placed on the coarsest grid based on the pin pitch of the majority of the parts Placement grid will be divisible by the routing grid – example: If most of the parts have a 50 mil pin pitch, then the routing grid could be 5, 10, 25, or 50 mil Fan-out of complex parts can be achieved at the library level for future re-use Fan-out grid is a multiple of the pin pitch grid Placement Grid Tips & Best Practices PCB Routing Flow4/23/2019
  • 7. 7 Define route keep-ins to manage clearance of copper planes, vias and trace routing to the board edge Make sure to define any required via or route keep-outs under any connectors. Some connectors have metal shields etc. that may short signals Assembly requirements to be considered and implemented such as v-scores, break off tabs, fiducials etc. Set your Boundaries Defining Keep-In and Keep-Outs PCB Routing Flow4/23/2019
  • 8. 8 Take care when defining your stack-up Stack-up has direct impact on differential impedance, single ended impedance Impedance targets should be modeled and evaluated before moving forward Results will help you define physical width and gap spacing rules for differential pairs PCB Stack-Up PCB Routing Flow4/23/2019
  • 9. 9 Differential pair parameters defined in the electrical domain Length rules defined for clock lines, matched groups etc. Physical trace widths, spacing rules, and via size should be defined based on board density and current requirements for any high power devices Defining Constraints Why? PCB Routing Flow4/23/2019
  • 10. 10 Fanout vias are used when designing multilayer designs Fanout vias for signal pins allows access to multiple signal layers for routing. This provides additional space and routing channels for designs with increased density and pin counts Fanout vias for power must be established for power distribution and to complete connectivity to inner plane layers Fanouts and Power Distribution PCB Routing Flow4/23/2019
  • 11. 11 Split plane boundaries are established for separation between copper pours Saves space/layers for providing power distribution on less layers Assigned colors to different power nets helps to determine split plane boundary location Separation widths between planes in high voltage areas may be increased to prevent arc-over Establish Split for PWR Distribution PCB Routing Flow4/23/2019
  • 12. 12 Critical nets are routed to meet impedance rules and timing requirements Common design practices include not routing high speed signals over plane splits Why? It causes impedance discontinuities that impact signal integrity Segment over void check highlights violations Routing Critical Nets PCB Routing Flow4/23/2019
  • 13. 4/26/2019 13PCB Routing Flow Great, All My Critical Signals Are Done. Now What?
  • 14. 14 How do I handle all the rest of the normal ‘boring’ connections? What is the best use of my time? Question: What about an auto-router? Answer: It depends…. What people say about auto-routers… • It will take too much time to learn the auto-router • The results are not good (I can do a better job) • I will spend too much time doing cleanup • Route quality may impact the performance of the design Auto-routers often get a bad rap! ‘Bulk’ Routing PCB Routing Flow4/23/2019
  • 15. 4/26/2019 15 Bulk Routing Pros & Cons PCB Routing Flow Manual / Interactive Routing + More control + Less upfront planning required + Easier to adjust to changes on the fly - Can take longer - Can be error prone (human error) - Less time to test ‘what-if’ strategies Autorouting + Fast + Can try many routing strategies quickly + Reusable - Less granular control - Can be hard to adjust to design change - Can be difficult to convey user intent
  • 16. 4/26/2019 16 Ultimately… PCB Routing Flow The goal is to finish the route effectively, making the best use of your time and expertise. Routers are just tools. Use what works best for the job at hand.
  • 17. 17 PCB Route Cleanup PCB Routing Flow4/23/2019 What kind of route defects should I look for? 90-degree corners Acute Angles Non-ideal Pad Entry Here’s a few… Plus some more… • Parallel line gap • Uncoupled diff pair segments • Arc radius • Non arc corners • Miter / corner size
  • 18. 18 Manual Inspection is an option. Often tedious and error-prone. Ideally, your CAD tool provides routines to help identify problems for you. Most are easy to fix once they are found How to Find and Fix? PCB Routing Flow4/23/2019
  • 19. 4/26/2019 PCB Routing Flow 19 • Ensuring your design is manufacturable is crucial • Hopefully your CAD program provides ways to embed DFM rules and checking into the design process *Check-out our webinar on Real-Time In-Design DFM for more info DFM
  • 20. 4/26/2019 20 20 Demo Time PCB Routing Flow
  • 21. 4/26/2019 21PCB Routing Flow Bonus Managing/Routing Large BUS Structures
  • 23. 4/26/2019 23PCB Routing Flow Routing is one of the most critical and time consuming stages in the design process. With the proper processes, knowledge, and tools you can be confident in your ability to achieve routing closure.
  • 24. 4/26/2019 24 Thank you Watch the Full Webinar on Demand https://resources.ema-eda.com/pcb-layout- routing/your-route-to-design-success-pcb-routing-tips- from-the-pros EMA Design Automation 800-813-7494 edc@ema-eda.com www.ema-eda.com PCB Routing Flow