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FUNDAMENTALS OF CMOS VLSI

       Subject Code               : 06EC56                IA Marks               : 25
       No. of Lecture Hours/Week : 04                     Exam Hours             : 03
       Total No. of Lecture Hours : 52                    Exam Marks             : 100

                                      PART – A

UNIT – 1
BASIC MOS TECHNOLOGY: Integrated circuit’s era. Enhancement and depletion
mode MOS transistors. nMOS fabrication. CMOS fabrication. Thermal aspects of
processing. BiCMOS technology. Production of E-beam masks.

                                                                               4 Hours

MOS TRANSISTOR THEORY: Introduction, MOS Device Design Equations, The
Complementary CMOS Inverter – DC Characteristics, Static Load MOS Inverters, The
Differential Inverter, The Transmission Gate, Tristate Inverter.

                                                                               4 Hours

UNIT – 2
CIRCUIT DESIGN PROCESSES: MOS layers. Stick Diagrams. Design rules and
layout – lambda-based design and other rules. Examples. Layout diagrams. Symbolic
diagrams. Tutorial exercises.

                                                                               4 Hours
Basic Physical Design of Simple logic gates.                                   3 Hours


UNIT – 3
CMOS LOGIC STRUCTURES: CMOS Complementary Logic, Bi CMOS Logic,
Pseudo-n MOS Logic, Dynamic CMOS Logic, Clocked CMOS Logic, Pass Transistor
Logic, CMOS Domino Logic Cascaded Voltage Switch Logic (CVSL).

                                                                               6 Hours

UNIT – 4
BASIC CIRCUIT CONCEPTS: Sheet resistance. Area capacitances. Capacitance
calculations. The delay unit. Inverter delays. Driving capacitive loads. Propagation
delays. Wiring capacitances.

                                                                     4 Hours
SCALING OF MOS CIRCUITS: Scaling models and factors. Limits on scaling.
Limits due to current density and noise.
                                                                     3 Hours
UNIT – 5
CMOS SUBSYSTEM DESIGN: Architectural issues. Switch logic.                 Gate logic.
Design examples – combinational logic. Clocked circuits. Other system
Considerations.                                                              4 Hours

Clocking Strategies                                                          4 Hours


UNIT – 6
CMOS SUBSYSTEM DESIGN PROCESSES: General considerations. Process
illustration. ALU subsystem. Adders. Multipliers.
                                                              6 Hours

UNIT – 7
MEMORY, REGISTERS AND CLOCK: Timing considerations. Memory elements.
Memory cell arrays.
                                                              5 Hours

UNIT – 8
TESTABILITY: Performance parameters. Layout issues. I/O pads. Real estate.
System delays. Ground rules for design. Test and testability.
                                                                        5 Hours

TEXT BOOKS:
  1. Basic VLSI Design – Douglas A Pucknell & Kamran Eshraghian,
     PHI 3rd Edition (original Edition – 1994), 2005.
  2. Principles of CMOS VLSI Design: A Systems Perspective, Neil
     H. E. Weste and K. Eshragian, 2nd edition, Pearson Education (Asia)
     Pvt. Ltd., 2000.

REFERENCE BOOKS:
  1. Fundamental of Semiconductor Devices, M. K. Achuthan and K. N. Bhat,
     Tata McGraw-Hill Publishing Company Limited, New Delhi, 2007.
  2. CMOS Digital Integrated Circuits: Analysis and Design, Sung
     -Mo Kang & Yusuf Leblebici, 3rd Edition, Tata McGraw-Hill
     Publishing Company Ltd., New Delhi, 2007.
  3. Analysis and Design of Digital Integrated Circuits – D.A Hodges,
     H.G Jackson and R.A Saleh 3rd Edition, Tata McGraw-Hill
     Publishing Company Limited, New Delhi, 2007.
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Fundamentals of cmos vlsi

  • 1. FUNDAMENTALS OF CMOS VLSI Subject Code : 06EC56 IA Marks : 25 No. of Lecture Hours/Week : 04 Exam Hours : 03 Total No. of Lecture Hours : 52 Exam Marks : 100 PART – A UNIT – 1 BASIC MOS TECHNOLOGY: Integrated circuit’s era. Enhancement and depletion mode MOS transistors. nMOS fabrication. CMOS fabrication. Thermal aspects of processing. BiCMOS technology. Production of E-beam masks. 4 Hours MOS TRANSISTOR THEORY: Introduction, MOS Device Design Equations, The Complementary CMOS Inverter – DC Characteristics, Static Load MOS Inverters, The Differential Inverter, The Transmission Gate, Tristate Inverter. 4 Hours UNIT – 2 CIRCUIT DESIGN PROCESSES: MOS layers. Stick Diagrams. Design rules and layout – lambda-based design and other rules. Examples. Layout diagrams. Symbolic diagrams. Tutorial exercises. 4 Hours Basic Physical Design of Simple logic gates. 3 Hours UNIT – 3 CMOS LOGIC STRUCTURES: CMOS Complementary Logic, Bi CMOS Logic, Pseudo-n MOS Logic, Dynamic CMOS Logic, Clocked CMOS Logic, Pass Transistor Logic, CMOS Domino Logic Cascaded Voltage Switch Logic (CVSL). 6 Hours UNIT – 4 BASIC CIRCUIT CONCEPTS: Sheet resistance. Area capacitances. Capacitance calculations. The delay unit. Inverter delays. Driving capacitive loads. Propagation delays. Wiring capacitances. 4 Hours SCALING OF MOS CIRCUITS: Scaling models and factors. Limits on scaling. Limits due to current density and noise. 3 Hours
  • 2. UNIT – 5 CMOS SUBSYSTEM DESIGN: Architectural issues. Switch logic. Gate logic. Design examples – combinational logic. Clocked circuits. Other system Considerations. 4 Hours Clocking Strategies 4 Hours UNIT – 6 CMOS SUBSYSTEM DESIGN PROCESSES: General considerations. Process illustration. ALU subsystem. Adders. Multipliers. 6 Hours UNIT – 7 MEMORY, REGISTERS AND CLOCK: Timing considerations. Memory elements. Memory cell arrays. 5 Hours UNIT – 8 TESTABILITY: Performance parameters. Layout issues. I/O pads. Real estate. System delays. Ground rules for design. Test and testability. 5 Hours TEXT BOOKS: 1. Basic VLSI Design – Douglas A Pucknell & Kamran Eshraghian, PHI 3rd Edition (original Edition – 1994), 2005. 2. Principles of CMOS VLSI Design: A Systems Perspective, Neil H. E. Weste and K. Eshragian, 2nd edition, Pearson Education (Asia) Pvt. Ltd., 2000. REFERENCE BOOKS: 1. Fundamental of Semiconductor Devices, M. K. Achuthan and K. N. Bhat, Tata McGraw-Hill Publishing Company Limited, New Delhi, 2007. 2. CMOS Digital Integrated Circuits: Analysis and Design, Sung -Mo Kang & Yusuf Leblebici, 3rd Edition, Tata McGraw-Hill Publishing Company Ltd., New Delhi, 2007. 3. Analysis and Design of Digital Integrated Circuits – D.A Hodges, H.G Jackson and R.A Saleh 3rd Edition, Tata McGraw-Hill Publishing Company Limited, New Delhi, 2007.