1. ANANTHARAJ S
Email : ananth2@ymail.com
Mobile no : +919659736286
Professional Objective
I would cherish a demanding position that makes effective use of my skills and provides good
career growth , personality development , where performance is rewarded with new responsibilities, and
where teamwork is the accepted norm, putting in the best to the maximum benefit of organization.
Working experience
Present:
Company Name : Gigacom SemiconductorPvt Ltd
Designation : Analog Layout Design Engineer
Experience : 4 Years
Date : Aug 2015- Present
Past:
Company Name : Tessolve Semiconductor Pvt Ltd
Designation : Analog Layout Design Engineer
Date : Sep2014- July2015
Company Name : Arasan Chip Systems Inc
Designation : Analog Layout Design Engineer
Date : 1 Jan2012-Augest 2014
Tools & Technologies
Layout Tools : Virtuoso –L & XL Editor (Cadence v6.1.3 ,v6.1.4 & v6.1.5.72),
Schematic Tools : Virtuoso Schematic Editor (Cadence v6.1.3 ,v6.1.4 & v6.1.5.72),
Circuit Simulation Tools : ADE (Cadence v6.1.5.72)
Layout Verification Tools : Calibre 2012 (Mentor Graphics v2012 1_37.24)
Process Technology : Finfet GF14nm,TSMC 28nm, TSMC 40nm with & without
eDRAM, l4lp, UMC40nm,USB 2.0_45nm ,UMC65nm,
CP90nmSMIC 130nm, USB 2.0_180nm

2. Analog Layout Techniques :
 Matching of Devices i.e. common centroid and interdigitation
 Understanding of layout impact noise coupling from signal, supply and substrate.
 Shielding for the current inputs
 Electro-migration and IR Issues solutions
 Reliability Issues like Antenna, Latch-up and notches.
 Proper signal flow routing, power/ground structure , block placement and layout floor planning.
 Met challenges in High speed dividers and VCO
 DRC / LVS/PEX
 Good understanding of Analog Layout Concepts and Issues.
PROJECTS (arranged from present to the past)
Layout and Physical verification for GF14nm (Finfet)
Technology : 14 nm
Foundry : GF 14lp
Frequency : 500 MHz
Worked Blocks : Logics,cdr_pll,RXdes
Layout and Physical verification for PCI-e TSMC28nm
Technology : 28nm
Foundry : TSMC28nm
Frequency : 500 MHz
Worked Blocks : Logics,current mirror
Layout and Physical verification for TLI UMC40nm
Technology : 40nm
Foundry : UMC40
Customer : TLI
Frequency : 6 Ghz
Voltage : 1.1V
Circuit type : Analog Mixed Signal
Circuit Description : CDR TOP , PLLTOP
Layout and Physical verification for DPHY on TSMC28nm (Training)
Technology : 28nm

3. Foundry : TSMC28nm
Frequency : 500 MHz
Worked Blocks : Logics,current mirror
Layout and Physical verification for USB 2.0
Technology : 45nm
Foundry : TSMC45
Customer : IKANOS
Frequency : 240 Mhz
Voltage : 3.3 V,0.9 V
Circuit type : Analog Mixed Signal
Circuit Description : PLL blocks ,Opamp,Charge_pump
Layout and Physical verification for Pixelwork Dphy Top
Technology : 40nm
Foundry : TSMC40lp_5x2y
Customers : Pixelwork
Frequency : 500MHz
Voltage : 1.1V
Circuit type : Analog Mixed Signal
Circuit Description : Delay4_stage and Swing Restore in PLL block.
Layout and Physical verification for Compound Protonics Dphy Top
Technology : 40nm
Foundry : TSMC40lpedram
Customers : Compound Protonics
Frequency : 500MHZ
Voltage : 1.1V
Circuit type : Analog Mixed Signal
Circuit Description : PLL blocks
Layout and Physical verification for Dphy Top
Technology : 65nm
Foundry : UMC65nm
Customers : Sony
Frequency : 500 MHz
Voltage : 1.2V
Circuit type : Analog Mixed Signal
Circuit Description : PLL_Top,Opam,charge_pump,VCO
Layout and Physical verification for Mphy Top
Technology : 90nm

4. Foundry : CMOS090
Customers : Compound Protonics
Frequency : 6.25 GHz
Voltage : 1.2V
Circuit type : Analog Mixed Signal
Circuit Description : CDR,PLL
Layout and Physical verification for PLL & CDR TOP
Technology : 40nm
Foundry : TSMC_40lp_4x1z
Customers : Hynix
Frequency : 6Ghz
Voltage : 1.1V
Circuit type : Analog Mixed Signal
Circuit Description : VCO , PLL_Top and CDR_Top
Layout and Physical verification for PLL
Technology : 40nm
Foundry : TSMC_40lp_4x1z
Customers : Test Chip
Frequency : 6GHz
Voltage : 1.1V
Circuit type : Analog Mixed Signal
Circuit Description : PLL blocks
Layout and Physical verification for DPHY
Technology : 130nm
Foundry : SMIC
Customers : Kingway
Frequency : 500 Mhz
Voltage : 1.2V
Circuit type : Analog Mixed Signal
Circuit Description : Bias_local, Opamp
Basic Layout training
 Study of Analog Layout Concepts and Issues
 Schematic design and simulation for Inverters, Gates, Bias circuit, Current Mirrors.
 Layout and verification of Analog and Digital blocks using TI at 500 MHz, 1.2V
Duration : 2 months
Academic Profile
K.N.S.K College of Engineering June2007 –April 2011

5. Bachelor of Engineering (Electronics and Communication) 71%
Anna University Tirunelveli
Government Hr’ Sec’ School Vadasery June2006–April 2007
Higher Secondary (HSC) 71%
Tamil Nadu State Board
Government Hr’ Sec’ School Vadasery June2004–April 2005
Secondary School Leaving Certificate (SSLC) 69 %
Tamil Nadu State Board
Achievements
 Member of Rotract club.
 Participated in University Level Cricket Competition.
 Participated in District Level Science Exhibition.
Personal Profile
Father’s Name : Mr.T.Sekar
Date of Birth : 01st
June 1990
Gender : Male
Nationality : Indian
Languages Known :Tamil and English.
Marital Status : Single
Passport Number : K3484484
Address :1-32-84 ,Lekshmipuram colony,kurukkalmadam
Vellamadam post,Nagercoil 629305,
Kanyakumari (D.T), Tamilnadu.
Strength
 Hard working.
 Ability to adapt environment.
I declare that all the above data’s are true of my knowledge.
Place: Yours Sincerely,
Date : S.Anantharaj
Declaration

6. Bachelor of Engineering (Electronics and Communication) 71%
Anna University Tirunelveli
Government Hr’ Sec’ School Vadasery June2006–April 2007
Higher Secondary (HSC) 71%
Tamil Nadu State Board
Government Hr’ Sec’ School Vadasery June2004–April 2005
Secondary School Leaving Certificate (SSLC) 69 %
Tamil Nadu State Board
Achievements
 Member of Rotract club.
 Participated in University Level Cricket Competition.
 Participated in District Level Science Exhibition.
Personal Profile
Father’s Name : Mr.T.Sekar
Date of Birth : 01st
June 1990
Gender : Male
Nationality : Indian
Languages Known :Tamil and English.
Marital Status : Single
Passport Number : K3484484
Address :1-32-84 ,Lekshmipuram colony,kurukkalmadam
Vellamadam post,Nagercoil 629305,
Kanyakumari (D.T), Tamilnadu.
Strength
 Hard working.
 Ability to adapt environment.
I declare that all the above data’s are true of my knowledge.
Place: Yours Sincerely,
Date : S.Anantharaj
Declaration